aoqi@0: /*
dlong@7598:  * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
aoqi@0:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0:  *
aoqi@0:  * This code is free software; you can redistribute it and/or modify it
aoqi@0:  * under the terms of the GNU General Public License version 2 only, as
aoqi@0:  * published by the Free Software Foundation.
aoqi@0:  *
aoqi@0:  * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
aoqi@0:  * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0:  * accompanied this code).
aoqi@0:  *
aoqi@0:  * You should have received a copy of the GNU General Public License version
aoqi@0:  * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0:  *
aoqi@0:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0:  * or visit www.oracle.com if you need additional information or have any
aoqi@0:  * questions.
aoqi@0:  *
aoqi@0:  */
aoqi@0: 
aoqi@1: /*
aoqi@1:  * This file has been modified by Loongson Technology in 2015. These
aoqi@1:  * modifications are Copyright (c) 2015 Loongson Technology, and are made
aoqi@1:  * available on the same license terms set forth above.
aoqi@1:  */
aoqi@1: 
aoqi@0: #ifndef SHARE_VM_CODE_VMREG_HPP
aoqi@0: #define SHARE_VM_CODE_VMREG_HPP
aoqi@0: 
aoqi@0: #include "memory/allocation.hpp"
aoqi@0: #include "utilities/globalDefinitions.hpp"
aoqi@0: #include "asm/register.hpp"
aoqi@0: 
aoqi@0: #ifdef COMPILER2
aoqi@0: #include "opto/adlcVMDeps.hpp"
aoqi@0: #include "utilities/ostream.hpp"
dlong@7598: #if defined ADGLOBALS_MD_HPP
dlong@7598: # include ADGLOBALS_MD_HPP
dlong@7598: #elif defined TARGET_ARCH_MODEL_x86_32
aoqi@0: # include "adfiles/adGlobals_x86_32.hpp"
dlong@7598: #elif defined TARGET_ARCH_MODEL_x86_64
aoqi@0: # include "adfiles/adGlobals_x86_64.hpp"
dlong@7598: #elif defined TARGET_ARCH_MODEL_sparc
aoqi@0: # include "adfiles/adGlobals_sparc.hpp"
dlong@7598: #elif defined TARGET_ARCH_MODEL_zero
aoqi@0: # include "adfiles/adGlobals_zero.hpp"
dlong@7598: #elif defined TARGET_ARCH_MODEL_ppc_64
aoqi@0: # include "adfiles/adGlobals_ppc_64.hpp"
aoqi@0: #endif
aoqi@1: #ifdef TARGET_ARCH_MODEL_mips_64
aoqi@1: # include "adfiles/adGlobals_mips_64.hpp"
aoqi@1: #endif
aoqi@0: #endif
aoqi@0: 
aoqi@0: //------------------------------VMReg------------------------------------------
aoqi@0: // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
aoqi@0: // Register numbers below VMRegImpl::stack0 are the same for both.  Register
aoqi@0: // numbers above stack0 are either warped (in the compiler) or unwarped
aoqi@0: // (in the VM).  Unwarped numbers represent stack indices, offsets from
aoqi@0: // the current stack pointer.  Warped numbers are required during compilation
aoqi@0: // when we do not yet know how big the frame will be.
aoqi@0: 
aoqi@0: class VMRegImpl;
aoqi@0: typedef VMRegImpl* VMReg;
aoqi@0: 
aoqi@0: class VMRegImpl {
aoqi@0: // friend class OopMap;
aoqi@0: friend class VMStructs;
aoqi@0: friend class OptoReg;
aoqi@0: // friend class Location;
aoqi@0: private:
aoqi@0:   enum {
aoqi@0:     BAD_REG = -1
aoqi@0:   };
aoqi@0: 
aoqi@0: 
aoqi@0: 
aoqi@0:   static VMReg stack0;
aoqi@0:   // Names for registers
aoqi@0:   static const char *regName[];
aoqi@0:   static const int register_count;
aoqi@0: 
aoqi@0: 
aoqi@0: public:
aoqi@0: 
aoqi@0:   static VMReg  as_VMReg(int val, bool bad_ok = false) { assert(val > BAD_REG || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
aoqi@0: 
aoqi@0:   const char*  name() {
aoqi@0:     if (is_reg()) {
aoqi@0:       return regName[value()];
aoqi@0:     } else if (!is_valid()) {
aoqi@0:       return "BAD";
aoqi@0:     } else {
aoqi@0:       // shouldn't really be called with stack
aoqi@0:       return "STACKED REG";
aoqi@0:     }
aoqi@0:   }
aoqi@0:   static VMReg Bad() { return (VMReg) (intptr_t) BAD_REG; }
aoqi@0:   bool is_valid() const { return ((intptr_t) this) != BAD_REG; }
aoqi@0:   bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
aoqi@0:   bool is_reg()   const { return is_valid() && !is_stack(); }
aoqi@0: 
aoqi@0:   // A concrete register is a value that returns true for is_reg() and is
aoqi@0:   // also a register you could use in the assembler. On machines with
aoqi@0:   // 64bit registers only one half of the VMReg (and OptoReg) is considered
aoqi@0:   // concrete.
aoqi@0:   bool is_concrete();
aoqi@0: 
aoqi@0:   // VMRegs are 4 bytes wide on all platforms
aoqi@0:   static const int stack_slot_size;
aoqi@0:   static const int slots_per_word;
aoqi@0: 
aoqi@0: 
aoqi@0:   // This really ought to check that the register is "real" in the sense that
aoqi@0:   // we don't try and get the VMReg number of a physical register that doesn't
aoqi@0:   // have an expressible part. That would be pd specific code
aoqi@0:   VMReg next() {
aoqi@0:     assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
aoqi@0:     return (VMReg)(intptr_t)(value() + 1);
aoqi@0:   }
aoqi@0:   VMReg next(int i) {
aoqi@0:     assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
aoqi@0:     return (VMReg)(intptr_t)(value() + i);
aoqi@0:   }
aoqi@0:   VMReg prev() {
aoqi@0:     assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
aoqi@0:     return (VMReg)(intptr_t)(value() - 1);
aoqi@0:   }
aoqi@0: 
aoqi@0: 
aoqi@0:   intptr_t value() const         {return (intptr_t) this; }
aoqi@0: 
aoqi@0:   void print_on(outputStream* st) const;
aoqi@0:   void print() const { print_on(tty); }
aoqi@0: 
aoqi@0:   // bias a stack slot.
aoqi@0:   // Typically used to adjust a virtual frame slots by amounts that are offset by
aoqi@0:   // amounts that are part of the native abi. The VMReg must be a stack slot
aoqi@0:   // and the result must be also.
aoqi@0: 
aoqi@0:   VMReg bias(int offset) {
aoqi@0:     assert(is_stack(), "must be");
aoqi@0:     // VMReg res = VMRegImpl::as_VMReg(value() + offset);
aoqi@0:     VMReg res = stack2reg(reg2stack() + offset);
aoqi@0:     assert(res->is_stack(), "must be");
aoqi@0:     return res;
aoqi@0:   }
aoqi@0: 
aoqi@0:   // Convert register numbers to stack slots and vice versa
aoqi@0:   static VMReg stack2reg( int idx ) {
aoqi@0:     return (VMReg) (intptr_t) (stack0->value() + idx);
aoqi@0:   }
aoqi@0: 
aoqi@0:   uintptr_t reg2stack() {
aoqi@0:     assert( is_stack(), "Not a stack-based register" );
aoqi@0:     return value() - stack0->value();
aoqi@0:   }
aoqi@0: 
aoqi@0:   static void set_regName();
aoqi@0: 
aoqi@0: #ifdef TARGET_ARCH_x86
aoqi@0: # include "vmreg_x86.hpp"
aoqi@0: #endif
aoqi@1: #ifdef TARGET_ARCH_mips
aoqi@1: # include "vmreg_mips.hpp"
aoqi@1: #endif
aoqi@0: #ifdef TARGET_ARCH_sparc
aoqi@0: # include "vmreg_sparc.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_zero
aoqi@0: # include "vmreg_zero.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_arm
aoqi@0: # include "vmreg_arm.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_ppc
aoqi@0: # include "vmreg_ppc.hpp"
aoqi@0: #endif
aoqi@0: 
aoqi@0: 
aoqi@0: };
aoqi@0: 
aoqi@0: //---------------------------VMRegPair-------------------------------------------
aoqi@0: // Pairs of 32-bit registers for arguments.
aoqi@0: // SharedRuntime::java_calling_convention will overwrite the structs with
aoqi@0: // the calling convention's registers.  VMRegImpl::Bad is returned for any
aoqi@0: // unused 32-bit register.  This happens for the unused high half of Int
aoqi@0: // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
aoqi@0: // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
aoqi@0: // 32-bits of O0/O1 are set to VMRegImpl::Bad).  Longs in one register & doubles
aoqi@0: // always return a high and a low register, as do 64-bit pointers.
aoqi@0: //
aoqi@0: class VMRegPair {
aoqi@0: private:
aoqi@0:   VMReg _second;
aoqi@0:   VMReg _first;
aoqi@0: public:
aoqi@0:   void set_bad (                   ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
aoqi@0:   void set1    (         VMReg v  ) { _second=VMRegImpl::Bad(); _first=v; }
aoqi@0:   void set2    (         VMReg v  ) { _second=v->next();  _first=v; }
aoqi@0:   void set_pair( VMReg second, VMReg first    ) { _second= second;    _first= first; }
aoqi@0:   void set_ptr ( VMReg ptr ) {
aoqi@0: #ifdef _LP64
aoqi@0:     _second = ptr->next();
aoqi@0: #else
aoqi@0:     _second = VMRegImpl::Bad();
aoqi@0: #endif
aoqi@0:     _first = ptr;
aoqi@0:   }
aoqi@0:   // Return true if single register, even if the pair is really just adjacent stack slots
aoqi@0:   bool is_single_reg() const {
aoqi@0:     return (_first->is_valid()) && (_first->value() + 1 == _second->value());
aoqi@0:   }
aoqi@0: 
aoqi@0:   // Return true if single stack based "register" where the slot alignment matches input alignment
aoqi@0:   bool is_adjacent_on_stack(int alignment) const {
aoqi@0:     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
aoqi@0:   }
aoqi@0: 
aoqi@0:   // Return true if single stack based "register" where the slot alignment matches input alignment
aoqi@0:   bool is_adjacent_aligned_on_stack(int alignment) const {
aoqi@0:     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
aoqi@0:   }
aoqi@0: 
aoqi@0:   // Return true if single register but adjacent stack slots do not count
aoqi@0:   bool is_single_phys_reg() const {
aoqi@0:     return (_first->is_reg() && (_first->value() + 1 == _second->value()));
aoqi@0:   }
aoqi@0: 
aoqi@0:   VMReg second() const { return _second; }
aoqi@0:   VMReg first()  const { return _first; }
aoqi@0:   VMRegPair(VMReg s, VMReg f) {  _second = s; _first = f; }
aoqi@0:   VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
aoqi@0:   VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
aoqi@0: };
aoqi@0: 
aoqi@0: #endif // SHARE_VM_CODE_VMREG_HPP