Wed, 09 Dec 2009 16:40:45 -0800
6895383: JCK test throws NPE for method compiled with Escape Analysis
Summary: Add missing checks for MemBar nodes in EA.
Reviewed-by: never
1 /*
2 * Copyright 1998-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
25 #include "incls/_precompiled.incl"
26 #include "incls/_output.cpp.incl"
28 extern uint size_java_to_interp();
29 extern uint reloc_java_to_interp();
30 extern uint size_exception_handler();
31 extern uint size_deopt_handler();
33 #ifndef PRODUCT
34 #define DEBUG_ARG(x) , x
35 #else
36 #define DEBUG_ARG(x)
37 #endif
39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 extern int emit_deopt_handler(CodeBuffer &cbuf);
42 //------------------------------Output-----------------------------------------
43 // Convert Nodes to instruction bits and pass off to the VM
44 void Compile::Output() {
45 // RootNode goes
46 assert( _cfg->_broot->_nodes.size() == 0, "" );
48 // Initialize the space for the BufferBlob used to find and verify
49 // instruction size in MachNode::emit_size()
50 init_scratch_buffer_blob();
51 if (failing()) return; // Out of memory
53 // The number of new nodes (mostly MachNop) is proportional to
54 // the number of java calls and inner loops which are aligned.
55 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
56 C->inner_loops()*(OptoLoopAlignment-1)),
57 "out of nodes before code generation" ) ) {
58 return;
59 }
60 // Make sure I can find the Start Node
61 Block_Array& bbs = _cfg->_bbs;
62 Block *entry = _cfg->_blocks[1];
63 Block *broot = _cfg->_broot;
65 const StartNode *start = entry->_nodes[0]->as_Start();
67 // Replace StartNode with prolog
68 MachPrologNode *prolog = new (this) MachPrologNode();
69 entry->_nodes.map( 0, prolog );
70 bbs.map( prolog->_idx, entry );
71 bbs.map( start->_idx, NULL ); // start is no longer in any block
73 // Virtual methods need an unverified entry point
75 if( is_osr_compilation() ) {
76 if( PoisonOSREntry ) {
77 // TODO: Should use a ShouldNotReachHereNode...
78 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
79 }
80 } else {
81 if( _method && !_method->flags().is_static() ) {
82 // Insert unvalidated entry point
83 _cfg->insert( broot, 0, new (this) MachUEPNode() );
84 }
86 }
89 // Break before main entry point
90 if( (_method && _method->break_at_execute())
91 #ifndef PRODUCT
92 ||(OptoBreakpoint && is_method_compilation())
93 ||(OptoBreakpointOSR && is_osr_compilation())
94 ||(OptoBreakpointC2R && !_method)
95 #endif
96 ) {
97 // checking for _method means that OptoBreakpoint does not apply to
98 // runtime stubs or frame converters
99 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
100 }
102 // Insert epilogs before every return
103 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
104 Block *b = _cfg->_blocks[i];
105 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
106 Node *m = b->end();
107 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
108 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
109 b->add_inst( epilog );
110 bbs.map(epilog->_idx, b);
111 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
112 }
113 }
114 }
116 # ifdef ENABLE_ZAP_DEAD_LOCALS
117 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
118 # endif
120 ScheduleAndBundle();
122 #ifndef PRODUCT
123 if (trace_opto_output()) {
124 tty->print("\n---- After ScheduleAndBundle ----\n");
125 for (uint i = 0; i < _cfg->_num_blocks; i++) {
126 tty->print("\nBB#%03d:\n", i);
127 Block *bb = _cfg->_blocks[i];
128 for (uint j = 0; j < bb->_nodes.size(); j++) {
129 Node *n = bb->_nodes[j];
130 OptoReg::Name reg = _regalloc->get_reg_first(n);
131 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
132 n->dump();
133 }
134 }
135 }
136 #endif
138 if (failing()) return;
140 BuildOopMaps();
142 if (failing()) return;
144 Fill_buffer();
145 }
147 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
148 // Determine if we need to generate a stack overflow check.
149 // Do it if the method is not a stub function and
150 // has java calls or has frame size > vm_page_size/8.
151 return (stub_function() == NULL &&
152 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
153 }
155 bool Compile::need_register_stack_bang() const {
156 // Determine if we need to generate a register stack overflow check.
157 // This is only used on architectures which have split register
158 // and memory stacks (ie. IA64).
159 // Bang if the method is not a stub function and has java calls
160 return (stub_function() == NULL && has_java_calls());
161 }
163 # ifdef ENABLE_ZAP_DEAD_LOCALS
166 // In order to catch compiler oop-map bugs, we have implemented
167 // a debugging mode called ZapDeadCompilerLocals.
168 // This mode causes the compiler to insert a call to a runtime routine,
169 // "zap_dead_locals", right before each place in compiled code
170 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
171 // The runtime routine checks that locations mapped as oops are really
172 // oops, that locations mapped as values do not look like oops,
173 // and that locations mapped as dead are not used later
174 // (by zapping them to an invalid address).
176 int Compile::_CompiledZap_count = 0;
178 void Compile::Insert_zap_nodes() {
179 bool skip = false;
182 // Dink with static counts because code code without the extra
183 // runtime calls is MUCH faster for debugging purposes
185 if ( CompileZapFirst == 0 ) ; // nothing special
186 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
187 else if ( CompileZapFirst == CompiledZap_count() )
188 warning("starting zap compilation after skipping");
190 if ( CompileZapLast == -1 ) ; // nothing special
191 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
192 else if ( CompileZapLast == CompiledZap_count() )
193 warning("about to compile last zap");
195 ++_CompiledZap_count; // counts skipped zaps, too
197 if ( skip ) return;
200 if ( _method == NULL )
201 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
203 // Insert call to zap runtime stub before every node with an oop map
204 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
205 Block *b = _cfg->_blocks[i];
206 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
207 Node *n = b->_nodes[j];
209 // Determining if we should insert a zap-a-lot node in output.
210 // We do that for all nodes that has oopmap info, except for calls
211 // to allocation. Calls to allocation passes in the old top-of-eden pointer
212 // and expect the C code to reset it. Hence, there can be no safepoints between
213 // the inlined-allocation and the call to new_Java, etc.
214 // We also cannot zap monitor calls, as they must hold the microlock
215 // during the call to Zap, which also wants to grab the microlock.
216 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
217 if ( insert ) { // it is MachSafePoint
218 if ( !n->is_MachCall() ) {
219 insert = false;
220 } else if ( n->is_MachCall() ) {
221 MachCallNode* call = n->as_MachCall();
222 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
223 call->entry_point() == OptoRuntime::new_array_Java() ||
224 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
225 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
226 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
227 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
228 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
229 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
230 ) {
231 insert = false;
232 }
233 }
234 if (insert) {
235 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
236 b->_nodes.insert( j, zap );
237 _cfg->_bbs.map( zap->_idx, b );
238 ++j;
239 }
240 }
241 }
242 }
243 }
246 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
247 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
248 CallStaticJavaNode* ideal_node =
249 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
250 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
251 "call zap dead locals stub", 0, TypePtr::BOTTOM);
252 // We need to copy the OopMap from the site we're zapping at.
253 // We have to make a copy, because the zap site might not be
254 // a call site, and zap_dead is a call site.
255 OopMap* clone = node_to_check->oop_map()->deep_copy();
257 // Add the cloned OopMap to the zap node
258 ideal_node->set_oop_map(clone);
259 return _matcher->match_sfpt(ideal_node);
260 }
262 //------------------------------is_node_getting_a_safepoint--------------------
263 bool Compile::is_node_getting_a_safepoint( Node* n) {
264 // This code duplicates the logic prior to the call of add_safepoint
265 // below in this file.
266 if( n->is_MachSafePoint() ) return true;
267 return false;
268 }
270 # endif // ENABLE_ZAP_DEAD_LOCALS
272 //------------------------------compute_loop_first_inst_sizes------------------
273 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top
274 // of a loop. When aligning a loop we need to provide enough instructions
275 // in cpu's fetch buffer to feed decoders. The loop alignment could be
276 // avoided if we have enough instructions in fetch buffer at the head of a loop.
277 // By default, the size is set to 999999 by Block's constructor so that
278 // a loop will be aligned if the size is not reset here.
279 //
280 // Note: Mach instructions could contain several HW instructions
281 // so the size is estimated only.
282 //
283 void Compile::compute_loop_first_inst_sizes() {
284 // The next condition is used to gate the loop alignment optimization.
285 // Don't aligned a loop if there are enough instructions at the head of a loop
286 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
287 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
288 // equal to 11 bytes which is the largest address NOP instruction.
289 if( MaxLoopPad < OptoLoopAlignment-1 ) {
290 uint last_block = _cfg->_num_blocks-1;
291 for( uint i=1; i <= last_block; i++ ) {
292 Block *b = _cfg->_blocks[i];
293 // Check the first loop's block which requires an alignment.
294 if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) {
295 uint sum_size = 0;
296 uint inst_cnt = NumberOfLoopInstrToAlign;
297 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
299 // Check subsequent fallthrough blocks if the loop's first
300 // block(s) does not have enough instructions.
301 Block *nb = b;
302 while( inst_cnt > 0 &&
303 i < last_block &&
304 !_cfg->_blocks[i+1]->has_loop_alignment() &&
305 !nb->has_successor(b) ) {
306 i++;
307 nb = _cfg->_blocks[i];
308 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
309 } // while( inst_cnt > 0 && i < last_block )
311 b->set_first_inst_size(sum_size);
312 } // f( b->head()->is_Loop() )
313 } // for( i <= last_block )
314 } // if( MaxLoopPad < OptoLoopAlignment-1 )
315 }
317 //----------------------Shorten_branches---------------------------------------
318 // The architecture description provides short branch variants for some long
319 // branch instructions. Replace eligible long branches with short branches.
320 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
322 // fill in the nop array for bundling computations
323 MachNode *_nop_list[Bundle::_nop_count];
324 Bundle::initialize_nops(_nop_list, this);
326 // ------------------
327 // Compute size of each block, method size, and relocation information size
328 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
329 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
330 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
331 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
332 blk_starts[0] = 0;
334 // Initialize the sizes to 0
335 code_size = 0; // Size in bytes of generated code
336 stub_size = 0; // Size in bytes of all stub entries
337 // Size in bytes of all relocation entries, including those in local stubs.
338 // Start with 2-bytes of reloc info for the unvalidated entry point
339 reloc_size = 1; // Number of relocation entries
340 const_size = 0; // size of fp constants in words
342 // Make three passes. The first computes pessimistic blk_starts,
343 // relative jmp_end, reloc_size and const_size information.
344 // The second performs short branch substitution using the pessimistic
345 // sizing. The third inserts nops where needed.
347 Node *nj; // tmp
349 // Step one, perform a pessimistic sizing pass.
350 uint i;
351 uint min_offset_from_last_call = 1; // init to a positive value
352 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
353 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
354 Block *b = _cfg->_blocks[i];
356 // Sum all instruction sizes to compute block size
357 uint last_inst = b->_nodes.size();
358 uint blk_size = 0;
359 for( uint j = 0; j<last_inst; j++ ) {
360 nj = b->_nodes[j];
361 uint inst_size = nj->size(_regalloc);
362 blk_size += inst_size;
363 // Handle machine instruction nodes
364 if( nj->is_Mach() ) {
365 MachNode *mach = nj->as_Mach();
366 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
367 reloc_size += mach->reloc();
368 const_size += mach->const_size();
369 if( mach->is_MachCall() ) {
370 MachCallNode *mcall = mach->as_MachCall();
371 // This destination address is NOT PC-relative
373 mcall->method_set((intptr_t)mcall->entry_point());
375 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
376 stub_size += size_java_to_interp();
377 reloc_size += reloc_java_to_interp();
378 }
379 } else if (mach->is_MachSafePoint()) {
380 // If call/safepoint are adjacent, account for possible
381 // nop to disambiguate the two safepoints.
382 if (min_offset_from_last_call == 0) {
383 blk_size += nop_size;
384 }
385 }
386 }
387 min_offset_from_last_call += inst_size;
388 // Remember end of call offset
389 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
390 min_offset_from_last_call = 0;
391 }
392 }
394 // During short branch replacement, we store the relative (to blk_starts)
395 // end of jump in jmp_end, rather than the absolute end of jump. This
396 // is so that we do not need to recompute sizes of all nodes when we compute
397 // correct blk_starts in our next sizing pass.
398 jmp_end[i] = blk_size;
399 DEBUG_ONLY( jmp_target[i] = 0; )
401 // When the next block starts a loop, we may insert pad NOP
402 // instructions. Since we cannot know our future alignment,
403 // assume the worst.
404 if( i<_cfg->_num_blocks-1 ) {
405 Block *nb = _cfg->_blocks[i+1];
406 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
407 if( max_loop_pad > 0 ) {
408 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
409 blk_size += max_loop_pad;
410 }
411 }
413 // Save block size; update total method size
414 blk_starts[i+1] = blk_starts[i]+blk_size;
415 }
417 // Step two, replace eligible long jumps.
419 // Note: this will only get the long branches within short branch
420 // range. Another pass might detect more branches that became
421 // candidates because the shortening in the first pass exposed
422 // more opportunities. Unfortunately, this would require
423 // recomputing the starting and ending positions for the blocks
424 for( i=0; i<_cfg->_num_blocks; i++ ) {
425 Block *b = _cfg->_blocks[i];
427 int j;
428 // Find the branch; ignore trailing NOPs.
429 for( j = b->_nodes.size()-1; j>=0; j-- ) {
430 nj = b->_nodes[j];
431 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
432 break;
433 }
435 if (j >= 0) {
436 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
437 MachNode *mach = nj->as_Mach();
438 // This requires the TRUE branch target be in succs[0]
439 uint bnum = b->non_connector_successor(0)->_pre_order;
440 uintptr_t target = blk_starts[bnum];
441 if( mach->is_pc_relative() ) {
442 int offset = target-(blk_starts[i] + jmp_end[i]);
443 if (_matcher->is_short_branch_offset(mach->rule(), offset)) {
444 // We've got a winner. Replace this branch.
445 MachNode* replacement = mach->short_branch_version(this);
446 b->_nodes.map(j, replacement);
447 mach->subsume_by(replacement);
449 // Update the jmp_end size to save time in our
450 // next pass.
451 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
452 DEBUG_ONLY( jmp_target[i] = bnum; );
453 DEBUG_ONLY( jmp_rule[i] = mach->rule(); );
454 }
455 } else {
456 #ifndef PRODUCT
457 mach->dump(3);
458 #endif
459 Unimplemented();
460 }
461 }
462 }
463 }
465 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
466 // of a loop. It is used to determine the padding for loop alignment.
467 compute_loop_first_inst_sizes();
469 // Step 3, compute the offsets of all the labels
470 uint last_call_adr = max_uint;
471 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
472 // copy the offset of the beginning to the corresponding label
473 assert(labels[i].is_unused(), "cannot patch at this point");
474 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
476 // insert padding for any instructions that need it
477 Block *b = _cfg->_blocks[i];
478 uint last_inst = b->_nodes.size();
479 uint adr = blk_starts[i];
480 for( uint j = 0; j<last_inst; j++ ) {
481 nj = b->_nodes[j];
482 if( nj->is_Mach() ) {
483 int padding = nj->as_Mach()->compute_padding(adr);
484 // If call/safepoint are adjacent insert a nop (5010568)
485 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
486 adr == last_call_adr ) {
487 padding = nop_size;
488 }
489 if(padding > 0) {
490 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
491 int nops_cnt = padding / nop_size;
492 MachNode *nop = new (this) MachNopNode(nops_cnt);
493 b->_nodes.insert(j++, nop);
494 _cfg->_bbs.map( nop->_idx, b );
495 adr += padding;
496 last_inst++;
497 }
498 }
499 adr += nj->size(_regalloc);
501 // Remember end of call offset
502 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
503 last_call_adr = adr;
504 }
505 }
507 if ( i != _cfg->_num_blocks-1) {
508 // Get the size of the block
509 uint blk_size = adr - blk_starts[i];
511 // When the next block is the top of a loop, we may insert pad NOP
512 // instructions.
513 Block *nb = _cfg->_blocks[i+1];
514 int current_offset = blk_starts[i] + blk_size;
515 current_offset += nb->alignment_padding(current_offset);
516 // Save block size; update total method size
517 blk_starts[i+1] = current_offset;
518 }
519 }
521 #ifdef ASSERT
522 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
523 if( jmp_target[i] != 0 ) {
524 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
525 if (!_matcher->is_short_branch_offset(jmp_rule[i], offset)) {
526 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
527 }
528 assert(_matcher->is_short_branch_offset(jmp_rule[i], offset), "Displacement too large for short jmp");
529 }
530 }
531 #endif
533 // ------------------
534 // Compute size for code buffer
535 code_size = blk_starts[i-1] + jmp_end[i-1];
537 // Relocation records
538 reloc_size += 1; // Relo entry for exception handler
540 // Adjust reloc_size to number of record of relocation info
541 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
542 // a relocation index.
543 // The CodeBuffer will expand the locs array if this estimate is too low.
544 reloc_size *= 10 / sizeof(relocInfo);
546 // Adjust const_size to number of bytes
547 const_size *= 2*jintSize; // both float and double take two words per entry
549 }
551 //------------------------------FillLocArray-----------------------------------
552 // Create a bit of debug info and append it to the array. The mapping is from
553 // Java local or expression stack to constant, register or stack-slot. For
554 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
555 // entry has been taken care of and caller should skip it).
556 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
557 // This should never have accepted Bad before
558 assert(OptoReg::is_valid(regnum), "location must be valid");
559 return (OptoReg::is_reg(regnum))
560 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
561 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
562 }
565 ObjectValue*
566 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
567 for (int i = 0; i < objs->length(); i++) {
568 assert(objs->at(i)->is_object(), "corrupt object cache");
569 ObjectValue* sv = (ObjectValue*) objs->at(i);
570 if (sv->id() == id) {
571 return sv;
572 }
573 }
574 // Otherwise..
575 return NULL;
576 }
578 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
579 ObjectValue* sv ) {
580 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
581 objs->append(sv);
582 }
585 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
586 GrowableArray<ScopeValue*> *array,
587 GrowableArray<ScopeValue*> *objs ) {
588 assert( local, "use _top instead of null" );
589 if (array->length() != idx) {
590 assert(array->length() == idx + 1, "Unexpected array count");
591 // Old functionality:
592 // return
593 // New functionality:
594 // Assert if the local is not top. In product mode let the new node
595 // override the old entry.
596 assert(local == top(), "LocArray collision");
597 if (local == top()) {
598 return;
599 }
600 array->pop();
601 }
602 const Type *t = local->bottom_type();
604 // Is it a safepoint scalar object node?
605 if (local->is_SafePointScalarObject()) {
606 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
608 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
609 if (sv == NULL) {
610 ciKlass* cik = t->is_oopptr()->klass();
611 assert(cik->is_instance_klass() ||
612 cik->is_array_klass(), "Not supported allocation.");
613 sv = new ObjectValue(spobj->_idx,
614 new ConstantOopWriteValue(cik->constant_encoding()));
615 Compile::set_sv_for_object_node(objs, sv);
617 uint first_ind = spobj->first_index();
618 for (uint i = 0; i < spobj->n_fields(); i++) {
619 Node* fld_node = sfpt->in(first_ind+i);
620 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
621 }
622 }
623 array->append(sv);
624 return;
625 }
627 // Grab the register number for the local
628 OptoReg::Name regnum = _regalloc->get_reg_first(local);
629 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
630 // Record the double as two float registers.
631 // The register mask for such a value always specifies two adjacent
632 // float registers, with the lower register number even.
633 // Normally, the allocation of high and low words to these registers
634 // is irrelevant, because nearly all operations on register pairs
635 // (e.g., StoreD) treat them as a single unit.
636 // Here, we assume in addition that the words in these two registers
637 // stored "naturally" (by operations like StoreD and double stores
638 // within the interpreter) such that the lower-numbered register
639 // is written to the lower memory address. This may seem like
640 // a machine dependency, but it is not--it is a requirement on
641 // the author of the <arch>.ad file to ensure that, for every
642 // even/odd double-register pair to which a double may be allocated,
643 // the word in the even single-register is stored to the first
644 // memory word. (Note that register numbers are completely
645 // arbitrary, and are not tied to any machine-level encodings.)
646 #ifdef _LP64
647 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
648 array->append(new ConstantIntValue(0));
649 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
650 } else if ( t->base() == Type::Long ) {
651 array->append(new ConstantIntValue(0));
652 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
653 } else if ( t->base() == Type::RawPtr ) {
654 // jsr/ret return address which must be restored into a the full
655 // width 64-bit stack slot.
656 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
657 }
658 #else //_LP64
659 #ifdef SPARC
660 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
661 // For SPARC we have to swap high and low words for
662 // long values stored in a single-register (g0-g7).
663 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
664 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
665 } else
666 #endif //SPARC
667 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
668 // Repack the double/long as two jints.
669 // The convention the interpreter uses is that the second local
670 // holds the first raw word of the native double representation.
671 // This is actually reasonable, since locals and stack arrays
672 // grow downwards in all implementations.
673 // (If, on some machine, the interpreter's Java locals or stack
674 // were to grow upwards, the embedded doubles would be word-swapped.)
675 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
676 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
677 }
678 #endif //_LP64
679 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
680 OptoReg::is_reg(regnum) ) {
681 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
682 ? Location::float_in_dbl : Location::normal ));
683 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
684 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
685 ? Location::int_in_long : Location::normal ));
686 } else if( t->base() == Type::NarrowOop ) {
687 array->append(new_loc_value( _regalloc, regnum, Location::narrowoop ));
688 } else {
689 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
690 }
691 return;
692 }
694 // No register. It must be constant data.
695 switch (t->base()) {
696 case Type::Half: // Second half of a double
697 ShouldNotReachHere(); // Caller should skip 2nd halves
698 break;
699 case Type::AnyPtr:
700 array->append(new ConstantOopWriteValue(NULL));
701 break;
702 case Type::AryPtr:
703 case Type::InstPtr:
704 case Type::KlassPtr: // fall through
705 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding()));
706 break;
707 case Type::NarrowOop:
708 if (t == TypeNarrowOop::NULL_PTR) {
709 array->append(new ConstantOopWriteValue(NULL));
710 } else {
711 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding()));
712 }
713 break;
714 case Type::Int:
715 array->append(new ConstantIntValue(t->is_int()->get_con()));
716 break;
717 case Type::RawPtr:
718 // A return address (T_ADDRESS).
719 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
720 #ifdef _LP64
721 // Must be restored to the full-width 64-bit stack slot.
722 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
723 #else
724 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
725 #endif
726 break;
727 case Type::FloatCon: {
728 float f = t->is_float_constant()->getf();
729 array->append(new ConstantIntValue(jint_cast(f)));
730 break;
731 }
732 case Type::DoubleCon: {
733 jdouble d = t->is_double_constant()->getd();
734 #ifdef _LP64
735 array->append(new ConstantIntValue(0));
736 array->append(new ConstantDoubleValue(d));
737 #else
738 // Repack the double as two jints.
739 // The convention the interpreter uses is that the second local
740 // holds the first raw word of the native double representation.
741 // This is actually reasonable, since locals and stack arrays
742 // grow downwards in all implementations.
743 // (If, on some machine, the interpreter's Java locals or stack
744 // were to grow upwards, the embedded doubles would be word-swapped.)
745 jint *dp = (jint*)&d;
746 array->append(new ConstantIntValue(dp[1]));
747 array->append(new ConstantIntValue(dp[0]));
748 #endif
749 break;
750 }
751 case Type::Long: {
752 jlong d = t->is_long()->get_con();
753 #ifdef _LP64
754 array->append(new ConstantIntValue(0));
755 array->append(new ConstantLongValue(d));
756 #else
757 // Repack the long as two jints.
758 // The convention the interpreter uses is that the second local
759 // holds the first raw word of the native double representation.
760 // This is actually reasonable, since locals and stack arrays
761 // grow downwards in all implementations.
762 // (If, on some machine, the interpreter's Java locals or stack
763 // were to grow upwards, the embedded doubles would be word-swapped.)
764 jint *dp = (jint*)&d;
765 array->append(new ConstantIntValue(dp[1]));
766 array->append(new ConstantIntValue(dp[0]));
767 #endif
768 break;
769 }
770 case Type::Top: // Add an illegal value here
771 array->append(new LocationValue(Location()));
772 break;
773 default:
774 ShouldNotReachHere();
775 break;
776 }
777 }
779 // Determine if this node starts a bundle
780 bool Compile::starts_bundle(const Node *n) const {
781 return (_node_bundling_limit > n->_idx &&
782 _node_bundling_base[n->_idx].starts_bundle());
783 }
785 //--------------------------Process_OopMap_Node--------------------------------
786 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
788 // Handle special safepoint nodes for synchronization
789 MachSafePointNode *sfn = mach->as_MachSafePoint();
790 MachCallNode *mcall;
792 #ifdef ENABLE_ZAP_DEAD_LOCALS
793 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
794 #endif
796 int safepoint_pc_offset = current_offset;
798 // Add the safepoint in the DebugInfoRecorder
799 if( !mach->is_MachCall() ) {
800 mcall = NULL;
801 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
802 } else {
803 mcall = mach->as_MachCall();
804 safepoint_pc_offset += mcall->ret_addr_offset();
805 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
806 }
808 // Loop over the JVMState list to add scope information
809 // Do not skip safepoints with a NULL method, they need monitor info
810 JVMState* youngest_jvms = sfn->jvms();
811 int max_depth = youngest_jvms->depth();
813 // Allocate the object pool for scalar-replaced objects -- the map from
814 // small-integer keys (which can be recorded in the local and ostack
815 // arrays) to descriptions of the object state.
816 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
818 // Visit scopes from oldest to youngest.
819 for (int depth = 1; depth <= max_depth; depth++) {
820 JVMState* jvms = youngest_jvms->of_depth(depth);
821 int idx;
822 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
823 // Safepoints that do not have method() set only provide oop-map and monitor info
824 // to support GC; these do not support deoptimization.
825 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
826 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
827 int num_mon = jvms->nof_monitors();
828 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
829 "JVMS local count must match that of the method");
831 // Add Local and Expression Stack Information
833 // Insert locals into the locarray
834 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
835 for( idx = 0; idx < num_locs; idx++ ) {
836 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
837 }
839 // Insert expression stack entries into the exparray
840 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
841 for( idx = 0; idx < num_exps; idx++ ) {
842 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
843 }
845 // Add in mappings of the monitors
846 assert( !method ||
847 !method->is_synchronized() ||
848 method->is_native() ||
849 num_mon > 0 ||
850 !GenerateSynchronizationCode,
851 "monitors must always exist for synchronized methods");
853 // Build the growable array of ScopeValues for exp stack
854 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
856 // Loop over monitors and insert into array
857 for(idx = 0; idx < num_mon; idx++) {
858 // Grab the node that defines this monitor
859 Node* box_node = sfn->monitor_box(jvms, idx);
860 Node* obj_node = sfn->monitor_obj(jvms, idx);
862 // Create ScopeValue for object
863 ScopeValue *scval = NULL;
865 if( obj_node->is_SafePointScalarObject() ) {
866 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
867 scval = Compile::sv_for_node_id(objs, spobj->_idx);
868 if (scval == NULL) {
869 const Type *t = obj_node->bottom_type();
870 ciKlass* cik = t->is_oopptr()->klass();
871 assert(cik->is_instance_klass() ||
872 cik->is_array_klass(), "Not supported allocation.");
873 ObjectValue* sv = new ObjectValue(spobj->_idx,
874 new ConstantOopWriteValue(cik->constant_encoding()));
875 Compile::set_sv_for_object_node(objs, sv);
877 uint first_ind = spobj->first_index();
878 for (uint i = 0; i < spobj->n_fields(); i++) {
879 Node* fld_node = sfn->in(first_ind+i);
880 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
881 }
882 scval = sv;
883 }
884 } else if( !obj_node->is_Con() ) {
885 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
886 if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
887 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
888 } else {
889 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
890 }
891 } else {
892 const TypePtr *tp = obj_node->bottom_type()->make_ptr();
893 scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->constant_encoding());
894 }
896 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
897 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
898 while( !box_node->is_BoxLock() ) box_node = box_node->in(1);
899 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
900 }
902 // We dump the object pool first, since deoptimization reads it in first.
903 debug_info()->dump_object_pool(objs);
905 // Build first class objects to pass to scope
906 DebugToken *locvals = debug_info()->create_scope_values(locarray);
907 DebugToken *expvals = debug_info()->create_scope_values(exparray);
908 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
910 // Make method available for all Safepoints
911 ciMethod* scope_method = method ? method : _method;
912 // Describe the scope here
913 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
914 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
915 // Now we can describe the scope.
916 debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),jvms->should_reexecute(),locvals,expvals,monvals);
917 } // End jvms loop
919 // Mark the end of the scope set.
920 debug_info()->end_safepoint(safepoint_pc_offset);
921 }
925 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
926 class NonSafepointEmitter {
927 Compile* C;
928 JVMState* _pending_jvms;
929 int _pending_offset;
931 void emit_non_safepoint();
933 public:
934 NonSafepointEmitter(Compile* compile) {
935 this->C = compile;
936 _pending_jvms = NULL;
937 _pending_offset = 0;
938 }
940 void observe_instruction(Node* n, int pc_offset) {
941 if (!C->debug_info()->recording_non_safepoints()) return;
943 Node_Notes* nn = C->node_notes_at(n->_idx);
944 if (nn == NULL || nn->jvms() == NULL) return;
945 if (_pending_jvms != NULL &&
946 _pending_jvms->same_calls_as(nn->jvms())) {
947 // Repeated JVMS? Stretch it up here.
948 _pending_offset = pc_offset;
949 } else {
950 if (_pending_jvms != NULL &&
951 _pending_offset < pc_offset) {
952 emit_non_safepoint();
953 }
954 _pending_jvms = NULL;
955 if (pc_offset > C->debug_info()->last_pc_offset()) {
956 // This is the only way _pending_jvms can become non-NULL:
957 _pending_jvms = nn->jvms();
958 _pending_offset = pc_offset;
959 }
960 }
961 }
963 // Stay out of the way of real safepoints:
964 void observe_safepoint(JVMState* jvms, int pc_offset) {
965 if (_pending_jvms != NULL &&
966 !_pending_jvms->same_calls_as(jvms) &&
967 _pending_offset < pc_offset) {
968 emit_non_safepoint();
969 }
970 _pending_jvms = NULL;
971 }
973 void flush_at_end() {
974 if (_pending_jvms != NULL) {
975 emit_non_safepoint();
976 }
977 _pending_jvms = NULL;
978 }
979 };
981 void NonSafepointEmitter::emit_non_safepoint() {
982 JVMState* youngest_jvms = _pending_jvms;
983 int pc_offset = _pending_offset;
985 // Clear it now:
986 _pending_jvms = NULL;
988 DebugInformationRecorder* debug_info = C->debug_info();
989 assert(debug_info->recording_non_safepoints(), "sanity");
991 debug_info->add_non_safepoint(pc_offset);
992 int max_depth = youngest_jvms->depth();
994 // Visit scopes from oldest to youngest.
995 for (int depth = 1; depth <= max_depth; depth++) {
996 JVMState* jvms = youngest_jvms->of_depth(depth);
997 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
998 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
999 debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute());
1000 }
1002 // Mark the end of the scope set.
1003 debug_info->end_non_safepoint(pc_offset);
1004 }
1008 // helper for Fill_buffer bailout logic
1009 static void turn_off_compiler(Compile* C) {
1010 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
1011 // Do not turn off compilation if a single giant method has
1012 // blown the code cache size.
1013 C->record_failure("excessive request to CodeCache");
1014 } else {
1015 // Let CompilerBroker disable further compilations.
1016 C->record_failure("CodeCache is full");
1017 }
1018 }
1021 //------------------------------Fill_buffer------------------------------------
1022 void Compile::Fill_buffer() {
1024 // Set the initially allocated size
1025 int code_req = initial_code_capacity;
1026 int locs_req = initial_locs_capacity;
1027 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1028 int const_req = initial_const_capacity;
1029 bool labels_not_set = true;
1031 int pad_req = NativeCall::instruction_size;
1032 // The extra spacing after the code is necessary on some platforms.
1033 // Sometimes we need to patch in a jump after the last instruction,
1034 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1036 uint i;
1037 // Compute the byte offset where we can store the deopt pc.
1038 if (fixed_slots() != 0) {
1039 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1040 }
1042 // Compute prolog code size
1043 _method_size = 0;
1044 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1045 #ifdef IA64
1046 if (save_argument_registers()) {
1047 // 4815101: this is a stub with implicit and unknown precision fp args.
1048 // The usual spill mechanism can only generate stfd's in this case, which
1049 // doesn't work if the fp reg to spill contains a single-precision denorm.
1050 // Instead, we hack around the normal spill mechanism using stfspill's and
1051 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1052 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1053 //
1054 // If we ever implement 16-byte 'registers' == stack slots, we can
1055 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1056 // instead of stfd/stfs/ldfd/ldfs.
1057 _frame_slots += 8*(16/BytesPerInt);
1058 }
1059 #endif
1060 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1062 // Create an array of unused labels, one for each basic block
1063 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1065 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1066 blk_labels[i].init();
1067 }
1069 // If this machine supports different size branch offsets, then pre-compute
1070 // the length of the blocks
1071 if( _matcher->is_short_branch_offset(-1, 0) ) {
1072 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1073 labels_not_set = false;
1074 }
1076 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1077 int exception_handler_req = size_exception_handler();
1078 int deopt_handler_req = size_deopt_handler();
1079 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1080 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1081 stub_req += MAX_stubs_size; // ensure per-stub margin
1082 code_req += MAX_inst_size; // ensure per-instruction margin
1083 if (StressCodeBuffers)
1084 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1085 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1086 CodeBuffer* cb = code_buffer();
1087 cb->initialize(total_req, locs_req);
1089 // Have we run out of code space?
1090 if (cb->blob() == NULL) {
1091 turn_off_compiler(this);
1092 return;
1093 }
1094 // Configure the code buffer.
1095 cb->initialize_consts_size(const_req);
1096 cb->initialize_stubs_size(stub_req);
1097 cb->initialize_oop_recorder(env()->oop_recorder());
1099 // fill in the nop array for bundling computations
1100 MachNode *_nop_list[Bundle::_nop_count];
1101 Bundle::initialize_nops(_nop_list, this);
1103 // Create oopmap set.
1104 _oop_map_set = new OopMapSet();
1106 // !!!!! This preserves old handling of oopmaps for now
1107 debug_info()->set_oopmaps(_oop_map_set);
1109 // Count and start of implicit null check instructions
1110 uint inct_cnt = 0;
1111 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1113 // Count and start of calls
1114 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1116 uint return_offset = 0;
1117 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1119 int previous_offset = 0;
1120 int current_offset = 0;
1121 int last_call_offset = -1;
1123 // Create an array of unused labels, one for each basic block, if printing is enabled
1124 #ifndef PRODUCT
1125 int *node_offsets = NULL;
1126 uint node_offset_limit = unique();
1129 if ( print_assembly() )
1130 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1131 #endif
1133 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1135 // ------------------
1136 // Now fill in the code buffer
1137 Node *delay_slot = NULL;
1139 for( i=0; i < _cfg->_num_blocks; i++ ) {
1140 Block *b = _cfg->_blocks[i];
1142 Node *head = b->head();
1144 // If this block needs to start aligned (i.e, can be reached other
1145 // than by falling-thru from the previous block), then force the
1146 // start of a new bundle.
1147 if( Pipeline::requires_bundling() && starts_bundle(head) )
1148 cb->flush_bundle(true);
1150 // Define the label at the beginning of the basic block
1151 if( labels_not_set )
1152 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1154 else
1155 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1156 "label position does not match code offset" );
1158 uint last_inst = b->_nodes.size();
1160 // Emit block normally, except for last instruction.
1161 // Emit means "dump code bits into code buffer".
1162 for( uint j = 0; j<last_inst; j++ ) {
1164 // Get the node
1165 Node* n = b->_nodes[j];
1167 // See if delay slots are supported
1168 if (valid_bundle_info(n) &&
1169 node_bundling(n)->used_in_unconditional_delay()) {
1170 assert(delay_slot == NULL, "no use of delay slot node");
1171 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1173 delay_slot = n;
1174 continue;
1175 }
1177 // If this starts a new instruction group, then flush the current one
1178 // (but allow split bundles)
1179 if( Pipeline::requires_bundling() && starts_bundle(n) )
1180 cb->flush_bundle(false);
1182 // The following logic is duplicated in the code ifdeffed for
1183 // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It
1184 // should be factored out. Or maybe dispersed to the nodes?
1186 // Special handling for SafePoint/Call Nodes
1187 bool is_mcall = false;
1188 if( n->is_Mach() ) {
1189 MachNode *mach = n->as_Mach();
1190 is_mcall = n->is_MachCall();
1191 bool is_sfn = n->is_MachSafePoint();
1193 // If this requires all previous instructions be flushed, then do so
1194 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1195 cb->flush_bundle(true);
1196 current_offset = cb->code_size();
1197 }
1199 // align the instruction if necessary
1200 int padding = mach->compute_padding(current_offset);
1201 // Make sure safepoint node for polling is distinct from a call's
1202 // return by adding a nop if needed.
1203 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1204 padding = nop_size;
1205 }
1206 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1208 if(padding > 0) {
1209 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1210 int nops_cnt = padding / nop_size;
1211 MachNode *nop = new (this) MachNopNode(nops_cnt);
1212 b->_nodes.insert(j++, nop);
1213 last_inst++;
1214 _cfg->_bbs.map( nop->_idx, b );
1215 nop->emit(*cb, _regalloc);
1216 cb->flush_bundle(true);
1217 current_offset = cb->code_size();
1218 }
1220 // Remember the start of the last call in a basic block
1221 if (is_mcall) {
1222 MachCallNode *mcall = mach->as_MachCall();
1224 // This destination address is NOT PC-relative
1225 mcall->method_set((intptr_t)mcall->entry_point());
1227 // Save the return address
1228 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1230 if (!mcall->is_safepoint_node()) {
1231 is_mcall = false;
1232 is_sfn = false;
1233 }
1234 }
1236 // sfn will be valid whenever mcall is valid now because of inheritance
1237 if( is_sfn || is_mcall ) {
1239 // Handle special safepoint nodes for synchronization
1240 if( !is_mcall ) {
1241 MachSafePointNode *sfn = mach->as_MachSafePoint();
1242 // !!!!! Stubs only need an oopmap right now, so bail out
1243 if( sfn->jvms()->method() == NULL) {
1244 // Write the oopmap directly to the code blob??!!
1245 # ifdef ENABLE_ZAP_DEAD_LOCALS
1246 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1247 # endif
1248 continue;
1249 }
1250 } // End synchronization
1252 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1253 current_offset);
1254 Process_OopMap_Node(mach, current_offset);
1255 } // End if safepoint
1257 // If this is a null check, then add the start of the previous instruction to the list
1258 else if( mach->is_MachNullCheck() ) {
1259 inct_starts[inct_cnt++] = previous_offset;
1260 }
1262 // If this is a branch, then fill in the label with the target BB's label
1263 else if ( mach->is_Branch() ) {
1265 if ( mach->ideal_Opcode() == Op_Jump ) {
1266 for (uint h = 0; h < b->_num_succs; h++ ) {
1267 Block* succs_block = b->_succs[h];
1268 for (uint j = 1; j < succs_block->num_preds(); j++) {
1269 Node* jpn = succs_block->pred(j);
1270 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1271 uint block_num = succs_block->non_connector()->_pre_order;
1272 Label *blkLabel = &blk_labels[block_num];
1273 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1274 }
1275 }
1276 }
1277 } else {
1278 // For Branchs
1279 // This requires the TRUE branch target be in succs[0]
1280 uint block_num = b->non_connector_successor(0)->_pre_order;
1281 mach->label_set( blk_labels[block_num], block_num );
1282 }
1283 }
1285 #ifdef ASSERT
1286 // Check that oop-store precedes the card-mark
1287 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1288 uint storeCM_idx = j;
1289 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1290 assert( oop_store != NULL, "storeCM expects a precedence edge");
1291 uint i4;
1292 for( i4 = 0; i4 < last_inst; ++i4 ) {
1293 if( b->_nodes[i4] == oop_store ) break;
1294 }
1295 // Note: This test can provide a false failure if other precedence
1296 // edges have been added to the storeCMNode.
1297 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1298 }
1299 #endif
1301 else if( !n->is_Proj() ) {
1302 // Remember the beginning of the previous instruction, in case
1303 // it's followed by a flag-kill and a null-check. Happens on
1304 // Intel all the time, with add-to-memory kind of opcodes.
1305 previous_offset = current_offset;
1306 }
1307 }
1309 // Verify that there is sufficient space remaining
1310 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1311 if (cb->blob() == NULL) {
1312 turn_off_compiler(this);
1313 return;
1314 }
1316 // Save the offset for the listing
1317 #ifndef PRODUCT
1318 if( node_offsets && n->_idx < node_offset_limit )
1319 node_offsets[n->_idx] = cb->code_size();
1320 #endif
1322 // "Normal" instruction case
1323 n->emit(*cb, _regalloc);
1324 current_offset = cb->code_size();
1325 non_safepoints.observe_instruction(n, current_offset);
1327 // mcall is last "call" that can be a safepoint
1328 // record it so we can see if a poll will directly follow it
1329 // in which case we'll need a pad to make the PcDesc sites unique
1330 // see 5010568. This can be slightly inaccurate but conservative
1331 // in the case that return address is not actually at current_offset.
1332 // This is a small price to pay.
1334 if (is_mcall) {
1335 last_call_offset = current_offset;
1336 }
1338 // See if this instruction has a delay slot
1339 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1340 assert(delay_slot != NULL, "expecting delay slot node");
1342 // Back up 1 instruction
1343 cb->set_code_end(
1344 cb->code_end()-Pipeline::instr_unit_size());
1346 // Save the offset for the listing
1347 #ifndef PRODUCT
1348 if( node_offsets && delay_slot->_idx < node_offset_limit )
1349 node_offsets[delay_slot->_idx] = cb->code_size();
1350 #endif
1352 // Support a SafePoint in the delay slot
1353 if( delay_slot->is_MachSafePoint() ) {
1354 MachNode *mach = delay_slot->as_Mach();
1355 // !!!!! Stubs only need an oopmap right now, so bail out
1356 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1357 // Write the oopmap directly to the code blob??!!
1358 # ifdef ENABLE_ZAP_DEAD_LOCALS
1359 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1360 # endif
1361 delay_slot = NULL;
1362 continue;
1363 }
1365 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1366 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1367 adjusted_offset);
1368 // Generate an OopMap entry
1369 Process_OopMap_Node(mach, adjusted_offset);
1370 }
1372 // Insert the delay slot instruction
1373 delay_slot->emit(*cb, _regalloc);
1375 // Don't reuse it
1376 delay_slot = NULL;
1377 }
1379 } // End for all instructions in block
1381 // If the next block is the top of a loop, pad this block out to align
1382 // the loop top a little. Helps prevent pipe stalls at loop back branches.
1383 if( i<_cfg->_num_blocks-1 ) {
1384 Block *nb = _cfg->_blocks[i+1];
1385 uint padding = nb->alignment_padding(current_offset);
1386 if( padding > 0 ) {
1387 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1388 b->_nodes.insert( b->_nodes.size(), nop );
1389 _cfg->_bbs.map( nop->_idx, b );
1390 nop->emit(*cb, _regalloc);
1391 current_offset = cb->code_size();
1392 }
1393 }
1395 } // End of for all blocks
1397 non_safepoints.flush_at_end();
1399 // Offset too large?
1400 if (failing()) return;
1402 // Define a pseudo-label at the end of the code
1403 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1405 // Compute the size of the first block
1406 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1408 assert(cb->code_size() < 500000, "method is unreasonably large");
1410 // ------------------
1412 #ifndef PRODUCT
1413 // Information on the size of the method, without the extraneous code
1414 Scheduling::increment_method_size(cb->code_size());
1415 #endif
1417 // ------------------
1418 // Fill in exception table entries.
1419 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1421 // Only java methods have exception handlers and deopt handlers
1422 if (_method) {
1423 // Emit the exception handler code.
1424 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1425 // Emit the deopt handler code.
1426 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1427 }
1429 // One last check for failed CodeBuffer::expand:
1430 if (cb->blob() == NULL) {
1431 turn_off_compiler(this);
1432 return;
1433 }
1435 #ifndef PRODUCT
1436 // Dump the assembly code, including basic-block numbers
1437 if (print_assembly()) {
1438 ttyLocker ttyl; // keep the following output all in one block
1439 if (!VMThread::should_terminate()) { // test this under the tty lock
1440 // This output goes directly to the tty, not the compiler log.
1441 // To enable tools to match it up with the compilation activity,
1442 // be sure to tag this tty output with the compile ID.
1443 if (xtty != NULL) {
1444 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1445 is_osr_compilation() ? " compile_kind='osr'" :
1446 "");
1447 }
1448 if (method() != NULL) {
1449 method()->print_oop();
1450 print_codes();
1451 }
1452 dump_asm(node_offsets, node_offset_limit);
1453 if (xtty != NULL) {
1454 xtty->tail("opto_assembly");
1455 }
1456 }
1457 }
1458 #endif
1460 }
1462 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1463 _inc_table.set_size(cnt);
1465 uint inct_cnt = 0;
1466 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1467 Block *b = _cfg->_blocks[i];
1468 Node *n = NULL;
1469 int j;
1471 // Find the branch; ignore trailing NOPs.
1472 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1473 n = b->_nodes[j];
1474 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1475 break;
1476 }
1478 // If we didn't find anything, continue
1479 if( j < 0 ) continue;
1481 // Compute ExceptionHandlerTable subtable entry and add it
1482 // (skip empty blocks)
1483 if( n->is_Catch() ) {
1485 // Get the offset of the return from the call
1486 uint call_return = call_returns[b->_pre_order];
1487 #ifdef ASSERT
1488 assert( call_return > 0, "no call seen for this basic block" );
1489 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1490 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1491 #endif
1492 // last instruction is a CatchNode, find it's CatchProjNodes
1493 int nof_succs = b->_num_succs;
1494 // allocate space
1495 GrowableArray<intptr_t> handler_bcis(nof_succs);
1496 GrowableArray<intptr_t> handler_pcos(nof_succs);
1497 // iterate through all successors
1498 for (int j = 0; j < nof_succs; j++) {
1499 Block* s = b->_succs[j];
1500 bool found_p = false;
1501 for( uint k = 1; k < s->num_preds(); k++ ) {
1502 Node *pk = s->pred(k);
1503 if( pk->is_CatchProj() && pk->in(0) == n ) {
1504 const CatchProjNode* p = pk->as_CatchProj();
1505 found_p = true;
1506 // add the corresponding handler bci & pco information
1507 if( p->_con != CatchProjNode::fall_through_index ) {
1508 // p leads to an exception handler (and is not fall through)
1509 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1510 // no duplicates, please
1511 if( !handler_bcis.contains(p->handler_bci()) ) {
1512 uint block_num = s->non_connector()->_pre_order;
1513 handler_bcis.append(p->handler_bci());
1514 handler_pcos.append(blk_labels[block_num].loc_pos());
1515 }
1516 }
1517 }
1518 }
1519 assert(found_p, "no matching predecessor found");
1520 // Note: Due to empty block removal, one block may have
1521 // several CatchProj inputs, from the same Catch.
1522 }
1524 // Set the offset of the return from the call
1525 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1526 continue;
1527 }
1529 // Handle implicit null exception table updates
1530 if( n->is_MachNullCheck() ) {
1531 uint block_num = b->non_connector_successor(0)->_pre_order;
1532 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1533 continue;
1534 }
1535 } // End of for all blocks fill in exception table entries
1536 }
1538 // Static Variables
1539 #ifndef PRODUCT
1540 uint Scheduling::_total_nop_size = 0;
1541 uint Scheduling::_total_method_size = 0;
1542 uint Scheduling::_total_branches = 0;
1543 uint Scheduling::_total_unconditional_delays = 0;
1544 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1545 #endif
1547 // Initializer for class Scheduling
1549 Scheduling::Scheduling(Arena *arena, Compile &compile)
1550 : _arena(arena),
1551 _cfg(compile.cfg()),
1552 _bbs(compile.cfg()->_bbs),
1553 _regalloc(compile.regalloc()),
1554 _reg_node(arena),
1555 _bundle_instr_count(0),
1556 _bundle_cycle_number(0),
1557 _scheduled(arena),
1558 _available(arena),
1559 _next_node(NULL),
1560 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1561 _pinch_free_list(arena)
1562 #ifndef PRODUCT
1563 , _branches(0)
1564 , _unconditional_delays(0)
1565 #endif
1566 {
1567 // Create a MachNopNode
1568 _nop = new (&compile) MachNopNode();
1570 // Now that the nops are in the array, save the count
1571 // (but allow entries for the nops)
1572 _node_bundling_limit = compile.unique();
1573 uint node_max = _regalloc->node_regs_max_index();
1575 compile.set_node_bundling_limit(_node_bundling_limit);
1577 // This one is persistent within the Compile class
1578 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1580 // Allocate space for fixed-size arrays
1581 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1582 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1583 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1585 // Clear the arrays
1586 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1587 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1588 memset(_uses, 0, node_max * sizeof(short));
1589 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1591 // Clear the bundling information
1592 memcpy(_bundle_use_elements,
1593 Pipeline_Use::elaborated_elements,
1594 sizeof(Pipeline_Use::elaborated_elements));
1596 // Get the last node
1597 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1599 _next_node = bb->_nodes[bb->_nodes.size()-1];
1600 }
1602 #ifndef PRODUCT
1603 // Scheduling destructor
1604 Scheduling::~Scheduling() {
1605 _total_branches += _branches;
1606 _total_unconditional_delays += _unconditional_delays;
1607 }
1608 #endif
1610 // Step ahead "i" cycles
1611 void Scheduling::step(uint i) {
1613 Bundle *bundle = node_bundling(_next_node);
1614 bundle->set_starts_bundle();
1616 // Update the bundle record, but leave the flags information alone
1617 if (_bundle_instr_count > 0) {
1618 bundle->set_instr_count(_bundle_instr_count);
1619 bundle->set_resources_used(_bundle_use.resourcesUsed());
1620 }
1622 // Update the state information
1623 _bundle_instr_count = 0;
1624 _bundle_cycle_number += i;
1625 _bundle_use.step(i);
1626 }
1628 void Scheduling::step_and_clear() {
1629 Bundle *bundle = node_bundling(_next_node);
1630 bundle->set_starts_bundle();
1632 // Update the bundle record
1633 if (_bundle_instr_count > 0) {
1634 bundle->set_instr_count(_bundle_instr_count);
1635 bundle->set_resources_used(_bundle_use.resourcesUsed());
1637 _bundle_cycle_number += 1;
1638 }
1640 // Clear the bundling information
1641 _bundle_instr_count = 0;
1642 _bundle_use.reset();
1644 memcpy(_bundle_use_elements,
1645 Pipeline_Use::elaborated_elements,
1646 sizeof(Pipeline_Use::elaborated_elements));
1647 }
1649 //------------------------------ScheduleAndBundle------------------------------
1650 // Perform instruction scheduling and bundling over the sequence of
1651 // instructions in backwards order.
1652 void Compile::ScheduleAndBundle() {
1654 // Don't optimize this if it isn't a method
1655 if (!_method)
1656 return;
1658 // Don't optimize this if scheduling is disabled
1659 if (!do_scheduling())
1660 return;
1662 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1664 // Create a data structure for all the scheduling information
1665 Scheduling scheduling(Thread::current()->resource_area(), *this);
1667 // Walk backwards over each basic block, computing the needed alignment
1668 // Walk over all the basic blocks
1669 scheduling.DoScheduling();
1670 }
1672 //------------------------------ComputeLocalLatenciesForward-------------------
1673 // Compute the latency of all the instructions. This is fairly simple,
1674 // because we already have a legal ordering. Walk over the instructions
1675 // from first to last, and compute the latency of the instruction based
1676 // on the latency of the preceding instruction(s).
1677 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1678 #ifndef PRODUCT
1679 if (_cfg->C->trace_opto_output())
1680 tty->print("# -> ComputeLocalLatenciesForward\n");
1681 #endif
1683 // Walk over all the schedulable instructions
1684 for( uint j=_bb_start; j < _bb_end; j++ ) {
1686 // This is a kludge, forcing all latency calculations to start at 1.
1687 // Used to allow latency 0 to force an instruction to the beginning
1688 // of the bb
1689 uint latency = 1;
1690 Node *use = bb->_nodes[j];
1691 uint nlen = use->len();
1693 // Walk over all the inputs
1694 for ( uint k=0; k < nlen; k++ ) {
1695 Node *def = use->in(k);
1696 if (!def)
1697 continue;
1699 uint l = _node_latency[def->_idx] + use->latency(k);
1700 if (latency < l)
1701 latency = l;
1702 }
1704 _node_latency[use->_idx] = latency;
1706 #ifndef PRODUCT
1707 if (_cfg->C->trace_opto_output()) {
1708 tty->print("# latency %4d: ", latency);
1709 use->dump();
1710 }
1711 #endif
1712 }
1714 #ifndef PRODUCT
1715 if (_cfg->C->trace_opto_output())
1716 tty->print("# <- ComputeLocalLatenciesForward\n");
1717 #endif
1719 } // end ComputeLocalLatenciesForward
1721 // See if this node fits into the present instruction bundle
1722 bool Scheduling::NodeFitsInBundle(Node *n) {
1723 uint n_idx = n->_idx;
1725 // If this is the unconditional delay instruction, then it fits
1726 if (n == _unconditional_delay_slot) {
1727 #ifndef PRODUCT
1728 if (_cfg->C->trace_opto_output())
1729 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1730 #endif
1731 return (true);
1732 }
1734 // If the node cannot be scheduled this cycle, skip it
1735 if (_current_latency[n_idx] > _bundle_cycle_number) {
1736 #ifndef PRODUCT
1737 if (_cfg->C->trace_opto_output())
1738 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1739 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1740 #endif
1741 return (false);
1742 }
1744 const Pipeline *node_pipeline = n->pipeline();
1746 uint instruction_count = node_pipeline->instructionCount();
1747 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1748 instruction_count = 0;
1749 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1750 instruction_count++;
1752 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1753 #ifndef PRODUCT
1754 if (_cfg->C->trace_opto_output())
1755 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1756 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1757 #endif
1758 return (false);
1759 }
1761 // Don't allow non-machine nodes to be handled this way
1762 if (!n->is_Mach() && instruction_count == 0)
1763 return (false);
1765 // See if there is any overlap
1766 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1768 if (delay > 0) {
1769 #ifndef PRODUCT
1770 if (_cfg->C->trace_opto_output())
1771 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1772 #endif
1773 return false;
1774 }
1776 #ifndef PRODUCT
1777 if (_cfg->C->trace_opto_output())
1778 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1779 #endif
1781 return true;
1782 }
1784 Node * Scheduling::ChooseNodeToBundle() {
1785 uint siz = _available.size();
1787 if (siz == 0) {
1789 #ifndef PRODUCT
1790 if (_cfg->C->trace_opto_output())
1791 tty->print("# ChooseNodeToBundle: NULL\n");
1792 #endif
1793 return (NULL);
1794 }
1796 // Fast path, if only 1 instruction in the bundle
1797 if (siz == 1) {
1798 #ifndef PRODUCT
1799 if (_cfg->C->trace_opto_output()) {
1800 tty->print("# ChooseNodeToBundle (only 1): ");
1801 _available[0]->dump();
1802 }
1803 #endif
1804 return (_available[0]);
1805 }
1807 // Don't bother, if the bundle is already full
1808 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1809 for ( uint i = 0; i < siz; i++ ) {
1810 Node *n = _available[i];
1812 // Skip projections, we'll handle them another way
1813 if (n->is_Proj())
1814 continue;
1816 // This presupposed that instructions are inserted into the
1817 // available list in a legality order; i.e. instructions that
1818 // must be inserted first are at the head of the list
1819 if (NodeFitsInBundle(n)) {
1820 #ifndef PRODUCT
1821 if (_cfg->C->trace_opto_output()) {
1822 tty->print("# ChooseNodeToBundle: ");
1823 n->dump();
1824 }
1825 #endif
1826 return (n);
1827 }
1828 }
1829 }
1831 // Nothing fits in this bundle, choose the highest priority
1832 #ifndef PRODUCT
1833 if (_cfg->C->trace_opto_output()) {
1834 tty->print("# ChooseNodeToBundle: ");
1835 _available[0]->dump();
1836 }
1837 #endif
1839 return _available[0];
1840 }
1842 //------------------------------AddNodeToAvailableList-------------------------
1843 void Scheduling::AddNodeToAvailableList(Node *n) {
1844 assert( !n->is_Proj(), "projections never directly made available" );
1845 #ifndef PRODUCT
1846 if (_cfg->C->trace_opto_output()) {
1847 tty->print("# AddNodeToAvailableList: ");
1848 n->dump();
1849 }
1850 #endif
1852 int latency = _current_latency[n->_idx];
1854 // Insert in latency order (insertion sort)
1855 uint i;
1856 for ( i=0; i < _available.size(); i++ )
1857 if (_current_latency[_available[i]->_idx] > latency)
1858 break;
1860 // Special Check for compares following branches
1861 if( n->is_Mach() && _scheduled.size() > 0 ) {
1862 int op = n->as_Mach()->ideal_Opcode();
1863 Node *last = _scheduled[0];
1864 if( last->is_MachIf() && last->in(1) == n &&
1865 ( op == Op_CmpI ||
1866 op == Op_CmpU ||
1867 op == Op_CmpP ||
1868 op == Op_CmpF ||
1869 op == Op_CmpD ||
1870 op == Op_CmpL ) ) {
1872 // Recalculate position, moving to front of same latency
1873 for ( i=0 ; i < _available.size(); i++ )
1874 if (_current_latency[_available[i]->_idx] >= latency)
1875 break;
1876 }
1877 }
1879 // Insert the node in the available list
1880 _available.insert(i, n);
1882 #ifndef PRODUCT
1883 if (_cfg->C->trace_opto_output())
1884 dump_available();
1885 #endif
1886 }
1888 //------------------------------DecrementUseCounts-----------------------------
1889 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1890 for ( uint i=0; i < n->len(); i++ ) {
1891 Node *def = n->in(i);
1892 if (!def) continue;
1893 if( def->is_Proj() ) // If this is a machine projection, then
1894 def = def->in(0); // propagate usage thru to the base instruction
1896 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1897 continue;
1899 // Compute the latency
1900 uint l = _bundle_cycle_number + n->latency(i);
1901 if (_current_latency[def->_idx] < l)
1902 _current_latency[def->_idx] = l;
1904 // If this does not have uses then schedule it
1905 if ((--_uses[def->_idx]) == 0)
1906 AddNodeToAvailableList(def);
1907 }
1908 }
1910 //------------------------------AddNodeToBundle--------------------------------
1911 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1912 #ifndef PRODUCT
1913 if (_cfg->C->trace_opto_output()) {
1914 tty->print("# AddNodeToBundle: ");
1915 n->dump();
1916 }
1917 #endif
1919 // Remove this from the available list
1920 uint i;
1921 for (i = 0; i < _available.size(); i++)
1922 if (_available[i] == n)
1923 break;
1924 assert(i < _available.size(), "entry in _available list not found");
1925 _available.remove(i);
1927 // See if this fits in the current bundle
1928 const Pipeline *node_pipeline = n->pipeline();
1929 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1931 // Check for instructions to be placed in the delay slot. We
1932 // do this before we actually schedule the current instruction,
1933 // because the delay slot follows the current instruction.
1934 if (Pipeline::_branch_has_delay_slot &&
1935 node_pipeline->hasBranchDelay() &&
1936 !_unconditional_delay_slot) {
1938 uint siz = _available.size();
1940 // Conditional branches can support an instruction that
1941 // is unconditionally executed and not dependent by the
1942 // branch, OR a conditionally executed instruction if
1943 // the branch is taken. In practice, this means that
1944 // the first instruction at the branch target is
1945 // copied to the delay slot, and the branch goes to
1946 // the instruction after that at the branch target
1947 if ( n->is_Mach() && n->is_Branch() ) {
1949 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1950 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1952 #ifndef PRODUCT
1953 _branches++;
1954 #endif
1956 // At least 1 instruction is on the available list
1957 // that is not dependent on the branch
1958 for (uint i = 0; i < siz; i++) {
1959 Node *d = _available[i];
1960 const Pipeline *avail_pipeline = d->pipeline();
1962 // Don't allow safepoints in the branch shadow, that will
1963 // cause a number of difficulties
1964 if ( avail_pipeline->instructionCount() == 1 &&
1965 !avail_pipeline->hasMultipleBundles() &&
1966 !avail_pipeline->hasBranchDelay() &&
1967 Pipeline::instr_has_unit_size() &&
1968 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1969 NodeFitsInBundle(d) &&
1970 !node_bundling(d)->used_in_delay()) {
1972 if (d->is_Mach() && !d->is_MachSafePoint()) {
1973 // A node that fits in the delay slot was found, so we need to
1974 // set the appropriate bits in the bundle pipeline information so
1975 // that it correctly indicates resource usage. Later, when we
1976 // attempt to add this instruction to the bundle, we will skip
1977 // setting the resource usage.
1978 _unconditional_delay_slot = d;
1979 node_bundling(n)->set_use_unconditional_delay();
1980 node_bundling(d)->set_used_in_unconditional_delay();
1981 _bundle_use.add_usage(avail_pipeline->resourceUse());
1982 _current_latency[d->_idx] = _bundle_cycle_number;
1983 _next_node = d;
1984 ++_bundle_instr_count;
1985 #ifndef PRODUCT
1986 _unconditional_delays++;
1987 #endif
1988 break;
1989 }
1990 }
1991 }
1992 }
1994 // No delay slot, add a nop to the usage
1995 if (!_unconditional_delay_slot) {
1996 // See if adding an instruction in the delay slot will overflow
1997 // the bundle.
1998 if (!NodeFitsInBundle(_nop)) {
1999 #ifndef PRODUCT
2000 if (_cfg->C->trace_opto_output())
2001 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
2002 #endif
2003 step(1);
2004 }
2006 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
2007 _next_node = _nop;
2008 ++_bundle_instr_count;
2009 }
2011 // See if the instruction in the delay slot requires a
2012 // step of the bundles
2013 if (!NodeFitsInBundle(n)) {
2014 #ifndef PRODUCT
2015 if (_cfg->C->trace_opto_output())
2016 tty->print("# *** STEP(branch won't fit) ***\n");
2017 #endif
2018 // Update the state information
2019 _bundle_instr_count = 0;
2020 _bundle_cycle_number += 1;
2021 _bundle_use.step(1);
2022 }
2023 }
2025 // Get the number of instructions
2026 uint instruction_count = node_pipeline->instructionCount();
2027 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2028 instruction_count = 0;
2030 // Compute the latency information
2031 uint delay = 0;
2033 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2034 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2035 if (relative_latency < 0)
2036 relative_latency = 0;
2038 delay = _bundle_use.full_latency(relative_latency, node_usage);
2040 // Does not fit in this bundle, start a new one
2041 if (delay > 0) {
2042 step(delay);
2044 #ifndef PRODUCT
2045 if (_cfg->C->trace_opto_output())
2046 tty->print("# *** STEP(%d) ***\n", delay);
2047 #endif
2048 }
2049 }
2051 // If this was placed in the delay slot, ignore it
2052 if (n != _unconditional_delay_slot) {
2054 if (delay == 0) {
2055 if (node_pipeline->hasMultipleBundles()) {
2056 #ifndef PRODUCT
2057 if (_cfg->C->trace_opto_output())
2058 tty->print("# *** STEP(multiple instructions) ***\n");
2059 #endif
2060 step(1);
2061 }
2063 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2064 #ifndef PRODUCT
2065 if (_cfg->C->trace_opto_output())
2066 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2067 instruction_count + _bundle_instr_count,
2068 Pipeline::_max_instrs_per_cycle);
2069 #endif
2070 step(1);
2071 }
2072 }
2074 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2075 _bundle_instr_count++;
2077 // Set the node's latency
2078 _current_latency[n->_idx] = _bundle_cycle_number;
2080 // Now merge the functional unit information
2081 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2082 _bundle_use.add_usage(node_usage);
2084 // Increment the number of instructions in this bundle
2085 _bundle_instr_count += instruction_count;
2087 // Remember this node for later
2088 if (n->is_Mach())
2089 _next_node = n;
2090 }
2092 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2093 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2094 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2095 // into the block. All other scheduled nodes get put in the schedule here.
2096 int op = n->Opcode();
2097 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2098 (op != Op_Node && // Not an unused antidepedence node and
2099 // not an unallocated boxlock
2100 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2102 // Push any trailing projections
2103 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2104 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2105 Node *foi = n->fast_out(i);
2106 if( foi->is_Proj() )
2107 _scheduled.push(foi);
2108 }
2109 }
2111 // Put the instruction in the schedule list
2112 _scheduled.push(n);
2113 }
2115 #ifndef PRODUCT
2116 if (_cfg->C->trace_opto_output())
2117 dump_available();
2118 #endif
2120 // Walk all the definitions, decrementing use counts, and
2121 // if a definition has a 0 use count, place it in the available list.
2122 DecrementUseCounts(n,bb);
2123 }
2125 //------------------------------ComputeUseCount--------------------------------
2126 // This method sets the use count within a basic block. We will ignore all
2127 // uses outside the current basic block. As we are doing a backwards walk,
2128 // any node we reach that has a use count of 0 may be scheduled. This also
2129 // avoids the problem of cyclic references from phi nodes, as long as phi
2130 // nodes are at the front of the basic block. This method also initializes
2131 // the available list to the set of instructions that have no uses within this
2132 // basic block.
2133 void Scheduling::ComputeUseCount(const Block *bb) {
2134 #ifndef PRODUCT
2135 if (_cfg->C->trace_opto_output())
2136 tty->print("# -> ComputeUseCount\n");
2137 #endif
2139 // Clear the list of available and scheduled instructions, just in case
2140 _available.clear();
2141 _scheduled.clear();
2143 // No delay slot specified
2144 _unconditional_delay_slot = NULL;
2146 #ifdef ASSERT
2147 for( uint i=0; i < bb->_nodes.size(); i++ )
2148 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2149 #endif
2151 // Force the _uses count to never go to zero for unscheduable pieces
2152 // of the block
2153 for( uint k = 0; k < _bb_start; k++ )
2154 _uses[bb->_nodes[k]->_idx] = 1;
2155 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2156 _uses[bb->_nodes[l]->_idx] = 1;
2158 // Iterate backwards over the instructions in the block. Don't count the
2159 // branch projections at end or the block header instructions.
2160 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2161 Node *n = bb->_nodes[j];
2162 if( n->is_Proj() ) continue; // Projections handled another way
2164 // Account for all uses
2165 for ( uint k = 0; k < n->len(); k++ ) {
2166 Node *inp = n->in(k);
2167 if (!inp) continue;
2168 assert(inp != n, "no cycles allowed" );
2169 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2170 if( inp->is_Proj() ) // Skip through Proj's
2171 inp = inp->in(0);
2172 ++_uses[inp->_idx]; // Count 1 block-local use
2173 }
2174 }
2176 // If this instruction has a 0 use count, then it is available
2177 if (!_uses[n->_idx]) {
2178 _current_latency[n->_idx] = _bundle_cycle_number;
2179 AddNodeToAvailableList(n);
2180 }
2182 #ifndef PRODUCT
2183 if (_cfg->C->trace_opto_output()) {
2184 tty->print("# uses: %3d: ", _uses[n->_idx]);
2185 n->dump();
2186 }
2187 #endif
2188 }
2190 #ifndef PRODUCT
2191 if (_cfg->C->trace_opto_output())
2192 tty->print("# <- ComputeUseCount\n");
2193 #endif
2194 }
2196 // This routine performs scheduling on each basic block in reverse order,
2197 // using instruction latencies and taking into account function unit
2198 // availability.
2199 void Scheduling::DoScheduling() {
2200 #ifndef PRODUCT
2201 if (_cfg->C->trace_opto_output())
2202 tty->print("# -> DoScheduling\n");
2203 #endif
2205 Block *succ_bb = NULL;
2206 Block *bb;
2208 // Walk over all the basic blocks in reverse order
2209 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2210 bb = _cfg->_blocks[i];
2212 #ifndef PRODUCT
2213 if (_cfg->C->trace_opto_output()) {
2214 tty->print("# Schedule BB#%03d (initial)\n", i);
2215 for (uint j = 0; j < bb->_nodes.size(); j++)
2216 bb->_nodes[j]->dump();
2217 }
2218 #endif
2220 // On the head node, skip processing
2221 if( bb == _cfg->_broot )
2222 continue;
2224 // Skip empty, connector blocks
2225 if (bb->is_connector())
2226 continue;
2228 // If the following block is not the sole successor of
2229 // this one, then reset the pipeline information
2230 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2231 #ifndef PRODUCT
2232 if (_cfg->C->trace_opto_output()) {
2233 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2234 _next_node->_idx, _bundle_instr_count);
2235 }
2236 #endif
2237 step_and_clear();
2238 }
2240 // Leave untouched the starting instruction, any Phis, a CreateEx node
2241 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2242 _bb_end = bb->_nodes.size()-1;
2243 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2244 Node *n = bb->_nodes[_bb_start];
2245 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2246 // Also, MachIdealNodes do not get scheduled
2247 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2248 MachNode *mach = n->as_Mach();
2249 int iop = mach->ideal_Opcode();
2250 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2251 if( iop == Op_Con ) continue; // Do not schedule Top
2252 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2253 mach->pipeline() == MachNode::pipeline_class() &&
2254 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2255 continue;
2256 break; // Funny loop structure to be sure...
2257 }
2258 // Compute last "interesting" instruction in block - last instruction we
2259 // might schedule. _bb_end points just after last schedulable inst. We
2260 // normally schedule conditional branches (despite them being forced last
2261 // in the block), because they have delay slots we can fill. Calls all
2262 // have their delay slots filled in the template expansions, so we don't
2263 // bother scheduling them.
2264 Node *last = bb->_nodes[_bb_end];
2265 if( last->is_Catch() ||
2266 // Exclude unreachable path case when Halt node is in a separate block.
2267 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2268 // There must be a prior call. Skip it.
2269 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2270 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2271 }
2272 } else if( last->is_MachNullCheck() ) {
2273 // Backup so the last null-checked memory instruction is
2274 // outside the schedulable range. Skip over the nullcheck,
2275 // projection, and the memory nodes.
2276 Node *mem = last->in(1);
2277 do {
2278 _bb_end--;
2279 } while (mem != bb->_nodes[_bb_end]);
2280 } else {
2281 // Set _bb_end to point after last schedulable inst.
2282 _bb_end++;
2283 }
2285 assert( _bb_start <= _bb_end, "inverted block ends" );
2287 // Compute the register antidependencies for the basic block
2288 ComputeRegisterAntidependencies(bb);
2289 if (_cfg->C->failing()) return; // too many D-U pinch points
2291 // Compute intra-bb latencies for the nodes
2292 ComputeLocalLatenciesForward(bb);
2294 // Compute the usage within the block, and set the list of all nodes
2295 // in the block that have no uses within the block.
2296 ComputeUseCount(bb);
2298 // Schedule the remaining instructions in the block
2299 while ( _available.size() > 0 ) {
2300 Node *n = ChooseNodeToBundle();
2301 AddNodeToBundle(n,bb);
2302 }
2304 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2305 #ifdef ASSERT
2306 for( uint l = _bb_start; l < _bb_end; l++ ) {
2307 Node *n = bb->_nodes[l];
2308 uint m;
2309 for( m = 0; m < _bb_end-_bb_start; m++ )
2310 if( _scheduled[m] == n )
2311 break;
2312 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2313 }
2314 #endif
2316 // Now copy the instructions (in reverse order) back to the block
2317 for ( uint k = _bb_start; k < _bb_end; k++ )
2318 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2320 #ifndef PRODUCT
2321 if (_cfg->C->trace_opto_output()) {
2322 tty->print("# Schedule BB#%03d (final)\n", i);
2323 uint current = 0;
2324 for (uint j = 0; j < bb->_nodes.size(); j++) {
2325 Node *n = bb->_nodes[j];
2326 if( valid_bundle_info(n) ) {
2327 Bundle *bundle = node_bundling(n);
2328 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2329 tty->print("*** Bundle: ");
2330 bundle->dump();
2331 }
2332 n->dump();
2333 }
2334 }
2335 }
2336 #endif
2337 #ifdef ASSERT
2338 verify_good_schedule(bb,"after block local scheduling");
2339 #endif
2340 }
2342 #ifndef PRODUCT
2343 if (_cfg->C->trace_opto_output())
2344 tty->print("# <- DoScheduling\n");
2345 #endif
2347 // Record final node-bundling array location
2348 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2350 } // end DoScheduling
2352 //------------------------------verify_good_schedule---------------------------
2353 // Verify that no live-range used in the block is killed in the block by a
2354 // wrong DEF. This doesn't verify live-ranges that span blocks.
2356 // Check for edge existence. Used to avoid adding redundant precedence edges.
2357 static bool edge_from_to( Node *from, Node *to ) {
2358 for( uint i=0; i<from->len(); i++ )
2359 if( from->in(i) == to )
2360 return true;
2361 return false;
2362 }
2364 #ifdef ASSERT
2365 //------------------------------verify_do_def----------------------------------
2366 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2367 // Check for bad kills
2368 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2369 Node *prior_use = _reg_node[def];
2370 if( prior_use && !edge_from_to(prior_use,n) ) {
2371 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2372 n->dump();
2373 tty->print_cr("...");
2374 prior_use->dump();
2375 assert_msg(edge_from_to(prior_use,n),msg);
2376 }
2377 _reg_node.map(def,NULL); // Kill live USEs
2378 }
2379 }
2381 //------------------------------verify_good_schedule---------------------------
2382 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2384 // Zap to something reasonable for the verify code
2385 _reg_node.clear();
2387 // Walk over the block backwards. Check to make sure each DEF doesn't
2388 // kill a live value (other than the one it's supposed to). Add each
2389 // USE to the live set.
2390 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2391 Node *n = b->_nodes[i];
2392 int n_op = n->Opcode();
2393 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2394 // Fat-proj kills a slew of registers
2395 RegMask rm = n->out_RegMask();// Make local copy
2396 while( rm.is_NotEmpty() ) {
2397 OptoReg::Name kill = rm.find_first_elem();
2398 rm.Remove(kill);
2399 verify_do_def( n, kill, msg );
2400 }
2401 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2402 // Get DEF'd registers the normal way
2403 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2404 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2405 }
2407 // Now make all USEs live
2408 for( uint i=1; i<n->req(); i++ ) {
2409 Node *def = n->in(i);
2410 assert(def != 0, "input edge required");
2411 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2412 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2413 if( OptoReg::is_valid(reg_lo) ) {
2414 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2415 _reg_node.map(reg_lo,n);
2416 }
2417 if( OptoReg::is_valid(reg_hi) ) {
2418 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2419 _reg_node.map(reg_hi,n);
2420 }
2421 }
2423 }
2425 // Zap to something reasonable for the Antidependence code
2426 _reg_node.clear();
2427 }
2428 #endif
2430 // Conditionally add precedence edges. Avoid putting edges on Projs.
2431 static void add_prec_edge_from_to( Node *from, Node *to ) {
2432 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2433 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2434 from = from->in(0);
2435 }
2436 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2437 !edge_from_to( from, to ) ) // Avoid duplicate edge
2438 from->add_prec(to);
2439 }
2441 //------------------------------anti_do_def------------------------------------
2442 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2443 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2444 return;
2446 Node *pinch = _reg_node[def_reg]; // Get pinch point
2447 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2448 is_def ) { // Check for a true def (not a kill)
2449 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2450 return;
2451 }
2453 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2454 debug_only( def = (Node*)0xdeadbeef; )
2456 // After some number of kills there _may_ be a later def
2457 Node *later_def = NULL;
2459 // Finding a kill requires a real pinch-point.
2460 // Check for not already having a pinch-point.
2461 // Pinch points are Op_Node's.
2462 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2463 later_def = pinch; // Must be def/kill as optimistic pinch-point
2464 if ( _pinch_free_list.size() > 0) {
2465 pinch = _pinch_free_list.pop();
2466 } else {
2467 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2468 }
2469 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2470 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2471 return;
2472 }
2473 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2474 _reg_node.map(def_reg,pinch); // Record pinch-point
2475 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2476 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2477 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2478 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2479 later_def = NULL; // and no later def
2480 }
2481 pinch->set_req(0,later_def); // Hook later def so we can find it
2482 } else { // Else have valid pinch point
2483 if( pinch->in(0) ) // If there is a later-def
2484 later_def = pinch->in(0); // Get it
2485 }
2487 // Add output-dependence edge from later def to kill
2488 if( later_def ) // If there is some original def
2489 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2491 // See if current kill is also a use, and so is forced to be the pinch-point.
2492 if( pinch->Opcode() == Op_Node ) {
2493 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2494 for( uint i=1; i<uses->req(); i++ ) {
2495 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2496 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2497 // Yes, found a use/kill pinch-point
2498 pinch->set_req(0,NULL); //
2499 pinch->replace_by(kill); // Move anti-dep edges up
2500 pinch = kill;
2501 _reg_node.map(def_reg,pinch);
2502 return;
2503 }
2504 }
2505 }
2507 // Add edge from kill to pinch-point
2508 add_prec_edge_from_to(kill,pinch);
2509 }
2511 //------------------------------anti_do_use------------------------------------
2512 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2513 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2514 return;
2515 Node *pinch = _reg_node[use_reg]; // Get pinch point
2516 // Check for no later def_reg/kill in block
2517 if( pinch && _bbs[pinch->_idx] == b &&
2518 // Use has to be block-local as well
2519 _bbs[use->_idx] == b ) {
2520 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2521 pinch->req() == 1 ) { // pinch not yet in block?
2522 pinch->del_req(0); // yank pointer to later-def, also set flag
2523 // Insert the pinch-point in the block just after the last use
2524 b->_nodes.insert(b->find_node(use)+1,pinch);
2525 _bb_end++; // Increase size scheduled region in block
2526 }
2528 add_prec_edge_from_to(pinch,use);
2529 }
2530 }
2532 //------------------------------ComputeRegisterAntidependences-----------------
2533 // We insert antidependences between the reads and following write of
2534 // allocated registers to prevent illegal code motion. Hopefully, the
2535 // number of added references should be fairly small, especially as we
2536 // are only adding references within the current basic block.
2537 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2539 #ifdef ASSERT
2540 verify_good_schedule(b,"before block local scheduling");
2541 #endif
2543 // A valid schedule, for each register independently, is an endless cycle
2544 // of: a def, then some uses (connected to the def by true dependencies),
2545 // then some kills (defs with no uses), finally the cycle repeats with a new
2546 // def. The uses are allowed to float relative to each other, as are the
2547 // kills. No use is allowed to slide past a kill (or def). This requires
2548 // antidependencies between all uses of a single def and all kills that
2549 // follow, up to the next def. More edges are redundant, because later defs
2550 // & kills are already serialized with true or antidependencies. To keep
2551 // the edge count down, we add a 'pinch point' node if there's more than
2552 // one use or more than one kill/def.
2554 // We add dependencies in one bottom-up pass.
2556 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2558 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2559 // register. If not, we record the DEF/KILL in _reg_node, the
2560 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2561 // "pinch point", a new Node that's in the graph but not in the block.
2562 // We put edges from the prior and current DEF/KILLs to the pinch point.
2563 // We put the pinch point in _reg_node. If there's already a pinch point
2564 // we merely add an edge from the current DEF/KILL to the pinch point.
2566 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2567 // put an edge from the pinch point to the USE.
2569 // To be expedient, the _reg_node array is pre-allocated for the whole
2570 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2571 // or a valid def/kill/pinch-point, or a leftover node from some prior
2572 // block. Leftover node from some prior block is treated like a NULL (no
2573 // prior def, so no anti-dependence needed). Valid def is distinguished by
2574 // it being in the current block.
2575 bool fat_proj_seen = false;
2576 uint last_safept = _bb_end-1;
2577 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2578 Node* last_safept_node = end_node;
2579 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2580 Node *n = b->_nodes[i];
2581 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2582 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2583 // Fat-proj kills a slew of registers
2584 // This can add edges to 'n' and obscure whether or not it was a def,
2585 // hence the is_def flag.
2586 fat_proj_seen = true;
2587 RegMask rm = n->out_RegMask();// Make local copy
2588 while( rm.is_NotEmpty() ) {
2589 OptoReg::Name kill = rm.find_first_elem();
2590 rm.Remove(kill);
2591 anti_do_def( b, n, kill, is_def );
2592 }
2593 } else {
2594 // Get DEF'd registers the normal way
2595 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2596 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2597 }
2599 // Check each register used by this instruction for a following DEF/KILL
2600 // that must occur afterward and requires an anti-dependence edge.
2601 for( uint j=0; j<n->req(); j++ ) {
2602 Node *def = n->in(j);
2603 if( def ) {
2604 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2605 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2606 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2607 }
2608 }
2609 // Do not allow defs of new derived values to float above GC
2610 // points unless the base is definitely available at the GC point.
2612 Node *m = b->_nodes[i];
2614 // Add precedence edge from following safepoint to use of derived pointer
2615 if( last_safept_node != end_node &&
2616 m != last_safept_node) {
2617 for (uint k = 1; k < m->req(); k++) {
2618 const Type *t = m->in(k)->bottom_type();
2619 if( t->isa_oop_ptr() &&
2620 t->is_ptr()->offset() != 0 ) {
2621 last_safept_node->add_prec( m );
2622 break;
2623 }
2624 }
2625 }
2627 if( n->jvms() ) { // Precedence edge from derived to safept
2628 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2629 if( b->_nodes[last_safept] != last_safept_node ) {
2630 last_safept = b->find_node(last_safept_node);
2631 }
2632 for( uint j=last_safept; j > i; j-- ) {
2633 Node *mach = b->_nodes[j];
2634 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2635 mach->add_prec( n );
2636 }
2637 last_safept = i;
2638 last_safept_node = m;
2639 }
2640 }
2642 if (fat_proj_seen) {
2643 // Garbage collect pinch nodes that were not consumed.
2644 // They are usually created by a fat kill MachProj for a call.
2645 garbage_collect_pinch_nodes();
2646 }
2647 }
2649 //------------------------------garbage_collect_pinch_nodes-------------------------------
2651 // Garbage collect pinch nodes for reuse by other blocks.
2652 //
2653 // The block scheduler's insertion of anti-dependence
2654 // edges creates many pinch nodes when the block contains
2655 // 2 or more Calls. A pinch node is used to prevent a
2656 // combinatorial explosion of edges. If a set of kills for a
2657 // register is anti-dependent on a set of uses (or defs), rather
2658 // than adding an edge in the graph between each pair of kill
2659 // and use (or def), a pinch is inserted between them:
2660 //
2661 // use1 use2 use3
2662 // \ | /
2663 // \ | /
2664 // pinch
2665 // / | \
2666 // / | \
2667 // kill1 kill2 kill3
2668 //
2669 // One pinch node is created per register killed when
2670 // the second call is encountered during a backwards pass
2671 // over the block. Most of these pinch nodes are never
2672 // wired into the graph because the register is never
2673 // used or def'ed in the block.
2674 //
2675 void Scheduling::garbage_collect_pinch_nodes() {
2676 #ifndef PRODUCT
2677 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2678 #endif
2679 int trace_cnt = 0;
2680 for (uint k = 0; k < _reg_node.Size(); k++) {
2681 Node* pinch = _reg_node[k];
2682 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2683 // no predecence input edges
2684 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2685 cleanup_pinch(pinch);
2686 _pinch_free_list.push(pinch);
2687 _reg_node.map(k, NULL);
2688 #ifndef PRODUCT
2689 if (_cfg->C->trace_opto_output()) {
2690 trace_cnt++;
2691 if (trace_cnt > 40) {
2692 tty->print("\n");
2693 trace_cnt = 0;
2694 }
2695 tty->print(" %d", pinch->_idx);
2696 }
2697 #endif
2698 }
2699 }
2700 #ifndef PRODUCT
2701 if (_cfg->C->trace_opto_output()) tty->print("\n");
2702 #endif
2703 }
2705 // Clean up a pinch node for reuse.
2706 void Scheduling::cleanup_pinch( Node *pinch ) {
2707 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2709 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2710 Node* use = pinch->last_out(i);
2711 uint uses_found = 0;
2712 for (uint j = use->req(); j < use->len(); j++) {
2713 if (use->in(j) == pinch) {
2714 use->rm_prec(j);
2715 uses_found++;
2716 }
2717 }
2718 assert(uses_found > 0, "must be a precedence edge");
2719 i -= uses_found; // we deleted 1 or more copies of this edge
2720 }
2721 // May have a later_def entry
2722 pinch->set_req(0, NULL);
2723 }
2725 //------------------------------print_statistics-------------------------------
2726 #ifndef PRODUCT
2728 void Scheduling::dump_available() const {
2729 tty->print("#Availist ");
2730 for (uint i = 0; i < _available.size(); i++)
2731 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2732 tty->cr();
2733 }
2735 // Print Scheduling Statistics
2736 void Scheduling::print_statistics() {
2737 // Print the size added by nops for bundling
2738 tty->print("Nops added %d bytes to total of %d bytes",
2739 _total_nop_size, _total_method_size);
2740 if (_total_method_size > 0)
2741 tty->print(", for %.2f%%",
2742 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2743 tty->print("\n");
2745 // Print the number of branch shadows filled
2746 if (Pipeline::_branch_has_delay_slot) {
2747 tty->print("Of %d branches, %d had unconditional delay slots filled",
2748 _total_branches, _total_unconditional_delays);
2749 if (_total_branches > 0)
2750 tty->print(", for %.2f%%",
2751 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2752 tty->print("\n");
2753 }
2755 uint total_instructions = 0, total_bundles = 0;
2757 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2758 uint bundle_count = _total_instructions_per_bundle[i];
2759 total_instructions += bundle_count * i;
2760 total_bundles += bundle_count;
2761 }
2763 if (total_bundles > 0)
2764 tty->print("Average ILP (excluding nops) is %.2f\n",
2765 ((double)total_instructions) / ((double)total_bundles));
2766 }
2767 #endif