Wed, 03 Apr 2013 11:12:57 -0700
8011102: Clear AVX registers after return from JNI call
Summary: Execute vzeroupper instruction after JNI call and on exits in jit compiled code which use 256bit vectors.
Reviewed-by: roland
1 //
2 // Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 //
5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation.
8 //
9 // This code is distributed in the hope that it will be useful, but WITHOUT
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 // version 2 for more details (a copy is included in the LICENSE file that
13 // accompanied this code).
14 //
15 // You should have received a copy of the GNU General Public License version
16 // 2 along with this work; if not, write to the Free Software Foundation,
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 //
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 // or visit www.oracle.com if you need additional information or have any
21 // questions.
22 //
23 //
25 // AMD64 Linux Architecture Description File
27 //----------OS-DEPENDENT ENCODING BLOCK----------------------------------------
28 // This block specifies the encoding classes used by the compiler to
29 // output byte streams. Encoding classes generate functions which are
30 // called by Machine Instruction Nodes in order to generate the bit
31 // encoding of the instruction. Operands specify their base encoding
32 // interface with the interface keyword. There are currently
33 // supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, &
34 // COND_INTER. REG_INTER causes an operand to generate a function
35 // which returns its register number when queried. CONST_INTER causes
36 // an operand to generate a function which returns the value of the
37 // constant when queried. MEMORY_INTER causes an operand to generate
38 // four functions which return the Base Register, the Index Register,
39 // the Scale Value, and the Offset Value of the operand when queried.
40 // COND_INTER causes an operand to generate six functions which return
41 // the encoding code (ie - encoding bits for the instruction)
42 // associated with each basic boolean condition for a conditional
43 // instruction. Instructions specify two basic values for encoding.
44 // They use the ins_encode keyword to specify their encoding class
45 // (which must be one of the class names specified in the encoding
46 // block), and they use the opcode keyword to specify, in order, their
47 // primary, secondary, and tertiary opcode. Only the opcode sections
48 // which a particular instruction needs for encoding need to be
49 // specified.
50 encode %{
51 // Build emit functions for each basic byte or larger field in the intel
52 // encoding scheme (opcode, rm, sib, immediate), and call them from C++
53 // code in the enc_class source block. Emit functions will live in the
54 // main source block for now. In future, we can generalize this by
55 // adding a syntax that specifies the sizes of fields in an order,
56 // so that the adlc can build the emit functions automagically
58 %}
61 // Platform dependent source
63 source %{
65 %}