src/share/vm/opto/machnode.cpp

Mon, 31 Oct 2011 03:06:42 -0700

author
twisti
date
Mon, 31 Oct 2011 03:06:42 -0700
changeset 3249
e3b0dcc327b9
parent 3051
11211f7cb5a0
child 3310
6729bbc1fcd6
permissions
-rw-r--r--

7104561: UseRDPCForConstantTableBase doesn't work after shorten branches changes
Reviewed-by: never, kvn

     1 /*
     2  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 #include "precompiled.hpp"
    26 #include "gc_interface/collectedHeap.hpp"
    27 #include "opto/machnode.hpp"
    28 #include "opto/regalloc.hpp"
    30 //=============================================================================
    31 // Return the value requested
    32 // result register lookup, corresponding to int_format
    33 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
    34   return (int)ra_->get_encode(node);
    35 }
    36 // input register lookup, corresponding to ext_format
    37 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
    38   return (int)(ra_->get_encode(node->in(idx)));
    39 }
    40 intptr_t  MachOper::constant() const { return 0x00; }
    41 bool MachOper::constant_is_oop() const { return false; }
    42 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
    43 jfloat  MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
    44 jlong   MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
    45 TypeOopPtr *MachOper::oop() const { return NULL; }
    46 int MachOper::ccode() const { return 0x00; }
    47 // A zero, default, indicates this value is not needed.
    48 // May need to lookup the base register, as done in int_ and ext_format
    49 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
    50 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
    51 int MachOper::scale()  const { return 0x00; }
    52 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
    53 int MachOper::constant_disp()  const { return 0; }
    54 int MachOper::base_position()  const { return -1; }  // no base input
    55 int MachOper::index_position() const { return -1; }  // no index input
    56 // Check for PC-Relative displacement
    57 bool MachOper::disp_is_oop() const { return false; }
    58 // Return the label
    59 Label*   MachOper::label()  const { ShouldNotReachHere(); return 0; }
    60 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
    63 //------------------------------negate-----------------------------------------
    64 // Negate conditional branches.  Error for non-branch operands
    65 void MachOper::negate() {
    66   ShouldNotCallThis();
    67 }
    69 //-----------------------------type--------------------------------------------
    70 const Type *MachOper::type() const {
    71   return Type::BOTTOM;
    72 }
    74 //------------------------------in_RegMask-------------------------------------
    75 const RegMask *MachOper::in_RegMask(int index) const {
    76   ShouldNotReachHere();
    77   return NULL;
    78 }
    80 //------------------------------dump_spec--------------------------------------
    81 // Print any per-operand special info
    82 #ifndef PRODUCT
    83 void MachOper::dump_spec(outputStream *st) const { }
    84 #endif
    86 //------------------------------hash-------------------------------------------
    87 // Print any per-operand special info
    88 uint MachOper::hash() const {
    89   ShouldNotCallThis();
    90   return 5;
    91 }
    93 //------------------------------cmp--------------------------------------------
    94 // Print any per-operand special info
    95 uint MachOper::cmp( const MachOper &oper ) const {
    96   ShouldNotCallThis();
    97   return opcode() == oper.opcode();
    98 }
   100 //------------------------------hash-------------------------------------------
   101 // Print any per-operand special info
   102 uint labelOper::hash() const {
   103   return _block_num;
   104 }
   106 //------------------------------cmp--------------------------------------------
   107 // Print any per-operand special info
   108 uint labelOper::cmp( const MachOper &oper ) const {
   109   return (opcode() == oper.opcode()) && (_label == oper.label());
   110 }
   112 //------------------------------hash-------------------------------------------
   113 // Print any per-operand special info
   114 uint methodOper::hash() const {
   115   return (uint)_method;
   116 }
   118 //------------------------------cmp--------------------------------------------
   119 // Print any per-operand special info
   120 uint methodOper::cmp( const MachOper &oper ) const {
   121   return (opcode() == oper.opcode()) && (_method == oper.method());
   122 }
   125 //=============================================================================
   126 //------------------------------MachNode---------------------------------------
   128 //------------------------------emit-------------------------------------------
   129 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
   130   #ifdef ASSERT
   131   tty->print("missing MachNode emit function: ");
   132   dump();
   133   #endif
   134   ShouldNotCallThis();
   135 }
   137 //------------------------------size-------------------------------------------
   138 // Size of instruction in bytes
   139 uint MachNode::size(PhaseRegAlloc *ra_) const {
   140   // If a virtual was not defined for this specific instruction,
   141   // Call the helper which finds the size by emitting the bits.
   142   return MachNode::emit_size(ra_);
   143 }
   145 //------------------------------size-------------------------------------------
   146 // Helper function that computes size by emitting code
   147 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
   148   // Emit into a trash buffer and count bytes emitted.
   149   assert(ra_ == ra_->C->regalloc(), "sanity");
   150   return ra_->C->scratch_emit_size(this);
   151 }
   155 //------------------------------hash-------------------------------------------
   156 uint MachNode::hash() const {
   157   uint no = num_opnds();
   158   uint sum = rule();
   159   for( uint i=0; i<no; i++ )
   160     sum += _opnds[i]->hash();
   161   return sum+Node::hash();
   162 }
   164 //-----------------------------cmp---------------------------------------------
   165 uint MachNode::cmp( const Node &node ) const {
   166   MachNode& n = *((Node&)node).as_Mach();
   167   uint no = num_opnds();
   168   if( no != n.num_opnds() ) return 0;
   169   if( rule() != n.rule() ) return 0;
   170   for( uint i=0; i<no; i++ )    // All operands must match
   171     if( !_opnds[i]->cmp( *n._opnds[i] ) )
   172       return 0;                 // mis-matched operands
   173   return 1;                     // match
   174 }
   176 // Return an equivalent instruction using memory for cisc_operand position
   177 MachNode *MachNode::cisc_version(int offset, Compile* C) {
   178   ShouldNotCallThis();
   179   return NULL;
   180 }
   182 void MachNode::use_cisc_RegMask() {
   183   ShouldNotReachHere();
   184 }
   187 //-----------------------------in_RegMask--------------------------------------
   188 const RegMask &MachNode::in_RegMask( uint idx ) const {
   189   uint numopnds = num_opnds();        // Virtual call for number of operands
   190   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
   191   if( idx < skipped ) {
   192     assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
   193     assert( idx == 1, "expected base ptr here" );
   194     // debug info can be anywhere
   195     return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
   196   }
   197   uint opcnt     = 1;                 // First operand
   198   uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
   199   while( idx >= skipped+num_edges ) {
   200     skipped += num_edges;
   201     opcnt++;                          // Bump operand count
   202     assert( opcnt < numopnds, "Accessing non-existent operand" );
   203     num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
   204   }
   206   const RegMask *rm = cisc_RegMask();
   207   if( rm == NULL || (int)opcnt != cisc_operand() ) {
   208     rm = _opnds[opcnt]->in_RegMask(idx-skipped);
   209   }
   210   return *rm;
   211 }
   213 //-----------------------------memory_inputs--------------------------------
   214 const MachOper*  MachNode::memory_inputs(Node* &base, Node* &index) const {
   215   const MachOper* oper = memory_operand();
   217   if (oper == (MachOper*)-1) {
   218     base = NodeSentinel;
   219     index = NodeSentinel;
   220   } else {
   221     base = NULL;
   222     index = NULL;
   223     if (oper != NULL) {
   224       // It has a unique memory operand.  Find its index.
   225       int oper_idx = num_opnds();
   226       while (--oper_idx >= 0) {
   227         if (_opnds[oper_idx] == oper)  break;
   228       }
   229       int oper_pos = operand_index(oper_idx);
   230       int base_pos = oper->base_position();
   231       if (base_pos >= 0) {
   232         base = _in[oper_pos+base_pos];
   233       }
   234       int index_pos = oper->index_position();
   235       if (index_pos >= 0) {
   236         index = _in[oper_pos+index_pos];
   237       }
   238     }
   239   }
   241   return oper;
   242 }
   244 //-----------------------------get_base_and_disp----------------------------
   245 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
   247   // Find the memory inputs using our helper function
   248   Node* base;
   249   Node* index;
   250   const MachOper* oper = memory_inputs(base, index);
   252   if (oper == NULL) {
   253     // Base has been set to NULL
   254     offset = 0;
   255   } else if (oper == (MachOper*)-1) {
   256     // Base has been set to NodeSentinel
   257     // There is not a unique memory use here.  We will fall to AliasIdxBot.
   258     offset = Type::OffsetBot;
   259   } else {
   260     // Base may be NULL, even if offset turns out to be != 0
   262     intptr_t disp = oper->constant_disp();
   263     int scale = oper->scale();
   264     // Now we have collected every part of the ADLC MEMORY_INTER.
   265     // See if it adds up to a base + offset.
   266     if (index != NULL) {
   267       const Type* t_index = index->bottom_type();
   268       if (t_index->isa_narrowoop()) { // EncodeN, LoadN, LoadConN, LoadNKlass.
   269         // Memory references through narrow oops have a
   270         // funny base so grab the type from the index:
   271         // [R12 + narrow_oop_reg<<3 + offset]
   272         assert(base == NULL, "Memory references through narrow oops have no base");
   273         offset = disp;
   274         adr_type = t_index->make_ptr()->add_offset(offset);
   275         return NULL;
   276       } else if (!index->is_Con()) {
   277         disp = Type::OffsetBot;
   278       } else if (disp != Type::OffsetBot) {
   279         const TypeX* ti = t_index->isa_intptr_t();
   280         if (ti == NULL) {
   281           disp = Type::OffsetBot;  // a random constant??
   282         } else {
   283           disp += ti->get_con() << scale;
   284         }
   285       }
   286     }
   287     offset = disp;
   289     // In i486.ad, indOffset32X uses base==RegI and disp==RegP,
   290     // this will prevent alias analysis without the following support:
   291     // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
   292     // Add the offset determined by the "base", or use Type::OffsetBot.
   293     if( adr_type == TYPE_PTR_SENTINAL ) {
   294       const TypePtr *t_disp = oper->disp_as_type();  // only !NULL for indOffset32X
   295       if (t_disp != NULL) {
   296         offset = Type::OffsetBot;
   297         const Type* t_base = base->bottom_type();
   298         if (t_base->isa_intptr_t()) {
   299           const TypeX *t_offset = t_base->is_intptr_t();
   300           if( t_offset->is_con() ) {
   301             offset = t_offset->get_con();
   302           }
   303         }
   304         adr_type = t_disp->add_offset(offset);
   305       } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) {
   306         // Use ideal type if it is oop ptr.
   307         const TypePtr *tp = oper->type()->isa_ptr();
   308         if( tp != NULL) {
   309           adr_type = tp;
   310         }
   311       }
   312     }
   314   }
   315   return base;
   316 }
   319 //---------------------------------adr_type---------------------------------
   320 const class TypePtr *MachNode::adr_type() const {
   321   intptr_t offset = 0;
   322   const TypePtr *adr_type = TYPE_PTR_SENTINAL;  // attempt computing adr_type
   323   const Node *base = get_base_and_disp(offset, adr_type);
   324   if( adr_type != TYPE_PTR_SENTINAL ) {
   325     return adr_type;      // get_base_and_disp has the answer
   326   }
   328   // Direct addressing modes have no base node, simply an indirect
   329   // offset, which is always to raw memory.
   330   // %%%%% Someday we'd like to allow constant oop offsets which
   331   // would let Intel load from static globals in 1 instruction.
   332   // Currently Intel requires 2 instructions and a register temp.
   333   if (base == NULL) {
   334     // NULL base, zero offset means no memory at all (a null pointer!)
   335     if (offset == 0) {
   336       return NULL;
   337     }
   338     // NULL base, any offset means any pointer whatever
   339     if (offset == Type::OffsetBot) {
   340       return TypePtr::BOTTOM;
   341     }
   342     // %%% make offset be intptr_t
   343     assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr");
   344     return TypeRawPtr::BOTTOM;
   345   }
   347   // base of -1 with no particular offset means all of memory
   348   if (base == NodeSentinel)  return TypePtr::BOTTOM;
   350   const Type* t = base->bottom_type();
   351   if (UseCompressedOops && Universe::narrow_oop_shift() == 0) {
   352     // 32-bit unscaled narrow oop can be the base of any address expression
   353     t = t->make_ptr();
   354   }
   355   if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
   356     // We cannot assert that the offset does not look oop-ish here.
   357     // Depending on the heap layout the cardmark base could land
   358     // inside some oopish region.  It definitely does for Win2K.
   359     // The sum of cardmark-base plus shift-by-9-oop lands outside
   360     // the oop-ish area but we can't assert for that statically.
   361     return TypeRawPtr::BOTTOM;
   362   }
   364   const TypePtr *tp = t->isa_ptr();
   366   // be conservative if we do not recognize the type
   367   if (tp == NULL) {
   368     assert(false, "this path may produce not optimal code");
   369     return TypePtr::BOTTOM;
   370   }
   371   assert(tp->base() != Type::AnyPtr, "not a bare pointer");
   373   return tp->add_offset(offset);
   374 }
   377 //-----------------------------operand_index---------------------------------
   378 int MachNode::operand_index( uint operand ) const {
   379   if( operand < 1 )  return -1;
   380   assert(operand < num_opnds(), "oob");
   381   if( _opnds[operand]->num_edges() == 0 )  return -1;
   383   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
   384   for (uint opcnt = 1; opcnt < operand; opcnt++) {
   385     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
   386     skipped += num_edges;
   387   }
   388   return skipped;
   389 }
   392 //------------------------------peephole---------------------------------------
   393 // Apply peephole rule(s) to this instruction
   394 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {
   395   return NULL;
   396 }
   398 //------------------------------add_case_label---------------------------------
   399 // Adds the label for the case
   400 void MachNode::add_case_label( int index_num, Label* blockLabel) {
   401   ShouldNotCallThis();
   402 }
   404 //------------------------------method_set-------------------------------------
   405 // Set the absolute address of a method
   406 void MachNode::method_set( intptr_t addr ) {
   407   ShouldNotCallThis();
   408 }
   410 //------------------------------rematerialize----------------------------------
   411 bool MachNode::rematerialize() const {
   412   // Temps are always rematerializable
   413   if (is_MachTemp()) return true;
   415   uint r = rule();              // Match rule
   416   if( r <  Matcher::_begin_rematerialize ||
   417       r >= Matcher::_end_rematerialize )
   418     return false;
   420   // For 2-address instructions, the input live range is also the output
   421   // live range.  Remateralizing does not make progress on the that live range.
   422   if( two_adr() )  return false;
   424   // Check for rematerializing float constants, or not
   425   if( !Matcher::rematerialize_float_constants ) {
   426     int op = ideal_Opcode();
   427     if( op == Op_ConF || op == Op_ConD )
   428       return false;
   429   }
   431   // Defining flags - can't spill these!  Must remateralize.
   432   if( ideal_reg() == Op_RegFlags )
   433     return true;
   435   // Stretching lots of inputs - don't do it.
   436   if( req() > 2 )
   437     return false;
   439   // Don't remateralize somebody with bound inputs - it stretches a
   440   // fixed register lifetime.
   441   uint idx = oper_input_base();
   442   if( req() > idx ) {
   443     const RegMask &rm = in_RegMask(idx);
   444     if( rm.is_bound1() || rm.is_bound2() )
   445       return false;
   446   }
   448   return true;
   449 }
   451 #ifndef PRODUCT
   452 //------------------------------dump_spec--------------------------------------
   453 // Print any per-operand special info
   454 void MachNode::dump_spec(outputStream *st) const {
   455   uint cnt = num_opnds();
   456   for( uint i=0; i<cnt; i++ )
   457     _opnds[i]->dump_spec(st);
   458   const TypePtr *t = adr_type();
   459   if( t ) {
   460     Compile* C = Compile::current();
   461     if( C->alias_type(t)->is_volatile() )
   462       st->print(" Volatile!");
   463   }
   464 }
   466 //------------------------------dump_format------------------------------------
   467 // access to virtual
   468 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
   469   format(ra, st); // access to virtual
   470 }
   471 #endif
   473 //=============================================================================
   474 #ifndef PRODUCT
   475 void MachTypeNode::dump_spec(outputStream *st) const {
   476   _bottom_type->dump_on(st);
   477 }
   478 #endif
   481 //=============================================================================
   482 int MachConstantNode::constant_offset() {
   483   int offset = _constant.offset();
   484   // Bind the offset lazily.
   485   if (offset == -1) {
   486     Compile::ConstantTable& constant_table = Compile::current()->constant_table();
   487     // If called from Compile::scratch_emit_size assume the worst-case
   488     // for load offsets: half the constant table size.
   489     // NOTE: Don't return or calculate the actual offset (which might
   490     // be zero) because that leads to problems with e.g. jumpXtnd on
   491     // some architectures (cf. add-optimization in SPARC jumpXtnd).
   492     if (Compile::current()->in_scratch_emit_size())
   493       return constant_table.size() / 2;
   494     offset = constant_table.table_base_offset() + constant_table.find_offset(_constant);
   495     _constant.set_offset(offset);
   496   }
   497   return offset;
   498 }
   501 //=============================================================================
   502 #ifndef PRODUCT
   503 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
   504   int reg = ra_->get_reg_first(in(1)->in(_vidx));
   505   tty->print("%s %s", Name(), Matcher::regName[reg]);
   506 }
   507 #endif
   509 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
   510   // only emits entries in the null-pointer exception handler table
   511 }
   512 void MachNullCheckNode::label_set(Label* label, uint block_num) {
   513   // Nothing to emit
   514 }
   515 void MachNullCheckNode::save_label( Label** label, uint* block_num ) {
   516   // Nothing to emit
   517 }
   519 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
   520   if( idx == 0 ) return RegMask::Empty;
   521   else return in(1)->as_Mach()->out_RegMask();
   522 }
   524 //=============================================================================
   525 const Type *MachProjNode::bottom_type() const {
   526   if( _ideal_reg == fat_proj ) return Type::BOTTOM;
   527   // Try the normal mechanism first
   528   const Type *t = in(0)->bottom_type();
   529   if( t->base() == Type::Tuple ) {
   530     const TypeTuple *tt = t->is_tuple();
   531     if (_con < tt->cnt())
   532       return tt->field_at(_con);
   533   }
   534   // Else use generic type from ideal register set
   535   assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
   536   return Type::mreg2type[_ideal_reg];
   537 }
   539 const TypePtr *MachProjNode::adr_type() const {
   540   if (bottom_type() == Type::MEMORY) {
   541     // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
   542     const TypePtr* adr_type = in(0)->adr_type();
   543     #ifdef ASSERT
   544     if (!is_error_reported() && !Node::in_dump())
   545       assert(adr_type != NULL, "source must have adr_type");
   546     #endif
   547     return adr_type;
   548   }
   549   assert(bottom_type()->base() != Type::Memory, "no other memories?");
   550   return NULL;
   551 }
   553 #ifndef PRODUCT
   554 void MachProjNode::dump_spec(outputStream *st) const {
   555   ProjNode::dump_spec(st);
   556   switch (_ideal_reg) {
   557   case unmatched_proj:  st->print("/unmatched");                         break;
   558   case fat_proj:        st->print("/fat"); if (WizardMode) _rout.dump(); break;
   559   }
   560 }
   561 #endif
   563 //=============================================================================
   564 #ifndef PRODUCT
   565 void MachIfNode::dump_spec(outputStream *st) const {
   566   st->print("P=%f, C=%f",_prob, _fcnt);
   567 }
   568 #endif
   570 //=============================================================================
   571 uint MachReturnNode::size_of() const { return sizeof(*this); }
   573 //------------------------------Registers--------------------------------------
   574 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
   575   return _in_rms[idx];
   576 }
   578 const TypePtr *MachReturnNode::adr_type() const {
   579   // most returns and calls are assumed to consume & modify all of memory
   580   // the matcher will copy non-wide adr_types from ideal originals
   581   return _adr_type;
   582 }
   584 //=============================================================================
   585 const Type *MachSafePointNode::bottom_type() const {  return TypeTuple::MEMBAR; }
   587 //------------------------------Registers--------------------------------------
   588 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
   589   // Values in the domain use the users calling convention, embodied in the
   590   // _in_rms array of RegMasks.
   591   if( idx < TypeFunc::Parms ) return _in_rms[idx];
   593   if (SafePointNode::needs_polling_address_input() &&
   594       idx == TypeFunc::Parms &&
   595       ideal_Opcode() == Op_SafePoint) {
   596     return MachNode::in_RegMask(idx);
   597   }
   599   // Values outside the domain represent debug info
   600   return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
   601 }
   604 //=============================================================================
   606 uint MachCallNode::cmp( const Node &n ) const
   607 { return _tf == ((MachCallNode&)n)._tf; }
   608 const Type *MachCallNode::bottom_type() const { return tf()->range(); }
   609 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }
   611 #ifndef PRODUCT
   612 void MachCallNode::dump_spec(outputStream *st) const {
   613   st->print("# ");
   614   tf()->dump_on(st);
   615   if (_cnt != COUNT_UNKNOWN)  st->print(" C=%f",_cnt);
   616   if (jvms() != NULL)  jvms()->dump_spec(st);
   617 }
   618 #endif
   621 bool MachCallNode::return_value_is_used() const {
   622   if (tf()->range()->cnt() == TypeFunc::Parms) {
   623     // void return
   624     return false;
   625   }
   627   // find the projection corresponding to the return value
   628   for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
   629     Node *use = fast_out(i);
   630     if (!use->is_Proj()) continue;
   631     if (use->as_Proj()->_con == TypeFunc::Parms) {
   632       return true;
   633     }
   634   }
   635   return false;
   636 }
   639 //------------------------------Registers--------------------------------------
   640 const RegMask &MachCallNode::in_RegMask( uint idx ) const {
   641   // Values in the domain use the users calling convention, embodied in the
   642   // _in_rms array of RegMasks.
   643   if (idx < tf()->domain()->cnt())  return _in_rms[idx];
   644   // Values outside the domain represent debug info
   645   return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
   646 }
   648 //=============================================================================
   649 uint MachCallJavaNode::size_of() const { return sizeof(*this); }
   650 uint MachCallJavaNode::cmp( const Node &n ) const {
   651   MachCallJavaNode &call = (MachCallJavaNode&)n;
   652   return MachCallNode::cmp(call) && _method->equals(call._method);
   653 }
   654 #ifndef PRODUCT
   655 void MachCallJavaNode::dump_spec(outputStream *st) const {
   656   if (_method_handle_invoke)
   657     st->print("MethodHandle ");
   658   if (_method) {
   659     _method->print_short_name(st);
   660     st->print(" ");
   661   }
   662   MachCallNode::dump_spec(st);
   663 }
   664 #endif
   666 //------------------------------Registers--------------------------------------
   667 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const {
   668   // Values in the domain use the users calling convention, embodied in the
   669   // _in_rms array of RegMasks.
   670   if (idx < tf()->domain()->cnt())  return _in_rms[idx];
   671   // Values outside the domain represent debug info
   672   Matcher* m = Compile::current()->matcher();
   673   // If this call is a MethodHandle invoke we have to use a different
   674   // debugmask which does not include the register we use to save the
   675   // SP over MH invokes.
   676   RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask;
   677   return *debugmask[in(idx)->ideal_reg()];
   678 }
   680 //=============================================================================
   681 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
   682 uint MachCallStaticJavaNode::cmp( const Node &n ) const {
   683   MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
   684   return MachCallJavaNode::cmp(call) && _name == call._name;
   685 }
   687 //----------------------------uncommon_trap_request----------------------------
   688 // If this is an uncommon trap, return the request code, else zero.
   689 int MachCallStaticJavaNode::uncommon_trap_request() const {
   690   if (_name != NULL && !strcmp(_name, "uncommon_trap")) {
   691     return CallStaticJavaNode::extract_uncommon_trap_request(this);
   692   }
   693   return 0;
   694 }
   696 #ifndef PRODUCT
   697 // Helper for summarizing uncommon_trap arguments.
   698 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
   699   int trap_req = uncommon_trap_request();
   700   if (trap_req != 0) {
   701     char buf[100];
   702     st->print("(%s)",
   703                Deoptimization::format_trap_request(buf, sizeof(buf),
   704                                                    trap_req));
   705   }
   706 }
   708 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
   709   st->print("Static ");
   710   if (_name != NULL) {
   711     st->print("wrapper for: %s", _name );
   712     dump_trap_args(st);
   713     st->print(" ");
   714   }
   715   MachCallJavaNode::dump_spec(st);
   716 }
   717 #endif
   719 //=============================================================================
   720 #ifndef PRODUCT
   721 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
   722   st->print("Dynamic ");
   723   MachCallJavaNode::dump_spec(st);
   724 }
   725 #endif
   726 //=============================================================================
   727 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
   728 uint MachCallRuntimeNode::cmp( const Node &n ) const {
   729   MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
   730   return MachCallNode::cmp(call) && !strcmp(_name,call._name);
   731 }
   732 #ifndef PRODUCT
   733 void MachCallRuntimeNode::dump_spec(outputStream *st) const {
   734   st->print("%s ",_name);
   735   MachCallNode::dump_spec(st);
   736 }
   737 #endif
   738 //=============================================================================
   739 // A shared JVMState for all HaltNodes.  Indicates the start of debug info
   740 // is at TypeFunc::Parms.  Only required for SOE register spill handling -
   741 // to indicate where the stack-slot-only debug info inputs begin.
   742 // There is no other JVM state needed here.
   743 JVMState jvms_for_throw(0);
   744 JVMState *MachHaltNode::jvms() const {
   745   return &jvms_for_throw;
   746 }
   748 //=============================================================================
   749 #ifndef PRODUCT
   750 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
   751   st->print("B%d", _block_num);
   752 }
   753 #endif // PRODUCT
   755 //=============================================================================
   756 #ifndef PRODUCT
   757 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
   758   st->print(INTPTR_FORMAT, _method);
   759 }
   760 #endif // PRODUCT

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