Thu, 03 Jan 2013 16:30:47 -0800
8005544: Use 256bit YMM registers in arraycopy stubs on x86
Summary: Use YMM registers in arraycopy and array_fill stubs.
Reviewed-by: roland, twisti
1 /*
2 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
25 #include "precompiled.hpp"
26 #include "c1/c1_CodeStubs.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "nativeInst_x86.hpp"
32 #include "runtime/sharedRuntime.hpp"
33 #include "vmreg_x86.inline.hpp"
34 #ifndef SERIALGC
35 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
36 #endif
39 #define __ ce->masm()->
41 float ConversionStub::float_zero = 0.0;
42 double ConversionStub::double_zero = 0.0;
44 void ConversionStub::emit_code(LIR_Assembler* ce) {
45 __ bind(_entry);
46 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
49 if (input()->is_single_xmm()) {
50 __ comiss(input()->as_xmm_float_reg(),
51 ExternalAddress((address)&float_zero));
52 } else if (input()->is_double_xmm()) {
53 __ comisd(input()->as_xmm_double_reg(),
54 ExternalAddress((address)&double_zero));
55 } else {
56 LP64_ONLY(ShouldNotReachHere());
57 __ push(rax);
58 __ ftst();
59 __ fnstsw_ax();
60 __ sahf();
61 __ pop(rax);
62 }
64 Label NaN, do_return;
65 __ jccb(Assembler::parity, NaN);
66 __ jccb(Assembler::below, do_return);
68 // input is > 0 -> return maxInt
69 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
70 __ decrement(result()->as_register());
71 __ jmpb(do_return);
73 // input is NaN -> return 0
74 __ bind(NaN);
75 __ xorptr(result()->as_register(), result()->as_register());
77 __ bind(do_return);
78 __ jmp(_continuation);
79 }
81 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
82 __ bind(_entry);
83 ce->store_parameter(_method->as_register(), 1);
84 ce->store_parameter(_bci, 0);
85 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
86 ce->add_call_info_here(_info);
87 ce->verify_oop_map(_info);
88 __ jmp(_continuation);
89 }
91 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
92 bool throw_index_out_of_bounds_exception)
93 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
94 , _index(index)
95 {
96 assert(info != NULL, "must have info");
97 _info = new CodeEmitInfo(info);
98 }
101 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
102 __ bind(_entry);
103 // pass the array index on stack because all registers must be preserved
104 if (_index->is_cpu_register()) {
105 ce->store_parameter(_index->as_register(), 0);
106 } else {
107 ce->store_parameter(_index->as_jint(), 0);
108 }
109 Runtime1::StubID stub_id;
110 if (_throw_index_out_of_bounds_exception) {
111 stub_id = Runtime1::throw_index_exception_id;
112 } else {
113 stub_id = Runtime1::throw_range_check_failed_id;
114 }
115 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
116 ce->add_call_info_here(_info);
117 debug_only(__ should_not_reach_here());
118 }
121 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
122 if (_offset != -1) {
123 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
124 }
125 __ bind(_entry);
126 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
127 ce->add_call_info_here(_info);
128 debug_only(__ should_not_reach_here());
129 }
132 // Implementation of NewInstanceStub
134 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
135 _result = result;
136 _klass = klass;
137 _klass_reg = klass_reg;
138 _info = new CodeEmitInfo(info);
139 assert(stub_id == Runtime1::new_instance_id ||
140 stub_id == Runtime1::fast_new_instance_id ||
141 stub_id == Runtime1::fast_new_instance_init_check_id,
142 "need new_instance id");
143 _stub_id = stub_id;
144 }
147 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
148 assert(__ rsp_offset() == 0, "frame size should be fixed");
149 __ bind(_entry);
150 __ movptr(rdx, _klass_reg->as_register());
151 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
152 ce->add_call_info_here(_info);
153 ce->verify_oop_map(_info);
154 assert(_result->as_register() == rax, "result must in rax,");
155 __ jmp(_continuation);
156 }
159 // Implementation of NewTypeArrayStub
161 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
162 _klass_reg = klass_reg;
163 _length = length;
164 _result = result;
165 _info = new CodeEmitInfo(info);
166 }
169 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
170 assert(__ rsp_offset() == 0, "frame size should be fixed");
171 __ bind(_entry);
172 assert(_length->as_register() == rbx, "length must in rbx,");
173 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
174 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
175 ce->add_call_info_here(_info);
176 ce->verify_oop_map(_info);
177 assert(_result->as_register() == rax, "result must in rax,");
178 __ jmp(_continuation);
179 }
182 // Implementation of NewObjectArrayStub
184 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
185 _klass_reg = klass_reg;
186 _result = result;
187 _length = length;
188 _info = new CodeEmitInfo(info);
189 }
192 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
193 assert(__ rsp_offset() == 0, "frame size should be fixed");
194 __ bind(_entry);
195 assert(_length->as_register() == rbx, "length must in rbx,");
196 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
197 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
198 ce->add_call_info_here(_info);
199 ce->verify_oop_map(_info);
200 assert(_result->as_register() == rax, "result must in rax,");
201 __ jmp(_continuation);
202 }
205 // Implementation of MonitorAccessStubs
207 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
208 : MonitorAccessStub(obj_reg, lock_reg)
209 {
210 _info = new CodeEmitInfo(info);
211 }
214 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
215 assert(__ rsp_offset() == 0, "frame size should be fixed");
216 __ bind(_entry);
217 ce->store_parameter(_obj_reg->as_register(), 1);
218 ce->store_parameter(_lock_reg->as_register(), 0);
219 Runtime1::StubID enter_id;
220 if (ce->compilation()->has_fpu_code()) {
221 enter_id = Runtime1::monitorenter_id;
222 } else {
223 enter_id = Runtime1::monitorenter_nofpu_id;
224 }
225 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
226 ce->add_call_info_here(_info);
227 ce->verify_oop_map(_info);
228 __ jmp(_continuation);
229 }
232 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
233 __ bind(_entry);
234 if (_compute_lock) {
235 // lock_reg was destroyed by fast unlocking attempt => recompute it
236 ce->monitor_address(_monitor_ix, _lock_reg);
237 }
238 ce->store_parameter(_lock_reg->as_register(), 0);
239 // note: non-blocking leaf routine => no call info needed
240 Runtime1::StubID exit_id;
241 if (ce->compilation()->has_fpu_code()) {
242 exit_id = Runtime1::monitorexit_id;
243 } else {
244 exit_id = Runtime1::monitorexit_nofpu_id;
245 }
246 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
247 __ jmp(_continuation);
248 }
251 // Implementation of patching:
252 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
253 // - Replace original code with a call to the stub
254 // At Runtime:
255 // - call to stub, jump to runtime
256 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
257 // - in runtime: after initializing class, restore original code, reexecute instruction
259 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
261 void PatchingStub::align_patch_site(MacroAssembler* masm) {
262 // We're patching a 5-7 byte instruction on intel and we need to
263 // make sure that we don't see a piece of the instruction. It
264 // appears mostly impossible on Intel to simply invalidate other
265 // processors caches and since they may do aggressive prefetch it's
266 // very hard to make a guess about what code might be in the icache.
267 // Force the instruction to be double word aligned so that it
268 // doesn't span a cache line.
269 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
270 }
272 void PatchingStub::emit_code(LIR_Assembler* ce) {
273 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
275 Label call_patch;
277 // static field accesses have special semantics while the class
278 // initializer is being run so we emit a test which can be used to
279 // check that this code is being executed by the initializing
280 // thread.
281 address being_initialized_entry = __ pc();
282 if (CommentedAssembly) {
283 __ block_comment(" patch template");
284 }
285 if (_id == load_klass_id) {
286 // produce a copy of the load klass instruction for use by the being initialized case
287 #ifdef ASSERT
288 address start = __ pc();
289 #endif
290 Metadata* o = NULL;
291 __ mov_metadata(_obj, o);
292 #ifdef ASSERT
293 for (int i = 0; i < _bytes_to_copy; i++) {
294 address ptr = (address)(_pc_start + i);
295 int a_byte = (*ptr) & 0xFF;
296 assert(a_byte == *start++, "should be the same code");
297 }
298 #endif
299 } else if (_id == load_mirror_id) {
300 // produce a copy of the load mirror instruction for use by the being
301 // initialized case
302 #ifdef ASSERT
303 address start = __ pc();
304 #endif
305 jobject o = NULL;
306 __ movoop(_obj, o);
307 #ifdef ASSERT
308 for (int i = 0; i < _bytes_to_copy; i++) {
309 address ptr = (address)(_pc_start + i);
310 int a_byte = (*ptr) & 0xFF;
311 assert(a_byte == *start++, "should be the same code");
312 }
313 #endif
314 } else {
315 // make a copy the code which is going to be patched.
316 for (int i = 0; i < _bytes_to_copy; i++) {
317 address ptr = (address)(_pc_start + i);
318 int a_byte = (*ptr) & 0xFF;
319 __ emit_int8(a_byte);
320 *ptr = 0x90; // make the site look like a nop
321 }
322 }
324 address end_of_patch = __ pc();
325 int bytes_to_skip = 0;
326 if (_id == load_mirror_id) {
327 int offset = __ offset();
328 if (CommentedAssembly) {
329 __ block_comment(" being_initialized check");
330 }
331 assert(_obj != noreg, "must be a valid register");
332 Register tmp = rax;
333 Register tmp2 = rbx;
334 __ push(tmp);
335 __ push(tmp2);
336 // Load without verification to keep code size small. We need it because
337 // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null.
338 __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes()));
339 __ get_thread(tmp);
340 __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset()));
341 __ pop(tmp2);
342 __ pop(tmp);
343 __ jcc(Assembler::notEqual, call_patch);
345 // access_field patches may execute the patched code before it's
346 // copied back into place so we need to jump back into the main
347 // code of the nmethod to continue execution.
348 __ jmp(_patch_site_continuation);
350 // make sure this extra code gets skipped
351 bytes_to_skip += __ offset() - offset;
352 }
353 if (CommentedAssembly) {
354 __ block_comment("patch data encoded as movl");
355 }
356 // Now emit the patch record telling the runtime how to find the
357 // pieces of the patch. We only need 3 bytes but for readability of
358 // the disassembly we make the data look like a movl reg, imm32,
359 // which requires 5 bytes
360 int sizeof_patch_record = 5;
361 bytes_to_skip += sizeof_patch_record;
363 // emit the offsets needed to find the code to patch
364 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
366 __ emit_int8((unsigned char)0xB8);
367 __ emit_int8(0);
368 __ emit_int8(being_initialized_entry_offset);
369 __ emit_int8(bytes_to_skip);
370 __ emit_int8(_bytes_to_copy);
371 address patch_info_pc = __ pc();
372 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
374 address entry = __ pc();
375 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
376 address target = NULL;
377 relocInfo::relocType reloc_type = relocInfo::none;
378 switch (_id) {
379 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
380 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
381 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
382 default: ShouldNotReachHere();
383 }
384 __ bind(call_patch);
386 if (CommentedAssembly) {
387 __ block_comment("patch entry point");
388 }
389 __ call(RuntimeAddress(target));
390 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
391 ce->add_call_info_here(_info);
392 int jmp_off = __ offset();
393 __ jmp(_patch_site_entry);
394 // Add enough nops so deoptimization can overwrite the jmp above with a call
395 // and not destroy the world.
396 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
397 __ nop();
398 }
399 if (_id == load_klass_id || _id == load_mirror_id) {
400 CodeSection* cs = __ code_section();
401 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
402 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none);
403 }
404 }
407 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
408 __ bind(_entry);
409 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
410 ce->add_call_info_here(_info);
411 DEBUG_ONLY(__ should_not_reach_here());
412 }
415 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
416 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
417 __ bind(_entry);
418 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
419 ce->add_call_info_here(_info);
420 debug_only(__ should_not_reach_here());
421 }
424 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
425 assert(__ rsp_offset() == 0, "frame size should be fixed");
427 __ bind(_entry);
428 // pass the object on stack because all registers must be preserved
429 if (_obj->is_cpu_register()) {
430 ce->store_parameter(_obj->as_register(), 0);
431 }
432 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
433 ce->add_call_info_here(_info);
434 debug_only(__ should_not_reach_here());
435 }
438 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
439 //---------------slow case: call to native-----------------
440 __ bind(_entry);
441 // Figure out where the args should go
442 // This should really convert the IntrinsicID to the Method* and signature
443 // but I don't know how to do that.
444 //
445 VMRegPair args[5];
446 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
447 SharedRuntime::java_calling_convention(signature, args, 5, true);
449 // push parameters
450 // (src, src_pos, dest, destPos, length)
451 Register r[5];
452 r[0] = src()->as_register();
453 r[1] = src_pos()->as_register();
454 r[2] = dst()->as_register();
455 r[3] = dst_pos()->as_register();
456 r[4] = length()->as_register();
458 // next registers will get stored on the stack
459 for (int i = 0; i < 5 ; i++ ) {
460 VMReg r_1 = args[i].first();
461 if (r_1->is_stack()) {
462 int st_off = r_1->reg2stack() * wordSize;
463 __ movptr (Address(rsp, st_off), r[i]);
464 } else {
465 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
466 }
467 }
469 ce->align_call(lir_static_call);
471 ce->emit_static_call_stub();
472 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
473 relocInfo::static_call_type);
474 __ call(resolve);
475 ce->add_call_info_here(info());
477 #ifndef PRODUCT
478 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
479 #endif
481 __ jmp(_continuation);
482 }
484 /////////////////////////////////////////////////////////////////////////////
485 #ifndef SERIALGC
487 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
488 // At this point we know that marking is in progress.
489 // If do_load() is true then we have to emit the
490 // load of the previous value; otherwise it has already
491 // been loaded into _pre_val.
493 __ bind(_entry);
494 assert(pre_val()->is_register(), "Precondition.");
496 Register pre_val_reg = pre_val()->as_register();
498 if (do_load()) {
499 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
500 }
502 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
503 __ jcc(Assembler::equal, _continuation);
504 ce->store_parameter(pre_val()->as_register(), 0);
505 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
506 __ jmp(_continuation);
508 }
510 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
512 jbyte* G1PostBarrierStub::byte_map_base_slow() {
513 BarrierSet* bs = Universe::heap()->barrier_set();
514 assert(bs->is_a(BarrierSet::G1SATBCTLogging),
515 "Must be if we're using this.");
516 return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
517 }
519 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
520 __ bind(_entry);
521 assert(addr()->is_register(), "Precondition.");
522 assert(new_val()->is_register(), "Precondition.");
523 Register new_val_reg = new_val()->as_register();
524 __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
525 __ jcc(Assembler::equal, _continuation);
526 ce->store_parameter(addr()->as_pointer_register(), 0);
527 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
528 __ jmp(_continuation);
529 }
531 #endif // SERIALGC
532 /////////////////////////////////////////////////////////////////////////////
534 #undef __