Thu, 07 Apr 2011 09:53:20 -0700
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
Summary: A referent object that is only weakly reachable at the start of concurrent marking but is re-attached to the strongly reachable object graph during marking may not be marked as live. This can cause the reference object to be processed prematurely and leave dangling pointers to the referent object. Implement a read barrier for the java.lang.ref.Reference::referent field by intrinsifying the Reference.get() method, and intercepting accesses though JNI, reflection, and Unsafe, so that when a non-null referent object is read it is also logged in an SATB buffer.
Reviewed-by: kvn, iveresov, never, tonyp, dholmes
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25 #ifndef CPU_SPARC_VM_C1_DEFS_SPARC_HPP
26 #define CPU_SPARC_VM_C1_DEFS_SPARC_HPP
28 // native word offsets from memory address (big endian)
29 enum {
30 pd_lo_word_offset_in_bytes = BytesPerInt,
31 pd_hi_word_offset_in_bytes = 0
32 };
35 // explicit rounding operations are not required to implement the strictFP mode
36 enum {
37 pd_strict_fp_requires_explicit_rounding = false
38 };
41 // registers
42 enum {
43 pd_nof_cpu_regs_frame_map = 32, // number of registers used during code emission
44 pd_nof_caller_save_cpu_regs_frame_map = 10, // number of cpu registers killed by calls
45 pd_nof_cpu_regs_reg_alloc = 20, // number of registers that are visible to register allocator
46 pd_nof_cpu_regs_linearscan = 32,// number of registers visible linear scan
47 pd_first_cpu_reg = 0,
48 pd_last_cpu_reg = 31,
49 pd_last_allocatable_cpu_reg = 19,
50 pd_first_callee_saved_reg = 0,
51 pd_last_callee_saved_reg = 13,
53 pd_nof_fpu_regs_frame_map = 32, // number of registers used during code emission
54 pd_nof_caller_save_fpu_regs_frame_map = 32, // number of fpu registers killed by calls
55 pd_nof_fpu_regs_reg_alloc = 32, // number of registers that are visible to register allocator
56 pd_nof_fpu_regs_linearscan = 32, // number of registers visible to linear scan
57 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
58 pd_last_fpu_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map - 1,
60 pd_nof_xmm_regs_linearscan = 0,
61 pd_nof_caller_save_xmm_regs = 0,
62 pd_first_xmm_reg = -1,
63 pd_last_xmm_reg = -1
64 };
67 // for debug info: a float value in a register is saved in single precision by runtime stubs
68 enum {
69 pd_float_saved_as_double = false
70 };
72 #endif // CPU_SPARC_VM_C1_DEFS_SPARC_HPP