Thu, 21 Nov 2013 12:30:35 -0800
Merge
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
34 class BufferBlob;
35 class CodeBuffer;
36 class JVMState;
37 class MachCallDynamicJavaNode;
38 class MachCallJavaNode;
39 class MachCallLeafNode;
40 class MachCallNode;
41 class MachCallRuntimeNode;
42 class MachCallStaticJavaNode;
43 class MachEpilogNode;
44 class MachIfNode;
45 class MachNullCheckNode;
46 class MachOper;
47 class MachProjNode;
48 class MachPrologNode;
49 class MachReturnNode;
50 class MachSafePointNode;
51 class MachSpillCopyNode;
52 class Matcher;
53 class PhaseRegAlloc;
54 class RegMask;
55 class State;
57 //---------------------------MachOper------------------------------------------
58 class MachOper : public ResourceObj {
59 public:
60 // Allocate right next to the MachNodes in the same arena
61 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
63 // Opcode
64 virtual uint opcode() const = 0;
66 // Number of input edges.
67 // Generally at least 1
68 virtual uint num_edges() const { return 1; }
69 // Array of Register masks
70 virtual const RegMask *in_RegMask(int index) const;
72 // Methods to output the encoding of the operand
74 // Negate conditional branches. Error for non-branch Nodes
75 virtual void negate();
77 // Return the value requested
78 // result register lookup, corresponding to int_format
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
80 // input register lookup, corresponding to ext_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
83 // helpers for MacroAssembler generation from ADLC
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
85 return ::as_Register(reg(ra_, node));
86 }
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
88 return ::as_Register(reg(ra_, node, idx));
89 }
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_FloatRegister(reg(ra_, node));
92 }
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_FloatRegister(reg(ra_, node, idx));
95 }
97 #if defined(IA32) || defined(AMD64)
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
99 return ::as_XMMRegister(reg(ra_, node));
100 }
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
102 return ::as_XMMRegister(reg(ra_, node, idx));
103 }
104 #endif
106 virtual intptr_t constant() const;
107 virtual relocInfo::relocType constant_reloc() const;
108 virtual jdouble constantD() const;
109 virtual jfloat constantF() const;
110 virtual jlong constantL() const;
111 virtual TypeOopPtr *oop() const;
112 virtual int ccode() const;
113 // A zero, default, indicates this value is not needed.
114 // May need to lookup the base register, as done in int_ and ext_format
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
117 virtual int scale() const;
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
120 // Check for PC-Relative displacement
121 virtual relocInfo::relocType disp_reloc() const;
122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
123 virtual int base_position() const; // base edge position, or -1
124 virtual int index_position() const; // index edge position, or -1
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
127 // Only returns non-null value for i486.ad's indOffset32X
128 virtual const TypePtr *disp_as_type() const { return NULL; }
130 // Return the label
131 virtual Label *label() const;
133 // Return the method's address
134 virtual intptr_t method() const;
136 // Hash and compare over operands are currently identical
137 virtual uint hash() const;
138 virtual uint cmp( const MachOper &oper ) const;
140 // Virtual clone, since I do not know how big the MachOper is.
141 virtual MachOper *clone(Compile* C) const = 0;
143 // Return ideal Type from simple operands. Fail for complex operands.
144 virtual const Type *type() const;
146 // Set an integer offset if we have one, or error otherwise
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
149 #ifndef PRODUCT
150 // Return name of operand
151 virtual const char *Name() const { return "???";}
153 // Methods to output the text version of the operand
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info
159 // Check whether o is a valid oper.
160 static bool notAnOper(const MachOper *o) {
161 if (o == NULL) return true;
162 if (((intptr_t)o & 1) != 0) return true;
163 if (*(address*)o == badAddress) return true; // kill by Node::destruct
164 return false;
165 }
166 #endif // !PRODUCT
167 };
169 //------------------------------MachNode---------------------------------------
170 // Base type for all machine specific nodes. All node classes generated by the
171 // ADLC inherit from this class.
172 class MachNode : public Node {
173 public:
174 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
175 init_class_id(Class_Mach);
176 }
177 // Required boilerplate
178 virtual uint size_of() const { return sizeof(MachNode); }
179 virtual int Opcode() const; // Always equal to MachNode
180 virtual uint rule() const = 0; // Machine-specific opcode
181 // Number of inputs which come before the first operand.
182 // Generally at least 1, to skip the Control input
183 virtual uint oper_input_base() const { return 1; }
184 // Position of constant base node in node's inputs. -1 if
185 // no constant base node input.
186 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
188 // Copy inputs and operands to new node of instruction.
189 // Called from cisc_version() and short_branch_version().
190 // !!!! The method's body is defined in ad_<arch>.cpp file.
191 void fill_new_machnode(MachNode *n, Compile* C) const;
193 // Return an equivalent instruction using memory for cisc_operand position
194 virtual MachNode *cisc_version(int offset, Compile* C);
195 // Modify this instruction's register mask to use stack version for cisc_operand
196 virtual void use_cisc_RegMask();
198 // Support for short branches
199 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
201 // Avoid back to back some instructions on some CPUs.
202 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
204 // instruction implemented with a call
205 bool has_call() const { return (flags() & Flag_has_call) != 0; }
207 // First index in _in[] corresponding to operand, or -1 if there is none
208 int operand_index(uint operand) const;
210 // Register class input is expected in
211 virtual const RegMask &in_RegMask(uint) const;
213 // cisc-spillable instructions redefine for use by in_RegMask
214 virtual const RegMask *cisc_RegMask() const { return NULL; }
216 // If this instruction is a 2-address instruction, then return the
217 // index of the input which must match the output. Not nessecary
218 // for instructions which bind the input and output register to the
219 // same singleton regiser (e.g., Intel IDIV which binds AX to be
220 // both an input and an output). It is nessecary when the input and
221 // output have choices - but they must use the same choice.
222 virtual uint two_adr( ) const { return 0; }
224 // Array of complex operand pointers. Each corresponds to zero or
225 // more leafs. Must be set by MachNode constructor to point to an
226 // internal array of MachOpers. The MachOper array is sized by
227 // specific MachNodes described in the ADL.
228 uint _num_opnds;
229 MachOper **_opnds;
230 uint num_opnds() const { return _num_opnds; }
232 // Emit bytes into cbuf
233 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
234 // Expand node after register allocation.
235 // Node is replaced by several nodes in the postalloc expand phase.
236 // Corresponding methods are generated for nodes if they specify
237 // postalloc_expand. See block.cpp for more documentation.
238 virtual bool requires_postalloc_expand() const { return false; }
239 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
240 // Size of instruction in bytes
241 virtual uint size(PhaseRegAlloc *ra_) const;
242 // Helper function that computes size by emitting code
243 virtual uint emit_size(PhaseRegAlloc *ra_) const;
245 // Return the alignment required (in units of relocInfo::addr_unit())
246 // for this instruction (must be a power of 2)
247 virtual int alignment_required() const { return 1; }
249 // Return the padding (in bytes) to be emitted before this
250 // instruction to properly align it.
251 virtual int compute_padding(int current_offset) const { return 0; }
253 // Return number of relocatable values contained in this instruction
254 virtual int reloc() const { return 0; }
256 // Return number of words used for double constants in this instruction
257 virtual int ins_num_consts() const { return 0; }
259 // Hash and compare over operands. Used to do GVN on machine Nodes.
260 virtual uint hash() const;
261 virtual uint cmp( const Node &n ) const;
263 // Expand method for MachNode, replaces nodes representing pseudo
264 // instructions with a set of nodes which represent real machine
265 // instructions and compute the same value.
266 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
268 // Bottom_type call; value comes from operand0
269 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
270 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
272 // If this is a memory op, return the base pointer and fixed offset.
273 // If there are no such, return NULL. If there are multiple addresses
274 // or the address is indeterminate (rare cases) then return (Node*)-1,
275 // which serves as node bottom.
276 // If the offset is not statically determined, set it to Type::OffsetBot.
277 // This method is free to ignore stack slots if that helps.
278 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
279 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
280 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
282 // Helper for get_base_and_disp: find the base and index input nodes.
283 // Returns the MachOper as determined by memory_operand(), for use, if
284 // needed by the caller. If (MachOper *)-1 is returned, base and index
285 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
286 // index are set to NULL.
287 const MachOper* memory_inputs(Node* &base, Node* &index) const;
289 // Helper for memory_inputs: Which operand carries the necessary info?
290 // By default, returns NULL, which means there is no such operand.
291 // If it returns (MachOper*)-1, this means there are multiple memories.
292 virtual const MachOper* memory_operand() const { return NULL; }
294 // Call "get_base_and_disp" to decide which category of memory is used here.
295 virtual const class TypePtr *adr_type() const;
297 // Apply peephole rule(s) to this instruction
298 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
300 // Top-level ideal Opcode matched
301 virtual int ideal_Opcode() const { return Op_Node; }
303 // Adds the label for the case
304 virtual void add_case_label( int switch_val, Label* blockLabel);
306 // Set the absolute address for methods
307 virtual void method_set( intptr_t addr );
309 // Should we clone rather than spill this instruction?
310 bool rematerialize() const;
312 // Get the pipeline info
313 static const Pipeline *pipeline_class();
314 virtual const Pipeline *pipeline() const;
316 #ifndef PRODUCT
317 virtual const char *Name() const = 0; // Machine-specific name
318 virtual void dump_spec(outputStream *st) const; // Print per-node info
319 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
320 #endif
321 };
323 //------------------------------MachIdealNode----------------------------
324 // Machine specific versions of nodes that must be defined by user.
325 // These are not converted by matcher from ideal nodes to machine nodes
326 // but are inserted into the code by the compiler.
327 class MachIdealNode : public MachNode {
328 public:
329 MachIdealNode( ) {}
331 // Define the following defaults for non-matched machine nodes
332 virtual uint oper_input_base() const { return 0; }
333 virtual uint rule() const { return 9999999; }
334 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
335 };
337 //------------------------------MachTypeNode----------------------------
338 // Machine Nodes that need to retain a known Type.
339 class MachTypeNode : public MachNode {
340 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
341 public:
342 MachTypeNode( ) {}
343 const Type *_bottom_type;
345 virtual const class Type *bottom_type() const { return _bottom_type; }
346 #ifndef PRODUCT
347 virtual void dump_spec(outputStream *st) const;
348 #endif
349 };
351 //------------------------------MachBreakpointNode----------------------------
352 // Machine breakpoint or interrupt Node
353 class MachBreakpointNode : public MachIdealNode {
354 public:
355 MachBreakpointNode( ) {}
356 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
357 virtual uint size(PhaseRegAlloc *ra_) const;
359 #ifndef PRODUCT
360 virtual const char *Name() const { return "Breakpoint"; }
361 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
362 #endif
363 };
365 //------------------------------MachConstantBaseNode--------------------------
366 // Machine node that represents the base address of the constant table.
367 class MachConstantBaseNode : public MachIdealNode {
368 public:
369 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
371 public:
372 MachConstantBaseNode() : MachIdealNode() {
373 init_class_id(Class_MachConstantBase);
374 }
375 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
376 virtual uint ideal_reg() const { return Op_RegP; }
377 virtual uint oper_input_base() const { return 1; }
379 virtual bool requires_postalloc_expand() const;
380 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
382 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
383 virtual uint size(PhaseRegAlloc* ra_) const;
384 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
386 static const RegMask& static_out_RegMask() { return _out_RegMask; }
387 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
389 #ifndef PRODUCT
390 virtual const char* Name() const { return "MachConstantBaseNode"; }
391 virtual void format(PhaseRegAlloc*, outputStream* st) const;
392 #endif
393 };
395 //------------------------------MachConstantNode-------------------------------
396 // Machine node that holds a constant which is stored in the constant table.
397 class MachConstantNode : public MachTypeNode {
398 protected:
399 Compile::Constant _constant; // This node's constant.
401 public:
402 MachConstantNode() : MachTypeNode() {
403 init_class_id(Class_MachConstant);
404 }
406 virtual void eval_constant(Compile* C) {
407 #ifdef ASSERT
408 tty->print("missing MachConstantNode eval_constant function: ");
409 dump();
410 #endif
411 ShouldNotCallThis();
412 }
414 virtual const RegMask &in_RegMask(uint idx) const {
415 if (idx == mach_constant_base_node_input())
416 return MachConstantBaseNode::static_out_RegMask();
417 return MachNode::in_RegMask(idx);
418 }
420 // Input edge of MachConstantBaseNode.
421 virtual uint mach_constant_base_node_input() const { return req() - 1; }
423 int constant_offset();
424 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
425 // Unchecked version to avoid assertions in debug output.
426 int constant_offset_unchecked() const;
427 };
429 //------------------------------MachUEPNode-----------------------------------
430 // Machine Unvalidated Entry Point Node
431 class MachUEPNode : public MachIdealNode {
432 public:
433 MachUEPNode( ) {}
434 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
435 virtual uint size(PhaseRegAlloc *ra_) const;
437 #ifndef PRODUCT
438 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
439 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
440 #endif
441 };
443 //------------------------------MachPrologNode--------------------------------
444 // Machine function Prolog Node
445 class MachPrologNode : public MachIdealNode {
446 public:
447 MachPrologNode( ) {}
448 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
449 virtual uint size(PhaseRegAlloc *ra_) const;
450 virtual int reloc() const;
452 #ifndef PRODUCT
453 virtual const char *Name() const { return "Prolog"; }
454 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
455 #endif
456 };
458 //------------------------------MachEpilogNode--------------------------------
459 // Machine function Epilog Node
460 class MachEpilogNode : public MachIdealNode {
461 public:
462 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
463 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
464 virtual uint size(PhaseRegAlloc *ra_) const;
465 virtual int reloc() const;
466 virtual const Pipeline *pipeline() const;
468 private:
469 bool _do_polling;
471 public:
472 bool do_polling() const { return _do_polling; }
474 // Offset of safepoint from the beginning of the node
475 int safepoint_offset() const;
477 #ifndef PRODUCT
478 virtual const char *Name() const { return "Epilog"; }
479 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
480 #endif
481 };
483 //------------------------------MachNopNode-----------------------------------
484 // Machine function Nop Node
485 class MachNopNode : public MachIdealNode {
486 private:
487 int _count;
488 public:
489 MachNopNode( ) : _count(1) {}
490 MachNopNode( int count ) : _count(count) {}
491 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
492 virtual uint size(PhaseRegAlloc *ra_) const;
494 virtual const class Type *bottom_type() const { return Type::CONTROL; }
496 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
497 virtual const Pipeline *pipeline() const;
498 #ifndef PRODUCT
499 virtual const char *Name() const { return "Nop"; }
500 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
501 virtual void dump_spec(outputStream *st) const { } // No per-operand info
502 #endif
503 };
505 //------------------------------MachSpillCopyNode------------------------------
506 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
507 // location (stack or register).
508 class MachSpillCopyNode : public MachIdealNode {
509 const RegMask *_in; // RegMask for input
510 const RegMask *_out; // RegMask for output
511 const Type *_type;
512 public:
513 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
514 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
515 init_class_id(Class_MachSpillCopy);
516 init_flags(Flag_is_Copy);
517 add_req(NULL);
518 add_req(n);
519 }
520 virtual uint size_of() const { return sizeof(*this); }
521 void set_out_RegMask(const RegMask &out) { _out = &out; }
522 void set_in_RegMask(const RegMask &in) { _in = ∈ }
523 virtual const RegMask &out_RegMask() const { return *_out; }
524 virtual const RegMask &in_RegMask(uint) const { return *_in; }
525 virtual const class Type *bottom_type() const { return _type; }
526 virtual uint ideal_reg() const { return _type->ideal_reg(); }
527 virtual uint oper_input_base() const { return 1; }
528 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
530 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
531 virtual uint size(PhaseRegAlloc *ra_) const;
533 #ifndef PRODUCT
534 virtual const char *Name() const { return "MachSpillCopy"; }
535 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
536 #endif
537 };
539 //------------------------------MachBranchNode--------------------------------
540 // Abstract machine branch Node
541 class MachBranchNode : public MachIdealNode {
542 public:
543 MachBranchNode() : MachIdealNode() {
544 init_class_id(Class_MachBranch);
545 }
546 virtual void label_set(Label* label, uint block_num) = 0;
547 virtual void save_label(Label** label, uint* block_num) = 0;
549 // Support for short branches
550 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
552 virtual bool pinned() const { return true; };
553 };
555 //------------------------------MachNullChkNode--------------------------------
556 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
557 // also some kind of memory op. Turns the indicated MachNode into a
558 // conditional branch with good latency on the ptr-not-null path and awful
559 // latency on the pointer-is-null path.
561 class MachNullCheckNode : public MachBranchNode {
562 public:
563 const uint _vidx; // Index of memop being tested
564 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
565 init_class_id(Class_MachNullCheck);
566 add_req(ctrl);
567 add_req(memop);
568 }
569 virtual uint size_of() const { return sizeof(*this); }
571 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
572 virtual void label_set(Label* label, uint block_num);
573 virtual void save_label(Label** label, uint* block_num);
574 virtual void negate() { }
575 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
576 virtual uint ideal_reg() const { return NotAMachineReg; }
577 virtual const RegMask &in_RegMask(uint) const;
578 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
579 #ifndef PRODUCT
580 virtual const char *Name() const { return "NullCheck"; }
581 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
582 #endif
583 };
585 //------------------------------MachProjNode----------------------------------
586 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
587 // just MachNodes made by the Ideal world that replicate simple projections
588 // but with machine-dependent input & output register masks. Generally
589 // produced as part of calling conventions. Normally I make MachNodes as part
590 // of the Matcher process, but the Matcher is ill suited to issues involving
591 // frame handling, so frame handling is all done in the Ideal world with
592 // occasional callbacks to the machine model for important info.
593 class MachProjNode : public ProjNode {
594 public:
595 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
596 init_class_id(Class_MachProj);
597 }
598 RegMask _rout;
599 const uint _ideal_reg;
600 enum projType {
601 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
602 fat_proj = 999 // Projs killing many regs, defined by _rout
603 };
604 virtual int Opcode() const;
605 virtual const Type *bottom_type() const;
606 virtual const TypePtr *adr_type() const;
607 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
608 virtual const RegMask &out_RegMask() const { return _rout; }
609 virtual uint ideal_reg() const { return _ideal_reg; }
610 // Need size_of() for virtual ProjNode::clone()
611 virtual uint size_of() const { return sizeof(MachProjNode); }
612 #ifndef PRODUCT
613 virtual void dump_spec(outputStream *st) const;
614 #endif
615 };
617 //------------------------------MachIfNode-------------------------------------
618 // Machine-specific versions of IfNodes
619 class MachIfNode : public MachBranchNode {
620 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
621 public:
622 float _prob; // Probability branch goes either way
623 float _fcnt; // Frequency counter
624 MachIfNode() : MachBranchNode() {
625 init_class_id(Class_MachIf);
626 }
627 // Negate conditional branches.
628 virtual void negate() = 0;
629 #ifndef PRODUCT
630 virtual void dump_spec(outputStream *st) const;
631 #endif
632 };
634 //------------------------------MachGotoNode-----------------------------------
635 // Machine-specific versions of GotoNodes
636 class MachGotoNode : public MachBranchNode {
637 public:
638 MachGotoNode() : MachBranchNode() {
639 init_class_id(Class_MachGoto);
640 }
641 };
643 //------------------------------MachFastLockNode-------------------------------------
644 // Machine-specific versions of FastLockNodes
645 class MachFastLockNode : public MachNode {
646 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
647 public:
648 BiasedLockingCounters* _counters;
650 MachFastLockNode() : MachNode() {}
651 };
653 //------------------------------MachReturnNode--------------------------------
654 // Machine-specific versions of subroutine returns
655 class MachReturnNode : public MachNode {
656 virtual uint size_of() const; // Size is bigger
657 public:
658 RegMask *_in_rms; // Input register masks, set during allocation
659 ReallocMark _nesting; // assertion check for reallocations
660 const TypePtr* _adr_type; // memory effects of call or return
661 MachReturnNode() : MachNode() {
662 init_class_id(Class_MachReturn);
663 _adr_type = TypePtr::BOTTOM; // the default: all of memory
664 }
666 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
668 virtual const RegMask &in_RegMask(uint) const;
669 virtual bool pinned() const { return true; };
670 virtual const TypePtr *adr_type() const;
671 };
673 //------------------------------MachSafePointNode-----------------------------
674 // Machine-specific versions of safepoints
675 class MachSafePointNode : public MachReturnNode {
676 public:
677 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
678 JVMState* _jvms; // Pointer to list of JVM State Objects
679 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
680 OopMap* oop_map() const { return _oop_map; }
681 void set_oop_map(OopMap* om) { _oop_map = om; }
683 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
684 init_class_id(Class_MachSafePoint);
685 }
687 virtual JVMState* jvms() const { return _jvms; }
688 void set_jvms(JVMState* s) {
689 _jvms = s;
690 }
691 virtual const Type *bottom_type() const;
693 virtual const RegMask &in_RegMask(uint) const;
695 // Functionality from old debug nodes
696 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
697 Node *frameptr () const { return in(TypeFunc::FramePtr); }
699 Node *local(const JVMState* jvms, uint idx) const {
700 assert(verify_jvms(jvms), "jvms must match");
701 return in(_jvmadj + jvms->locoff() + idx);
702 }
703 Node *stack(const JVMState* jvms, uint idx) const {
704 assert(verify_jvms(jvms), "jvms must match");
705 return in(_jvmadj + jvms->stkoff() + idx);
706 }
707 Node *monitor_obj(const JVMState* jvms, uint idx) const {
708 assert(verify_jvms(jvms), "jvms must match");
709 return in(_jvmadj + jvms->monitor_obj_offset(idx));
710 }
711 Node *monitor_box(const JVMState* jvms, uint idx) const {
712 assert(verify_jvms(jvms), "jvms must match");
713 return in(_jvmadj + jvms->monitor_box_offset(idx));
714 }
715 void set_local(const JVMState* jvms, uint idx, Node *c) {
716 assert(verify_jvms(jvms), "jvms must match");
717 set_req(_jvmadj + jvms->locoff() + idx, c);
718 }
719 void set_stack(const JVMState* jvms, uint idx, Node *c) {
720 assert(verify_jvms(jvms), "jvms must match");
721 set_req(_jvmadj + jvms->stkoff() + idx, c);
722 }
723 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
724 assert(verify_jvms(jvms), "jvms must match");
725 set_req(_jvmadj + jvms->monoff() + idx, c);
726 }
727 };
729 //------------------------------MachCallNode----------------------------------
730 // Machine-specific versions of subroutine calls
731 class MachCallNode : public MachSafePointNode {
732 protected:
733 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
734 virtual uint cmp( const Node &n ) const;
735 virtual uint size_of() const = 0; // Size is bigger
736 public:
737 const TypeFunc *_tf; // Function type
738 address _entry_point; // Address of the method being called
739 float _cnt; // Estimate of number of times called
740 uint _argsize; // Size of argument block on stack
742 const TypeFunc* tf() const { return _tf; }
743 const address entry_point() const { return _entry_point; }
744 const float cnt() const { return _cnt; }
745 uint argsize() const { return _argsize; }
747 void set_tf(const TypeFunc* tf) { _tf = tf; }
748 void set_entry_point(address p) { _entry_point = p; }
749 void set_cnt(float c) { _cnt = c; }
750 void set_argsize(int s) { _argsize = s; }
752 MachCallNode() : MachSafePointNode() {
753 init_class_id(Class_MachCall);
754 }
756 virtual const Type *bottom_type() const;
757 virtual bool pinned() const { return false; }
758 virtual const Type *Value( PhaseTransform *phase ) const;
759 virtual const RegMask &in_RegMask(uint) const;
760 virtual int ret_addr_offset() { return 0; }
762 bool returns_long() const { return tf()->return_type() == T_LONG; }
763 bool return_value_is_used() const;
764 #ifndef PRODUCT
765 virtual void dump_spec(outputStream *st) const;
766 #endif
767 };
769 //------------------------------MachCallJavaNode------------------------------
770 // "Base" class for machine-specific versions of subroutine calls
771 class MachCallJavaNode : public MachCallNode {
772 protected:
773 virtual uint cmp( const Node &n ) const;
774 virtual uint size_of() const; // Size is bigger
775 public:
776 ciMethod* _method; // Method being direct called
777 int _bci; // Byte Code index of call byte code
778 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
779 bool _method_handle_invoke; // Tells if the call has to preserve SP
780 MachCallJavaNode() : MachCallNode() {
781 init_class_id(Class_MachCallJava);
782 }
784 virtual const RegMask &in_RegMask(uint) const;
786 #ifndef PRODUCT
787 virtual void dump_spec(outputStream *st) const;
788 #endif
789 };
791 //------------------------------MachCallStaticJavaNode------------------------
792 // Machine-specific versions of monomorphic subroutine calls
793 class MachCallStaticJavaNode : public MachCallJavaNode {
794 virtual uint cmp( const Node &n ) const;
795 virtual uint size_of() const; // Size is bigger
796 public:
797 const char *_name; // Runtime wrapper name
798 MachCallStaticJavaNode() : MachCallJavaNode() {
799 init_class_id(Class_MachCallStaticJava);
800 }
802 // If this is an uncommon trap, return the request code, else zero.
803 int uncommon_trap_request() const;
805 virtual int ret_addr_offset();
806 #ifndef PRODUCT
807 virtual void dump_spec(outputStream *st) const;
808 void dump_trap_args(outputStream *st) const;
809 #endif
810 };
812 //------------------------------MachCallDynamicJavaNode------------------------
813 // Machine-specific versions of possibly megamorphic subroutine calls
814 class MachCallDynamicJavaNode : public MachCallJavaNode {
815 public:
816 int _vtable_index;
817 MachCallDynamicJavaNode() : MachCallJavaNode() {
818 init_class_id(Class_MachCallDynamicJava);
819 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
820 }
821 virtual int ret_addr_offset();
822 #ifndef PRODUCT
823 virtual void dump_spec(outputStream *st) const;
824 #endif
825 };
827 //------------------------------MachCallRuntimeNode----------------------------
828 // Machine-specific versions of subroutine calls
829 class MachCallRuntimeNode : public MachCallNode {
830 virtual uint cmp( const Node &n ) const;
831 virtual uint size_of() const; // Size is bigger
832 public:
833 const char *_name; // Printable name, if _method is NULL
834 MachCallRuntimeNode() : MachCallNode() {
835 init_class_id(Class_MachCallRuntime);
836 }
837 virtual int ret_addr_offset();
838 #ifndef PRODUCT
839 virtual void dump_spec(outputStream *st) const;
840 #endif
841 };
843 class MachCallLeafNode: public MachCallRuntimeNode {
844 public:
845 MachCallLeafNode() : MachCallRuntimeNode() {
846 init_class_id(Class_MachCallLeaf);
847 }
848 };
850 //------------------------------MachHaltNode-----------------------------------
851 // Machine-specific versions of halt nodes
852 class MachHaltNode : public MachReturnNode {
853 public:
854 virtual JVMState* jvms() const;
855 };
858 //------------------------------MachTempNode-----------------------------------
859 // Node used by the adlc to construct inputs to represent temporary registers
860 class MachTempNode : public MachNode {
861 private:
862 MachOper *_opnd_array[1];
864 public:
865 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
866 virtual uint rule() const { return 9999999; }
867 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
869 MachTempNode(MachOper* oper) {
870 init_class_id(Class_MachTemp);
871 _num_opnds = 1;
872 _opnds = _opnd_array;
873 add_req(NULL);
874 _opnds[0] = oper;
875 }
876 virtual uint size_of() const { return sizeof(MachTempNode); }
878 #ifndef PRODUCT
879 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
880 virtual const char *Name() const { return "MachTemp";}
881 #endif
882 };
886 //------------------------------labelOper--------------------------------------
887 // Machine-independent version of label operand
888 class labelOper : public MachOper {
889 private:
890 virtual uint num_edges() const { return 0; }
891 public:
892 // Supported for fixed size branches
893 Label* _label; // Label for branch(es)
895 uint _block_num;
897 labelOper() : _block_num(0), _label(0) {}
899 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
901 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
903 virtual MachOper *clone(Compile* C) const;
905 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
907 virtual uint opcode() const;
909 virtual uint hash() const;
910 virtual uint cmp( const MachOper &oper ) const;
911 #ifndef PRODUCT
912 virtual const char *Name() const { return "Label";}
914 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
915 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
916 #endif
917 };
920 //------------------------------methodOper--------------------------------------
921 // Machine-independent version of method operand
922 class methodOper : public MachOper {
923 private:
924 virtual uint num_edges() const { return 0; }
925 public:
926 intptr_t _method; // Address of method
927 methodOper() : _method(0) {}
928 methodOper(intptr_t method) : _method(method) {}
930 virtual MachOper *clone(Compile* C) const;
932 virtual intptr_t method() const { return _method; }
934 virtual uint opcode() const;
936 virtual uint hash() const;
937 virtual uint cmp( const MachOper &oper ) const;
938 #ifndef PRODUCT
939 virtual const char *Name() const { return "Method";}
941 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
942 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
943 #endif
944 };
946 #endif // SHARE_VM_OPTO_MACHNODE_HPP