jdk8-mips64-public/hotspot: src/share/vm/opto/machnode.cpp@d5fc211aea19

6633953: type2aelembytes{T_ADDRESS} should be 8 bytes in 64 bit VM
Summary: T_ADDRESS size is defined as 'int' size (4 bytes) but C2 use it for raw pointers and as memory type for StoreP and LoadP nodes.
Reviewed-by: jrose

     1 /*

     2  * Copyright 1997-2007 Sun Microsystems, Inc.  All Rights Reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

    20  * CA 95054 USA or visit www.sun.com if you need additional information or

    21  * have any questions.

    22  *

    23  */

    25 #include "incls/_precompiled.incl"

    26 #include "incls/_machnode.cpp.incl"

    28 //=============================================================================

    29 // Return the value requested

    30 // result register lookup, corresponding to int_format

    31 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {

    32   return (int)ra_->get_encode(node);

    33 }

    34 // input register lookup, corresponding to ext_format

    35 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {

    36   return (int)(ra_->get_encode(node->in(idx)));

    37 }

    38 intptr_t  MachOper::constant() const { return 0x00; }

    39 bool MachOper::constant_is_oop() const { return false; }

    40 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }

    41 jfloat  MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }

    42 jlong   MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }

    43 TypeOopPtr *MachOper::oop() const { return NULL; }

    44 int MachOper::ccode() const { return 0x00; }

    45 // A zero, default, indicates this value is not needed.

    46 // May need to lookup the base register, as done in int_ and ext_format

    47 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    48 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    49 int MachOper::scale()  const { return 0x00; }

    50 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    51 int MachOper::constant_disp()  const { return 0; }

    52 int MachOper::base_position()  const { return -1; }  // no base input

    53 int MachOper::index_position() const { return -1; }  // no index input

    54 // Check for PC-Relative displacement

    55 bool MachOper::disp_is_oop() const { return false; }

    56 // Return the label

    57 Label*   MachOper::label()  const { ShouldNotReachHere(); return 0; }

    58 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }

    61 //------------------------------negate-----------------------------------------

    62 // Negate conditional branches.  Error for non-branch operands

    63 void MachOper::negate() {

    64   ShouldNotCallThis();

    65 }

    67 //-----------------------------type--------------------------------------------

    68 const Type *MachOper::type() const {

    69   return Type::BOTTOM;

    70 }

    72 //------------------------------in_RegMask-------------------------------------

    73 const RegMask *MachOper::in_RegMask(int index) const {

    74   ShouldNotReachHere();

    75   return NULL;

    76 }

    78 //------------------------------dump_spec--------------------------------------

    79 // Print any per-operand special info

    80 #ifndef PRODUCT

    81 void MachOper::dump_spec(outputStream *st) const { }

    82 #endif

    84 //------------------------------hash-------------------------------------------

    85 // Print any per-operand special info

    86 uint MachOper::hash() const {

    87   ShouldNotCallThis();

    88   return 5;

    89 }

    91 //------------------------------cmp--------------------------------------------

    92 // Print any per-operand special info

    93 uint MachOper::cmp( const MachOper &oper ) const {

    94   ShouldNotCallThis();

    95   return opcode() == oper.opcode();

    96 }

    98 //------------------------------hash-------------------------------------------

    99 // Print any per-operand special info

   100 uint labelOper::hash() const {

   101   return _block_num;

   102 }

   104 //------------------------------cmp--------------------------------------------

   105 // Print any per-operand special info

   106 uint labelOper::cmp( const MachOper &oper ) const {

   107   return (opcode() == oper.opcode()) && (_label == oper.label());

   108 }

   110 //------------------------------hash-------------------------------------------

   111 // Print any per-operand special info

   112 uint methodOper::hash() const {

   113   return (uint)_method;

   114 }

   116 //------------------------------cmp--------------------------------------------

   117 // Print any per-operand special info

   118 uint methodOper::cmp( const MachOper &oper ) const {

   119   return (opcode() == oper.opcode()) && (_method == oper.method());

   120 }

   123 //=============================================================================

   124 //------------------------------MachNode---------------------------------------

   126 //------------------------------emit-------------------------------------------

   127 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {

   128   #ifdef ASSERT

   129   tty->print("missing MachNode emit function: ");

   130   dump();

   131   #endif

   132   ShouldNotCallThis();

   133 }

   135 //------------------------------size-------------------------------------------

   136 // Size of instruction in bytes

   137 uint MachNode::size(PhaseRegAlloc *ra_) const {

   138   // If a virtual was not defined for this specific instruction,

   139   // Call the helper which finds the size by emiting the bits.

   140   return MachNode::emit_size(ra_);

   141 }

   143 //------------------------------size-------------------------------------------

   144 // Helper function that computes size by emitting code

   145 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {

   146   // Emit into a trash buffer and count bytes emitted.

   147   assert(ra_ == ra_->C->regalloc(), "sanity");

   148   return ra_->C->scratch_emit_size(this);

   149 }

   153 //------------------------------hash-------------------------------------------

   154 uint MachNode::hash() const {

   155   uint no = num_opnds();

   156   uint sum = rule();

   157   for( uint i=0; i<no; i++ )

   158     sum += _opnds[i]->hash();

   159   return sum+Node::hash();

   160 }

   162 //-----------------------------cmp---------------------------------------------

   163 uint MachNode::cmp( const Node &node ) const {

   164   MachNode& n = *((Node&)node).as_Mach();

   165   uint no = num_opnds();

   166   if( no != n.num_opnds() ) return 0;

   167   if( rule() != n.rule() ) return 0;

   168   for( uint i=0; i<no; i++ )    // All operands must match

   169     if( !_opnds[i]->cmp( *n._opnds[i] ) )

   170       return 0;                 // mis-matched operands

   171   return 1;                     // match

   172 }

   174 // Return an equivalent instruction using memory for cisc_operand position

   175 MachNode *MachNode::cisc_version(int offset, Compile* C) {

   176   ShouldNotCallThis();

   177   return NULL;

   178 }

   180 void MachNode::use_cisc_RegMask() {

   181   ShouldNotReachHere();

   182 }

   185 //-----------------------------in_RegMask--------------------------------------

   186 const RegMask &MachNode::in_RegMask( uint idx ) const {

   187   uint numopnds = num_opnds();        // Virtual call for number of operands

   188   uint skipped   = oper_input_base(); // Sum of leaves skipped so far

   189   if( idx < skipped ) {

   190     assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );

   191     assert( idx == 1, "expected base ptr here" );

   192     // debug info can be anywhere

   193     return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];

   194   }

   195   uint opcnt     = 1;                 // First operand

   196   uint num_edges = _opnds[1]->num_edges(); // leaves for first operand

   197   while( idx >= skipped+num_edges ) {

   198     skipped += num_edges;

   199     opcnt++;                          // Bump operand count

   200     assert( opcnt < numopnds, "Accessing non-existent operand" );

   201     num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand

   202   }

   204   const RegMask *rm = cisc_RegMask();

   205   if( rm == NULL || (int)opcnt != cisc_operand() ) {

   206     rm = _opnds[opcnt]->in_RegMask(idx-skipped);

   207   }

   208   return *rm;

   209 }

   211 //-----------------------------memory_inputs--------------------------------

   212 const MachOper*  MachNode::memory_inputs(Node* &base, Node* &index) const {

   213   const MachOper* oper = memory_operand();

   215   if (oper == (MachOper*)-1) {

   216     base = NodeSentinel;

   217     index = NodeSentinel;

   218   } else {

   219     base = NULL;

   220     index = NULL;

   221     if (oper != NULL) {

   222       // It has a unique memory operand.  Find its index.

   223       int oper_idx = num_opnds();

   224       while (--oper_idx >= 0) {

   225         if (_opnds[oper_idx] == oper)  break;

   226       }

   227       int oper_pos = operand_index(oper_idx);

   228       int base_pos = oper->base_position();

   229       if (base_pos >= 0) {

   230         base = _in[oper_pos+base_pos];

   231       }

   232       int index_pos = oper->index_position();

   233       if (index_pos >= 0) {

   234         index = _in[oper_pos+index_pos];

   235       }

   236     }

   237   }

   239   return oper;

   240 }

   242 //-----------------------------get_base_and_disp----------------------------

   243 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {

   245   // Find the memory inputs using our helper function

   246   Node* base;

   247   Node* index;

   248   const MachOper* oper = memory_inputs(base, index);

   250   if (oper == NULL) {

   251     // Base has been set to NULL

   252     offset = 0;

   253   } else if (oper == (MachOper*)-1) {

   254     // Base has been set to NodeSentinel

   255     // There is not a unique memory use here.  We will fall to AliasIdxBot.

   256     offset = Type::OffsetBot;

   257   } else {

   258     // Base may be NULL, even if offset turns out to be != 0

   260     intptr_t disp = oper->constant_disp();

   261     int scale = oper->scale();

   262     // Now we have collected every part of the ADLC MEMORY_INTER.

   263     // See if it adds up to a base + offset.

   264     if (index != NULL) {

   265       if (!index->is_Con()) {

   266         disp = Type::OffsetBot;

   267       } else if (disp != Type::OffsetBot) {

   268         const TypeX* ti = index->bottom_type()->isa_intptr_t();

   269         if (ti == NULL) {

   270           disp = Type::OffsetBot;  // a random constant??

   271         } else {

   272           disp += ti->get_con() << scale;

   273         }

   274       }

   275     }

   276     offset = disp;

   278     // In i486.ad, indOffset32X uses base==RegI and disp==RegP,

   279     // this will prevent alias analysis without the following support:

   280     // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,

   281     // Add the offset determined by the "base", or use Type::OffsetBot.

   282     if( adr_type == TYPE_PTR_SENTINAL ) {

   283       const TypePtr *t_disp = oper->disp_as_type();  // only !NULL for indOffset32X

   284       if (t_disp != NULL) {

   285         offset = Type::OffsetBot;

   286         const Type* t_base = base->bottom_type();

   287         if (t_base->isa_intptr_t()) {

   288           const TypeX *t_offset = t_base->is_intptr_t();

   289           if( t_offset->is_con() ) {

   290             offset = t_offset->get_con();

   291           }

   292         }

   293         adr_type = t_disp->add_offset(offset);

   294       }

   295     }

   297   }

   298   return base;

   299 }

   302 //---------------------------------adr_type---------------------------------

   303 const class TypePtr *MachNode::adr_type() const {

   304   intptr_t offset = 0;

   305   const TypePtr *adr_type = TYPE_PTR_SENTINAL;  // attempt computing adr_type

   306   const Node *base = get_base_and_disp(offset, adr_type);

   307   if( adr_type != TYPE_PTR_SENTINAL ) {

   308     return adr_type;      // get_base_and_disp has the answer

   309   }

   311   // Direct addressing modes have no base node, simply an indirect

   312   // offset, which is always to raw memory.

   313   // %%%%% Someday we'd like to allow constant oop offsets which

   314   // would let Intel load from static globals in 1 instruction.

   315   // Currently Intel requires 2 instructions and a register temp.

   316   if (base == NULL) {

   317     // NULL base, zero offset means no memory at all (a null pointer!)

   318     if (offset == 0) {

   319       return NULL;

   320     }

   321     // NULL base, any offset means any pointer whatever

   322     if (offset == Type::OffsetBot) {

   323       return TypePtr::BOTTOM;

   324     }

   325     // %%% make offset be intptr_t

   326     assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr");

   327     return TypeRawPtr::BOTTOM;

   328   }

   330   // base of -1 with no particular offset means all of memory

   331   if (base == NodeSentinel)  return TypePtr::BOTTOM;

   333   const Type* t = base->bottom_type();

   334   if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {

   335     // We cannot assert that the offset does not look oop-ish here.

   336     // Depending on the heap layout the cardmark base could land

   337     // inside some oopish region.  It definitely does for Win2K.

   338     // The sum of cardmark-base plus shift-by-9-oop lands outside

   339     // the oop-ish area but we can't assert for that statically.

   340     return TypeRawPtr::BOTTOM;

   341   }

   343   const TypePtr *tp = t->isa_ptr();

   345   // be conservative if we do not recognize the type

   346   if (tp == NULL) {

   347     return TypePtr::BOTTOM;

   348   }

   349   assert(tp->base() != Type::AnyPtr, "not a bare pointer");

   351   return tp->add_offset(offset);

   352 }

   355 //-----------------------------operand_index---------------------------------

   356 int MachNode::operand_index( uint operand ) const {

   357   if( operand < 1 )  return -1;

   358   assert(operand < num_opnds(), "oob");

   359   if( _opnds[operand]->num_edges() == 0 )  return -1;

   361   uint skipped   = oper_input_base(); // Sum of leaves skipped so far

   362   for (uint opcnt = 1; opcnt < operand; opcnt++) {

   363     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand

   364     skipped += num_edges;

   365   }

   366   return skipped;

   367 }

   370 //------------------------------negate-----------------------------------------

   371 // Negate conditional branches.  Error for non-branch Nodes

   372 void MachNode::negate() {

   373   ShouldNotCallThis();

   374 }

   376 //------------------------------peephole---------------------------------------

   377 // Apply peephole rule(s) to this instruction

   378 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {

   379   return NULL;

   380 }

   382 //------------------------------add_case_label---------------------------------

   383 // Adds the label for the case

   384 void MachNode::add_case_label( int index_num, Label* blockLabel) {

   385   ShouldNotCallThis();

   386 }

   388 //------------------------------label_set--------------------------------------

   389 // Set the Label for a LabelOper, if an operand for this instruction

   390 void MachNode::label_set( Label& label, uint block_num ) {

   391   ShouldNotCallThis();

   392 }

   394 //------------------------------method_set-------------------------------------

   395 // Set the absolute address of a method

   396 void MachNode::method_set( intptr_t addr ) {

   397   ShouldNotCallThis();

   398 }

   400 //------------------------------rematerialize----------------------------------

   401 bool MachNode::rematerialize() const {

   402   // Temps are always rematerializable

   403   if (is_MachTemp()) return true;

   405   uint r = rule();              // Match rule

   406   if( r <  Matcher::_begin_rematerialize ||

   407       r >= Matcher::_end_rematerialize )

   408     return false;

   410   // For 2-address instructions, the input live range is also the output

   411   // live range.  Remateralizing does not make progress on the that live range.

   412   if( two_adr() )  return false;

   414   // Check for rematerializing float constants, or not

   415   if( !Matcher::rematerialize_float_constants ) {

   416     int op = ideal_Opcode();

   417     if( op == Op_ConF || op == Op_ConD )

   418       return false;

   419   }

   421   // Defining flags - can't spill these!  Must remateralize.

   422   if( ideal_reg() == Op_RegFlags )

   423     return true;

   425   // Stretching lots of inputs - don't do it.

   426   if( req() > 2 )

   427     return false;

   429   // Don't remateralize somebody with bound inputs - it stretches a

   430   // fixed register lifetime.

   431   uint idx = oper_input_base();

   432   if( req() > idx ) {

   433     const RegMask &rm = in_RegMask(idx);

   434     if( rm.is_bound1() || rm.is_bound2() )

   435       return false;

   436   }

   438   return true;

   439 }

   441 #ifndef PRODUCT

   442 //------------------------------dump_spec--------------------------------------

   443 // Print any per-operand special info

   444 void MachNode::dump_spec(outputStream *st) const {

   445   uint cnt = num_opnds();

   446   for( uint i=0; i<cnt; i++ )

   447     _opnds[i]->dump_spec(st);

   448   const TypePtr *t = adr_type();

   449   if( t ) {

   450     Compile* C = Compile::current();

   451     if( C->alias_type(t)->is_volatile() )

   452       st->print(" Volatile!");

   453   }

   454 }

   456 //------------------------------dump_format------------------------------------

   457 // access to virtual

   458 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {

   459   format(ra, st); // access to virtual

   460 }

   461 #endif

   463 //=============================================================================

   464 #ifndef PRODUCT

   465 void MachTypeNode::dump_spec(outputStream *st) const {

   466   _bottom_type->dump_on(st);

   467 }

   468 #endif

   470 //=============================================================================

   471 #ifndef PRODUCT

   472 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {

   473   int reg = ra_->get_reg_first(in(1)->in(_vidx));

   474   tty->print("%s %s", Name(), Matcher::regName[reg]);

   475 }

   476 #endif

   478 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {

   479   // only emits entries in the null-pointer exception handler table

   480 }

   482 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {

   483   if( idx == 0 ) return RegMask::Empty;

   484   else return in(1)->as_Mach()->out_RegMask();

   485 }

   487 //=============================================================================

   488 const Type *MachProjNode::bottom_type() const {

   489   if( _ideal_reg == fat_proj ) return Type::BOTTOM;

   490   // Try the normal mechanism first

   491   const Type *t = in(0)->bottom_type();

   492   if( t->base() == Type::Tuple ) {

   493     const TypeTuple *tt = t->is_tuple();

   494     if (_con < tt->cnt())

   495       return tt->field_at(_con);

   496   }

   497   // Else use generic type from ideal register set

   498   assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");

   499   return Type::mreg2type[_ideal_reg];

   500 }

   502 const TypePtr *MachProjNode::adr_type() const {

   503   if (bottom_type() == Type::MEMORY) {

   504     // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM

   505     const TypePtr* adr_type = in(0)->adr_type();

   506     #ifdef ASSERT

   507     if (!is_error_reported() && !Node::in_dump())

   508       assert(adr_type != NULL, "source must have adr_type");

   509     #endif

   510     return adr_type;

   511   }

   512   assert(bottom_type()->base() != Type::Memory, "no other memories?");

   513   return NULL;

   514 }

   516 #ifndef PRODUCT

   517 void MachProjNode::dump_spec(outputStream *st) const {

   518   ProjNode::dump_spec(st);

   519   switch (_ideal_reg) {

   520   case unmatched_proj:  st->print("/unmatched");                         break;

   521   case fat_proj:        st->print("/fat"); if (WizardMode) _rout.dump(); break;

   522   }

   523 }

   524 #endif

   526 //=============================================================================

   527 #ifndef PRODUCT

   528 void MachIfNode::dump_spec(outputStream *st) const {

   529   st->print("P=%f, C=%f",_prob, _fcnt);

   530 }

   531 #endif

   533 //=============================================================================

   534 uint MachReturnNode::size_of() const { return sizeof(*this); }

   536 //------------------------------Registers--------------------------------------

   537 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {

   538   return _in_rms[idx];

   539 }

   541 const TypePtr *MachReturnNode::adr_type() const {

   542   // most returns and calls are assumed to consume & modify all of memory

   543   // the matcher will copy non-wide adr_types from ideal originals

   544   return _adr_type;

   545 }

   547 //=============================================================================

   548 const Type *MachSafePointNode::bottom_type() const {  return TypeTuple::MEMBAR; }

   550 //------------------------------Registers--------------------------------------

   551 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {

   552   // Values in the domain use the users calling convention, embodied in the

   553   // _in_rms array of RegMasks.

   554   if( idx < TypeFunc::Parms ) return _in_rms[idx];

   556   if (SafePointNode::needs_polling_address_input() &&

   557       idx == TypeFunc::Parms &&

   558       ideal_Opcode() == Op_SafePoint) {

   559     return MachNode::in_RegMask(idx);

   560   }

   562   // Values outside the domain represent debug info

   563   return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];

   564 }

   567 //=============================================================================

   569 uint MachCallNode::cmp( const Node &n ) const

   570 { return _tf == ((MachCallNode&)n)._tf; }

   571 const Type *MachCallNode::bottom_type() const { return tf()->range(); }

   572 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }

   574 #ifndef PRODUCT

   575 void MachCallNode::dump_spec(outputStream *st) const {

   576   st->print("# ");

   577   tf()->dump_on(st);

   578   if (_cnt != COUNT_UNKNOWN)  st->print(" C=%f",_cnt);

   579   if (jvms() != NULL)  jvms()->dump_spec(st);

   580 }

   581 #endif

   584 bool MachCallNode::return_value_is_used() const {

   585   if (tf()->range()->cnt() == TypeFunc::Parms) {

   586     // void return

   587     return false;

   588   }

   590   // find the projection corresponding to the return value

   591   for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {

   592     Node *use = fast_out(i);

   593     if (!use->is_Proj()) continue;

   594     if (use->as_Proj()->_con == TypeFunc::Parms) {

   595       return true;

   596     }

   597   }

   598   return false;

   599 }

   602 //------------------------------Registers--------------------------------------

   603 const RegMask &MachCallNode::in_RegMask( uint idx ) const {

   604   // Values in the domain use the users calling convention, embodied in the

   605   // _in_rms array of RegMasks.

   606   if (idx < tf()->domain()->cnt())  return _in_rms[idx];

   607   // Values outside the domain represent debug info

   608   return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];

   609 }

   611 //=============================================================================

   612 uint MachCallJavaNode::size_of() const { return sizeof(*this); }

   613 uint MachCallJavaNode::cmp( const Node &n ) const {

   614   MachCallJavaNode &call = (MachCallJavaNode&)n;

   615   return MachCallNode::cmp(call) && _method->equals(call._method);

   616 }

   617 #ifndef PRODUCT

   618 void MachCallJavaNode::dump_spec(outputStream *st) const {

   619   if( _method ) {

   620     _method->print_short_name(st);

   621     st->print(" ");

   622   }

   623   MachCallNode::dump_spec(st);

   624 }

   625 #endif

   627 //=============================================================================

   628 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }

   629 uint MachCallStaticJavaNode::cmp( const Node &n ) const {

   630   MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;

   631   return MachCallJavaNode::cmp(call) && _name == call._name;

   632 }

   634 //----------------------------uncommon_trap_request----------------------------

   635 // If this is an uncommon trap, return the request code, else zero.

   636 int MachCallStaticJavaNode::uncommon_trap_request() const {

   637   if (_name != NULL && !strcmp(_name, "uncommon_trap")) {

   638     return CallStaticJavaNode::extract_uncommon_trap_request(this);

   639   }

   640   return 0;

   641 }

   643 #ifndef PRODUCT

   644 // Helper for summarizing uncommon_trap arguments.

   645 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {

   646   int trap_req = uncommon_trap_request();

   647   if (trap_req != 0) {

   648     char buf[100];

   649     st->print("(%s)",

   650                Deoptimization::format_trap_request(buf, sizeof(buf),

   651                                                    trap_req));

   652   }

   653 }

   655 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {

   656   st->print("Static ");

   657   if (_name != NULL) {

   658     st->print("wrapper for: %s", _name );

   659     dump_trap_args(st);

   660     st->print(" ");

   661   }

   662   MachCallJavaNode::dump_spec(st);

   663 }

   664 #endif

   666 //=============================================================================

   667 #ifndef PRODUCT

   668 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {

   669   st->print("Dynamic ");

   670   MachCallJavaNode::dump_spec(st);

   671 }

   672 #endif

   673 //=============================================================================

   674 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }

   675 uint MachCallRuntimeNode::cmp( const Node &n ) const {

   676   MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;

   677   return MachCallNode::cmp(call) && !strcmp(_name,call._name);

   678 }

   679 #ifndef PRODUCT

   680 void MachCallRuntimeNode::dump_spec(outputStream *st) const {

   681   st->print("%s ",_name);

   682   MachCallNode::dump_spec(st);

   683 }

   684 #endif

   685 //=============================================================================

   686 // A shared JVMState for all HaltNodes.  Indicates the start of debug info

   687 // is at TypeFunc::Parms.  Only required for SOE register spill handling -

   688 // to indicate where the stack-slot-only debug info inputs begin.

   689 // There is no other JVM state needed here.

   690 JVMState jvms_for_throw(0);

   691 JVMState *MachHaltNode::jvms() const {

   692   return &jvms_for_throw;

   693 }

   695 //=============================================================================

   696 #ifndef PRODUCT

   697 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {

   698   st->print("B%d", _block_num);

   699 }

   700 #endif // PRODUCT

   702 //=============================================================================

   703 #ifndef PRODUCT

   704 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {

   705   st->print(INTPTR_FORMAT, _method);

   706 }

   707 #endif // PRODUCT

Mercurial > jdk8-mips64-public > hotspot / file revision

src/share/vm/opto/machnode.cpp@d5fc211aea19

src/share/vm/opto/machnode.cpp