Mercurial > jdk8-mips64-public > hotspot / file revision
src/cpu/mips/vm/c1_Runtime1_mips.cpp@cce12244eb8c
src/cpu/mips/vm/c1_Runtime1_mips.cpp
Fri, 27 Jul 2018 15:17:45 +0800
- author
- wangxue
- date
- Fri, 27 Jul 2018 15:17:45 +0800
- changeset 9205
- cce12244eb8c
- parent 9171
- c67c94f5b85d
- child 9207
- 874b8588c4ae
- permissions
- -rw-r--r--
#7376 Implement MacroAssembler::incr_allocated_bytes
1 /*
2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/assembler.hpp"
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "nativeInst_mips.hpp"
33 #include "oops/compiledICHolder.hpp"
34 #include "oops/oop.inline.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "register_mips.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/signature.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "utilities/macros.hpp"
41 #include "vmreg_mips.inline.hpp"
42 #if INCLUDE_ALL_GCS
43 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
44 #endif
47 // Implementation of StubAssembler
48 // this method will preserve the stack space for arguments as indicated by args_size
49 // for stack alignment consideration, you cannot call this with argument in stack.
50 // if you need >3 arguments, you must implement this method yourself.
51 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
52 // i use S7 for edi.
53 // setup registers
54 const Register thread = TREG; // is callee-saved register (Visual C++ calling conventions)
55 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
56 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
57 assert(args_size >= 0, "illegal args_size");
58 bool align_stack = false;
59 #ifdef _LP64
60 // At a method handle call, the stack may not be properly aligned
61 // when returning with an exception.
62 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
63 #endif
65 set_num_rt_args(1 + args_size);
68 // push java thread (becomes first argument of C function)
69 get_thread(thread);
70 move(A0, thread);
72 if(!align_stack) {
73 set_last_Java_frame(thread, NOREG, FP, NULL);
74 } else {
75 address the_pc = pc();
76 set_last_Java_frame(thread, NOREG, FP, the_pc);
77 move(AT, -(StackAlignmentInBytes));
78 andr(SP, SP, AT);
79 }
81 relocate(relocInfo::internal_pc_type);
82 {
83 #ifndef _LP64
84 int save_pc = (int)pc() + 12 + NativeCall::return_address_offset;
85 lui(AT, Assembler::split_high(save_pc));
86 addiu(AT, AT, Assembler::split_low(save_pc));
87 #else
88 uintptr_t save_pc = (uintptr_t)pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
89 li48(AT, save_pc);
90 #endif
91 }
92 st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
94 // do the call
95 #ifndef _LP64
96 lui(T9, Assembler::split_high((int)entry));
97 addiu(T9, T9, Assembler::split_low((int)entry));
98 #else
99 li48(T9, (intptr_t)entry);
100 #endif
101 jalr(T9);
102 delayed()->nop();
104 int call_offset = offset();
106 // verify callee-saved register
107 #ifdef ASSERT
108 guarantee(thread != V0, "change this code");
109 push(V0);
110 {
111 Label L;
112 get_thread(V0);
113 beq(thread, V0, L);
114 delayed()->nop();
115 int3();
116 stop("StubAssembler::call_RT: edi not callee saved?");
117 bind(L);
118 }
119 super_pop(V0);
120 #endif
121 // discard thread and arguments
122 ld_ptr(SP, thread, in_bytes(JavaThread::last_Java_sp_offset())); //by yyq
123 reset_last_Java_frame(thread, true);
124 // check for pending exceptions
125 {
126 Label L;
127 ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
128 beq(AT, R0, L);
129 delayed()->nop();
130 // exception pending => remove activation and forward to exception handler
131 // make sure that the vm_results are cleared
132 if (oop_result1->is_valid()) {
133 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
134 }
135 if (metadata_result->is_valid()) {
136 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
137 }
138 // the leave() in x86 just pops ebp and remains the return address on the top
139 // of stack
140 // the return address will be needed by forward_exception_entry()
141 if (frame_size() == no_frame_size) {
142 addiu(SP, FP, wordSize);
143 ld_ptr(FP, SP, (-1) * wordSize);
144 jmp(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
145 delayed()->nop();
146 } else if (_stub_id == Runtime1::forward_exception_id) {
147 should_not_reach_here();
148 } else {
149 jmp(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type);
150 delayed()->nop();
151 }
152 bind(L);
153 }
154 // get oop results if there are any and reset the values in the thread
155 if (oop_result1->is_valid()) {
156 ld_ptr(oop_result1, thread, in_bytes(JavaThread::vm_result_offset()));
157 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
158 verify_oop(oop_result1);
159 }
160 if (metadata_result->is_valid()) {
161 ld_ptr(metadata_result, thread, in_bytes(JavaThread::vm_result_2_offset()));
162 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
163 verify_oop(metadata_result);
164 }
165 return call_offset;
166 }
169 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
170 if (arg1 != A1) move(A1, arg1);
171 return call_RT(oop_result1, metadata_result, entry, 1);
172 }
175 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
176 if (arg1!=A1) move(A1, arg1);
177 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
178 return call_RT(oop_result1, metadata_result, entry, 2);
179 }
182 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
183 if (arg1!=A1) move(A1, arg1);
184 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
185 if (arg3!=A3) move(A3, arg3); assert(arg3 != A1 && arg3 != A2, "smashed argument");
186 return call_RT(oop_result1, metadata_result, entry, 3);
187 }
190 // Implementation of StubFrame
192 class StubFrame: public StackObj {
193 private:
194 StubAssembler* _sasm;
196 public:
197 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
198 void load_argument(int offset_in_words, Register reg);
200 ~StubFrame();
201 };
204 #define __ _sasm->
206 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
207 _sasm = sasm;
208 __ set_info(name, must_gc_arguments);
209 __ enter();
210 }
213 //FIXME, I have no idea the frame architecture of mips
214 // load parameters that were stored with LIR_Assembler::store_parameter
215 // Note: offsets for store_parameter and load_argument must match
216 void StubFrame::load_argument(int offset_in_words, Register reg) {
217 //ebp + 0: link
218 // + 1: return address
219 // + 2: argument with offset 0
220 // + 3: argument with offset 1
221 // + 4: ...
222 __ ld_ptr(reg, Address(FP, (offset_in_words + 2) * BytesPerWord));
223 }
226 StubFrame::~StubFrame() {
227 __ leave();
228 __ jr(RA);
229 __ delayed()->nop();
230 }
232 #undef __
235 // Implementation of Runtime1
237 #define __ sasm->
239 //static OopMap* save_live_registers(MacroAssembler* sasm, int num_rt_args);
240 //static void restore_live_registers(MacroAssembler* sasm);
241 //DeoptimizationBlob* SharedRuntime::_deopt_blob = NULL;
242 /*
243 const int fpu_stack_as_doubles_size_in_words = 16;
244 const int fpu_stack_as_doubles_size = 64;
245 */
246 const int float_regs_as_doubles_size_in_words = 16;
248 //FIXME,
249 // Stack layout for saving/restoring all the registers needed during a runtime
250 // call (this includes deoptimization)
251 // Note: note that users of this frame may well have arguments to some runtime
252 // while these values are on the stack. These positions neglect those arguments
253 // but the code in save_live_registers will take the argument count into
254 // account.
255 //
256 #ifdef _LP64
257 #define SLOT2(x) x,
258 #define SLOT_PER_WORD 2
259 #else
260 #define SLOT2(x)
261 #define SLOT_PER_WORD 1
262 #endif // _LP64
264 enum reg_save_layout {
265 #ifndef _LP64
266 T0_off = 0,
267 S0_off = T0_off + SLOT_PER_WORD * 8,
268 #else
269 A4_off = 0,
270 S0_off = A4_off + SLOT_PER_WORD * 8,
271 #endif
272 FP_off = S0_off + SLOT_PER_WORD * 8, SLOT2(FPH_off)
273 T8_off, SLOT2(T8H_off)
274 T9_off, SLOT2(T9H_off)
275 SP_off, SLOT2(SPH_off)
276 V0_off, SLOT2(V0H_off)
277 V1_off, SLOT2(V1H_off)
278 A0_off, SLOT2(A0H_off)
279 A1_off, SLOT2(A1H_off)
280 A2_off, SLOT2(A2H_off)
281 A3_off, SLOT2(A3H_off)
283 // Float registers
284 /* FIXME: Jin: In MIPS64, F0~23 are all caller-saved registers */
285 F0_off, SLOT2( F0H_off)
286 F1_off, SLOT2( F1H_off)
287 F2_off, SLOT2( F2H_off)
288 F3_off, SLOT2( F3H_off)
289 F4_off, SLOT2( F4H_off)
290 F5_off, SLOT2( F5H_off)
291 F6_off, SLOT2( F6H_off)
292 F7_off, SLOT2( F7H_off)
293 F8_off, SLOT2( F8H_off)
294 F9_off, SLOT2( F9H_off)
295 F10_off, SLOT2( F10H_off)
296 F11_off, SLOT2( F11H_off)
297 F12_off, SLOT2( F12H_off)
298 F13_off, SLOT2( F13H_off)
299 F14_off, SLOT2( F14H_off)
300 F15_off, SLOT2( F15H_off)
301 F16_off, SLOT2( F16H_off)
302 F17_off, SLOT2( F17H_off)
303 F18_off, SLOT2( F18H_off)
304 F19_off, SLOT2( F19H_off)
306 GP_off, SLOT2( GPH_off)
307 //temp_2_off,
308 temp_1_off, SLOT2(temp_1H_off)
309 saved_fp_off, SLOT2(saved_fpH_off)
310 return_off, SLOT2(returnH_off)
312 reg_save_frame_size,
314 // illegal instruction handler
315 continue_dest_off = temp_1_off,
317 // deoptimization equates
318 //deopt_type = temp_2_off, // slot for type of deopt in progress
319 ret_type = temp_1_off // slot for return type
320 };
324 // Save off registers which might be killed by calls into the runtime.
325 // Tries to smart of about FP registers. In particular we separate
326 // saving and describing the FPU registers for deoptimization since we
327 // have to save the FPU registers twice if we describe them and on P4
328 // saving FPU registers which don't contain anything appears
329 // expensive. The deopt blob is the only thing which needs to
330 // describe FPU registers. In all other cases it should be sufficient
331 // to simply save their current value.
332 //FIXME, I have no idea which register should be saved . @jerome
333 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
334 bool save_fpu_registers = true, bool describe_fpu_registers = false) {
336 LP64_ONLY(num_rt_args = 0);
337 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
338 int frame_size_in_slots = reg_save_frame_size + num_rt_args * wordSize / VMRegImpl::slots_per_word; // args + thread
339 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
341 // record saved value locations in an OopMap
342 // locations are offsets from sp after runtime call; num_rt_args is number of arguments
343 // in call, including thread
344 OopMap* map = new OopMap(reg_save_frame_size, 0);
346 map->set_callee_saved(VMRegImpl::stack2reg(V0_off + num_rt_args), V0->as_VMReg());
347 map->set_callee_saved(VMRegImpl::stack2reg(V1_off + num_rt_args), V1->as_VMReg());
348 #ifdef _LP64
349 map->set_callee_saved(VMRegImpl::stack2reg(V0H_off + num_rt_args), V0->as_VMReg()->next());
350 map->set_callee_saved(VMRegImpl::stack2reg(V1H_off + num_rt_args), V1->as_VMReg()->next());
351 #endif
353 int i = 0;
354 #ifndef _LP64
355 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
356 map->set_callee_saved(VMRegImpl::stack2reg(T0_off + num_rt_args + i++), r->as_VMReg());
357 }
358 #else
359 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
360 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg());
361 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg()->next());
362 }
363 #endif
365 i = 0;
366 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
367 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg());
368 #ifdef _LP64
369 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg()->next());
370 #endif
371 }
373 map->set_callee_saved(VMRegImpl::stack2reg(FP_off + num_rt_args), FP->as_VMReg());
374 map->set_callee_saved(VMRegImpl::stack2reg(GP_off + num_rt_args), GP->as_VMReg());
375 map->set_callee_saved(VMRegImpl::stack2reg(T8_off + num_rt_args), T8->as_VMReg());
376 map->set_callee_saved(VMRegImpl::stack2reg(T9_off + num_rt_args), T9->as_VMReg());
377 map->set_callee_saved(VMRegImpl::stack2reg(A0_off + num_rt_args), A0->as_VMReg());
378 map->set_callee_saved(VMRegImpl::stack2reg(A1_off + num_rt_args), A1->as_VMReg());
379 map->set_callee_saved(VMRegImpl::stack2reg(A2_off + num_rt_args), A2->as_VMReg());
380 map->set_callee_saved(VMRegImpl::stack2reg(A3_off + num_rt_args), A3->as_VMReg());
382 map->set_callee_saved(VMRegImpl::stack2reg(F0_off + num_rt_args), F0->as_VMReg());
383 map->set_callee_saved(VMRegImpl::stack2reg(F1_off + num_rt_args), F1->as_VMReg());
384 map->set_callee_saved(VMRegImpl::stack2reg(F2_off + num_rt_args), F2->as_VMReg());
385 map->set_callee_saved(VMRegImpl::stack2reg(F3_off + num_rt_args), F1->as_VMReg());
386 map->set_callee_saved(VMRegImpl::stack2reg(F4_off + num_rt_args), F4->as_VMReg());
387 map->set_callee_saved(VMRegImpl::stack2reg(F5_off + num_rt_args), F4->as_VMReg());
388 map->set_callee_saved(VMRegImpl::stack2reg(F6_off + num_rt_args), F4->as_VMReg());
389 map->set_callee_saved(VMRegImpl::stack2reg(F7_off + num_rt_args), F4->as_VMReg());
390 map->set_callee_saved(VMRegImpl::stack2reg(F8_off + num_rt_args), F4->as_VMReg());
391 map->set_callee_saved(VMRegImpl::stack2reg(F9_off + num_rt_args), F4->as_VMReg());
392 map->set_callee_saved(VMRegImpl::stack2reg(F10_off + num_rt_args), F4->as_VMReg());
393 map->set_callee_saved(VMRegImpl::stack2reg(F11_off + num_rt_args), F4->as_VMReg());
394 map->set_callee_saved(VMRegImpl::stack2reg(F12_off + num_rt_args), F12->as_VMReg());
395 map->set_callee_saved(VMRegImpl::stack2reg(F13_off + num_rt_args), F13->as_VMReg());
396 map->set_callee_saved(VMRegImpl::stack2reg(F14_off + num_rt_args), F14->as_VMReg());
397 map->set_callee_saved(VMRegImpl::stack2reg(F15_off + num_rt_args), F15->as_VMReg());
398 map->set_callee_saved(VMRegImpl::stack2reg(F16_off + num_rt_args), F16->as_VMReg());
399 map->set_callee_saved(VMRegImpl::stack2reg(F17_off + num_rt_args), F17->as_VMReg());
400 map->set_callee_saved(VMRegImpl::stack2reg(F18_off + num_rt_args), F18->as_VMReg());
401 map->set_callee_saved(VMRegImpl::stack2reg(F19_off + num_rt_args), F19->as_VMReg());
403 #ifdef _LP64
404 map->set_callee_saved(VMRegImpl::stack2reg(FPH_off + num_rt_args), FP->as_VMReg()->next());
405 map->set_callee_saved(VMRegImpl::stack2reg(GPH_off + num_rt_args), GP->as_VMReg()->next());
406 map->set_callee_saved(VMRegImpl::stack2reg(T8H_off + num_rt_args), T8->as_VMReg()->next());
407 map->set_callee_saved(VMRegImpl::stack2reg(T9H_off + num_rt_args), T9->as_VMReg()->next());
408 map->set_callee_saved(VMRegImpl::stack2reg(A0H_off + num_rt_args), A0->as_VMReg()->next());
409 map->set_callee_saved(VMRegImpl::stack2reg(A1H_off + num_rt_args), A1->as_VMReg()->next());
410 map->set_callee_saved(VMRegImpl::stack2reg(A2H_off + num_rt_args), A2->as_VMReg()->next());
411 map->set_callee_saved(VMRegImpl::stack2reg(A3H_off + num_rt_args), A3->as_VMReg()->next());
412 #endif
413 return map;
414 }
416 //FIXME, Is it enough to save this registers by yyq
417 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
418 bool save_fpu_registers = true,
419 bool describe_fpu_registers = false) {
420 //const int reg_save_frame_size = return_off + 1 + num_rt_args;
421 __ block_comment("save_live_registers");
423 // save all register state - int, fpu
424 __ addi(SP, SP, -(reg_save_frame_size / SLOT_PER_WORD - 2)* wordSize);
426 #ifndef _LP64
427 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
428 __ sw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
429 #else
430 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
431 __ sd(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
432 #endif
433 }
434 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
435 __ st_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
436 }
437 __ st_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
438 __ st_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
439 __ st_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
440 __ st_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
441 __ st_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
442 __ st_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
443 __ st_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
444 __ st_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
445 __ st_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
446 __ st_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
448 __ sdc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
449 __ sdc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
450 __ sdc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
451 __ sdc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
452 __ sdc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
453 __ sdc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
454 __ sdc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
455 __ sdc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
456 __ sdc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
457 __ sdc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
458 __ sdc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
459 __ sdc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
460 __ sdc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
461 __ sdc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
462 __ sdc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
463 __ sdc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
464 __ sdc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
465 __ sdc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
466 __ sdc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
467 __ sdc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
469 return generate_oop_map(sasm, num_rt_args, save_fpu_registers, describe_fpu_registers);
470 }
472 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
473 //static void restore_live_registers(MacroAssembler* sasm) {
474 #ifndef _LP64
475 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
476 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
477 #else
478 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
479 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
480 #endif
481 }
482 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
483 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
484 }
485 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
486 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
488 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
489 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
490 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
491 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
492 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
493 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
495 __ ld_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
496 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
498 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
499 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
500 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
501 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
502 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
503 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
504 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
505 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
506 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
507 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
508 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
509 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
510 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
511 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
512 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
513 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
514 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
515 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
516 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
517 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
519 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
520 }
522 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
523 __ block_comment("restore_live_registers");
524 restore_fpu(sasm, restore_fpu_registers);
525 }
527 static void restore_live_registers_except_V0(StubAssembler* sasm, bool restore_fpu_registers = true) {
528 //static void restore_live_registers(MacroAssembler* sasm) {
529 //FIXME , maybe V1 need to be saved too
530 __ block_comment("restore_live_registers except V0");
531 #ifndef _LP64
532 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
533 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
534 #else
535 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
536 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
537 #endif
538 }
539 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
540 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
541 }
542 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
543 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
545 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
546 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
547 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
548 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
549 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
550 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
552 #if 1
553 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
554 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
555 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
556 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
557 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
558 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
559 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
560 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
561 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
562 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
563 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
564 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
565 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
566 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
567 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
568 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
569 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
570 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
571 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
572 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
573 #endif
575 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
577 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
578 }
580 void Runtime1::initialize_pd() {
581 // nothing to do
582 }
584 // target: the entry point of the method that creates and posts the exception oop
585 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
586 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
587 // preserve all registers
588 OopMap* oop_map = save_live_registers(sasm, 0);
590 // now all registers are saved and can be used freely
591 // verify that no old value is used accidentally
592 //all reigster are saved , I think mips do not need this
594 // registers used by this stub
595 const Register temp_reg = T3;
596 // load argument for exception that is passed as an argument into the stub
597 if (has_argument) {
598 __ ld_ptr(temp_reg, Address(FP, 2*BytesPerWord));
599 }
600 int call_offset;
601 if (has_argument)
602 call_offset = __ call_RT(noreg, noreg, target, temp_reg);
603 else
604 call_offset = __ call_RT(noreg, noreg, target);
606 OopMapSet* oop_maps = new OopMapSet();
607 oop_maps->add_gc_map(call_offset, oop_map);
609 __ stop("should not reach here");
611 return oop_maps;
612 }
614 //FIXME I do not know which reigster to use.should use T3 as real_return_addr @jerome
615 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
616 __ block_comment("generate_handle_exception");
618 // incoming parameters
619 const Register exception_oop = V0;
620 const Register exception_pc = V1;
621 // other registers used in this stub
622 // const Register real_return_addr = T3;
623 const Register thread = TREG;
624 #ifndef OPT_THREAD
625 __ get_thread(thread);
626 #endif
627 // Save registers, if required.
628 OopMapSet* oop_maps = new OopMapSet();
629 OopMap* oop_map = NULL;
630 switch (id) {
631 case forward_exception_id:
632 // We're handling an exception in the context of a compiled frame.
633 // The registers have been saved in the standard places. Perform
634 // an exception lookup in the caller and dispatch to the handler
635 // if found. Otherwise unwind and dispatch to the callers
636 // exception handler.
637 oop_map = generate_oop_map(sasm, 1 /*thread*/);
639 // load and clear pending exception oop into RAX
640 __ ld_ptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
641 __ st_ptr(R0, Address(thread, Thread::pending_exception_offset()));
643 // load issuing PC (the return address for this stub) into rdx
644 __ ld_ptr(exception_pc, Address(FP, 1*BytesPerWord));
646 // make sure that the vm_results are cleared (may be unnecessary)
647 __ st_ptr(R0, Address(thread, JavaThread::vm_result_offset()));
648 __ st_ptr(R0, Address(thread, JavaThread::vm_result_2_offset()));
649 break;
650 case handle_exception_nofpu_id:
651 case handle_exception_id:
652 // At this point all registers MAY be live.
653 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
654 break;
655 case handle_exception_from_callee_id: {
656 // At this point all registers except exception oop (RAX) and
657 // exception pc (RDX) are dead.
658 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/);
659 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
660 sasm->set_frame_size(frame_size);
661 break;
662 }
663 default: ShouldNotReachHere();
664 }
666 #ifdef TIERED
667 // C2 can leave the fpu stack dirty
668 __ empty_FPU_stack();
669 #endif // TIERED
671 // verify that only V0 and V1 is valid at this time
672 // verify that V0 contains a valid exception
673 __ verify_not_null_oop(exception_oop);
675 // load address of JavaThread object for thread-local data
676 __ get_thread(thread);
678 #ifdef ASSERT
679 // check that fields in JavaThread for exception oop and issuing pc are
680 // empty before writing to them
681 Label oop_empty;
682 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
683 __ beq(AT, R0, oop_empty);
684 __ delayed()->nop();
685 __ stop("exception oop already set");
686 __ bind(oop_empty);
687 Label pc_empty;
688 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
689 __ beq(AT, R0, pc_empty);
690 __ delayed()->nop();
691 __ stop("exception pc already set");
692 __ bind(pc_empty);
693 #endif
695 // save exception oop and issuing pc into JavaThread
696 // (exception handler will load it from here)
697 __ st_ptr(exception_oop, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
698 __ st_ptr(exception_pc, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
700 // patch throwing pc into return address (has bci & oop map)
701 __ st_ptr(exception_pc, Address(FP, 1*BytesPerWord));
703 // compute the exception handler.
704 // the exception oop and the throwing pc are read from the fields in JavaThread
705 __ block_comment(";; will call_RT exception_handler_for_pc");
706 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
707 oop_maps->add_gc_map(call_offset, oop_map);
708 __ block_comment(";; end of call_RT exception_handler_for_pc");
709 // V0: handler address or NULL if no handler exists
710 // will be the deopt blob if nmethod was deoptimized while we looked up
711 // handler regardless of whether handler existed in the nmethod.
713 // only V0 is valid at this time, all other registers have been destroyed by the
714 // runtime call
716 // patch the return address -> the stub will directly return to the exception handler
717 __ st_ptr(V0, Address(FP, 1 * BytesPerWord));
719 switch (id) {
720 case forward_exception_id:
721 case handle_exception_nofpu_id:
722 case handle_exception_id:
723 // Restore the registers that were saved at the beginning.
724 restore_live_registers(sasm, id != handle_exception_nofpu_id);
725 break;
726 case handle_exception_from_callee_id:
727 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
728 // since we do a leave anyway.
730 // Pop the return address since we are possibly changing SP (restoring from BP).
731 __ leave();
732 // Restore SP from BP if the exception PC is a method handle call site.
733 {
734 Label done;
735 __ ld(AT, Address(thread, JavaThread::is_method_handle_return_offset()));
736 __ beq(AT, R0, done);
737 __ delayed()->nop();
738 __ bind(done);
739 }
740 __ jr(RA); // jump to exception handler
741 __ delayed()->nop();
742 break;
743 default: ShouldNotReachHere();
744 }
746 return oop_maps;
747 }
753 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
754 // incoming parameters
755 const Register exception_oop = V0;
756 // callee-saved copy of exception_oop during runtime call
757 const Register exception_oop_callee_saved = S0;
758 // other registers used in this stub
759 const Register exception_pc = V1;
760 const Register handler_addr = T3;
761 const Register thread = TREG;
763 // verify that only eax is valid at this time
764 // __ invalidate_registers(false, true, true, true, true, true);
766 #ifdef ASSERT
767 // check that fields in JavaThread for exception oop and issuing pc are empty
768 __ get_thread(thread);
769 Label oop_empty;
770 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_oop_offset()));
771 __ beq(AT, R0, oop_empty);
772 __ delayed()->nop();
773 __ stop("exception oop must be empty");
774 __ bind(oop_empty);
776 Label pc_empty;
777 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_pc_offset()));
778 __ beq(AT, R0, pc_empty);
779 __ delayed()->nop();
780 __ stop("exception pc must be empty");
781 __ bind(pc_empty);
782 #endif
783 // clear the FPU stack in case any FPU results are left behind
784 __ empty_FPU_stack();
786 // save exception_oop in callee-saved register to preserve it during runtime calls
787 __ verify_not_null_oop(exception_oop);
788 __ move(exception_oop_callee_saved, exception_oop);
790 #ifndef OPT_THREAD
791 __ get_thread(thread);
792 #endif
793 // Get return address (is on top of stack after leave).
794 // store return address (is on top of stack after leave)
796 __ ld_ptr(exception_pc, SP, 0);
798 // search the exception handler address of the caller (using the return address)
799 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
800 // V0: exception handler address of the caller
802 // only eax is valid at this time, all other registers have been destroyed by the call
804 // move result of call into correct register
805 __ move(handler_addr, V0);
807 // Restore exception oop to V0 (required convention of exception handler).
808 __ move(exception_oop, exception_oop_callee_saved);
810 // verify that there is really a valid exception in V0
811 __ verify_oop(exception_oop);
813 // get throwing pc (= return address).
814 // V1 has been destroyed by the call, so it must be set again
815 // the pop is also necessary to simulate the effect of a ret(0)
816 __ super_pop(exception_pc);
818 // continue at exception handler (return address removed)
819 // note: do *not* remove arguments when unwinding the
820 // activation since the caller assumes having
821 // all arguments on the stack when entering the
822 // runtime to determine the exception handler
823 // (GC happens at call site with arguments!)
824 // V0: exception oop
825 // V1: throwing pc
826 // T3: exception handler
827 __ jr(handler_addr);
828 __ delayed()->nop();
829 }
834 //static address deopt_with_exception_entry_for_patch = NULL;
836 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
838 // use the maximum number of runtime-arguments here because it is difficult to
839 // distinguish each RT-Call.
840 // Note: This number affects also the RT-Call in generate_handle_exception because
841 // the oop-map is shared for all calls.
843 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
844 assert(deopt_blob != NULL, "deoptimization blob must have been created");
845 // assert(deopt_with_exception_entry_for_patch != NULL,
846 // "deoptimization blob must have been created");
848 //OopMap* oop_map = save_live_registers(sasm, num_rt_args);
849 OopMap* oop_map = save_live_registers(sasm, 0);
850 const Register thread = T8;
851 // push java thread (becomes first argument of C function)
852 __ get_thread(thread);
853 __ move(A0, thread);
856 /*
857 * NOTE: this frame should be compiled frame, but at this point, the pc in frame-anchor
858 * is contained in interpreter. It should be wrong, and should be cleared but is not.
859 * even if we cleared the wrong pc in anchor, the default way to get caller pc in class frame
860 * is not right. It depends on that the caller pc is stored in *(sp - 1) but it's not the case
861 */
862 __ set_last_Java_frame(thread, NOREG, FP, NULL);
863 NOT_LP64(__ addiu(SP, SP, (-1) * wordSize));
864 __ move(AT, -(StackAlignmentInBytes));
865 __ andr(SP, SP, AT);
866 __ relocate(relocInfo::internal_pc_type);
867 {
868 #ifndef _LP64
869 int save_pc = (int)__ pc() + 12 + NativeCall::return_address_offset;
870 __ lui(AT, Assembler::split_high(save_pc));
871 __ addiu(AT, AT, Assembler::split_low(save_pc));
872 #else
873 uintptr_t save_pc = (uintptr_t)__ pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
874 __ li48(AT, save_pc);
875 #endif
876 }
877 __ st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
879 // do the call
880 #ifndef _LP64
881 __ lui(T9, Assembler::split_high((int)target));
882 __ addiu(T9, T9, Assembler::split_low((int)target));
883 #else
884 __ li48(T9, (intptr_t)target);
885 #endif
886 __ jalr(T9);
887 __ delayed()->nop();
888 OopMapSet* oop_maps = new OopMapSet();
889 oop_maps->add_gc_map(__ offset(), oop_map);
891 __ get_thread(thread);
893 __ ld_ptr (SP, thread, in_bytes(JavaThread::last_Java_sp_offset()));
894 __ reset_last_Java_frame(thread, true);
895 // discard thread arg
896 // check for pending exceptions
897 {
898 Label L, skip;
899 //Label no_deopt;
900 __ ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
901 __ beq(AT, R0, L);
902 __ delayed()->nop();
903 // exception pending => remove activation and forward to exception handler
905 __ bne(V0, R0, skip);
906 __ delayed()->nop();
907 __ jmp(Runtime1::entry_for(Runtime1::forward_exception_id),
908 relocInfo::runtime_call_type);
909 __ delayed()->nop();
910 __ bind(skip);
912 // the deopt blob expects exceptions in the special fields of
913 // JavaThread, so copy and clear pending exception.
915 // load and clear pending exception
916 __ ld_ptr(V0, Address(thread,in_bytes(Thread::pending_exception_offset())));
917 __ st_ptr(R0, Address(thread, in_bytes(Thread::pending_exception_offset())));
919 // check that there is really a valid exception
920 __ verify_not_null_oop(V0);
922 // load throwing pc: this is the return address of the stub
923 __ ld_ptr(V1, Address(SP, return_off * BytesPerWord));
926 #ifdef ASSERT
927 // check that fields in JavaThread for exception oop and issuing pc are empty
928 Label oop_empty;
929 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
930 __ beq(AT,R0,oop_empty);
931 __ delayed()->nop();
932 __ stop("exception oop must be empty");
933 __ bind(oop_empty);
935 Label pc_empty;
936 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
937 __ beq(AT,R0,pc_empty);
938 __ delayed()->nop();
939 __ stop("exception pc must be empty");
940 __ bind(pc_empty);
941 #endif
943 // store exception oop and throwing pc to JavaThread
944 __ st_ptr(V0,Address(thread, in_bytes(JavaThread::exception_oop_offset())));
945 __ st_ptr(V1,Address(thread, in_bytes(JavaThread::exception_pc_offset())));
947 restore_live_registers(sasm);
949 __ leave();
951 // Forward the exception directly to deopt blob. We can blow no
952 // registers and must leave throwing pc on the stack. A patch may
953 // have values live in registers so the entry point with the
954 // exception in tls.
955 __ jmp(deopt_blob->unpack_with_exception_in_tls(), relocInfo::runtime_call_type);
956 __ delayed()->nop();
958 __ bind(L);
959 }
961 // Runtime will return true if the nmethod has been deoptimized during
962 // the patching process. In that case we must do a deopt reexecute instead.
964 Label reexecuteEntry, cont;
966 __ beq(V0, R0, cont); // have we deoptimized?
967 __ delayed()->nop();
969 // Will reexecute. Proper return address is already on the stack we just restore
970 // registers, pop all of our frame but the return address and jump to the deopt blob
971 restore_live_registers(sasm);
973 __ leave();
974 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
975 __ delayed()->nop();
977 __ bind(cont);
978 restore_live_registers(sasm);
980 __ leave();
981 __ jr(RA);
982 __ delayed()->nop();
984 return oop_maps;
985 }
988 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
989 // for better readability
990 const bool must_gc_arguments = true;
991 const bool dont_gc_arguments = false;
994 // default value; overwritten for some optimized stubs that are called
995 // from methods that do not use the fpu
996 bool save_fpu_registers = true;
999 // stub code & info for the different stubs
1000 OopMapSet* oop_maps = NULL;
1002 switch (id) {
1003 case forward_exception_id:
1004 {
1005 oop_maps = generate_handle_exception(id, sasm);
1006 __ leave();
1007 __ jr(RA);
1008 __ delayed()->nop();
1009 }
1010 break;
1012 case new_instance_id:
1013 case fast_new_instance_id:
1014 case fast_new_instance_init_check_id:
1015 {
1016 Register klass = A4; // Incoming
1017 Register obj = V0; // Result
1019 if (id == new_instance_id) {
1020 __ set_info("new_instance", dont_gc_arguments);
1021 } else if (id == fast_new_instance_id) {
1022 __ set_info("fast new_instance", dont_gc_arguments);
1023 } else {
1024 assert(id == fast_new_instance_init_check_id, "bad StubID");
1025 __ set_info("fast new_instance init check", dont_gc_arguments);
1026 }
1028 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id)
1029 && UseTLAB && FastTLABRefill) {
1030 Label slow_path;
1031 Register obj_size = T0;
1032 Register t1 = T2;
1033 Register t2 = T3;
1034 assert_different_registers(klass, obj, obj_size, t1, t2);
1035 if (id == fast_new_instance_init_check_id) {
1036 // make sure the klass is initialized
1037 __ ld_ptr(AT, Address(klass, in_bytes(InstanceKlass::init_state_offset())));
1038 __ move(t1, InstanceKlass::fully_initialized);
1039 __ bne(AT, t1, slow_path);
1040 __ delayed()->nop();
1041 }
1042 #ifdef ASSERT
1043 // assert object can be fast path allocated
1044 {
1045 Label ok, not_ok;
1046 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1047 __ blez(obj_size, not_ok);
1048 __ delayed()->nop();
1049 __ andi(t1 , obj_size, Klass::_lh_instance_slow_path_bit);
1050 __ beq(t1, R0, ok);
1051 __ delayed()->nop();
1052 __ bind(not_ok);
1053 __ stop("assert(can be fast path allocated)");
1054 __ should_not_reach_here();
1055 __ bind(ok);
1056 }
1057 #endif // ASSERT
1058 // if we got here then the TLAB allocation failed, so try
1059 // refilling the TLAB or allocating directly from eden.
1061 Label retry_tlab, try_eden;
1062 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy edx (klass)
1064 __ bind(retry_tlab);
1066 // get the instance size
1067 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1068 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
1069 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1070 __ verify_oop(obj);
1071 __ jr(RA);
1072 __ delayed()->nop();
1074 #ifndef OPT_THREAD
1075 const Register thread = T8;
1076 __ get_thread(thread);
1077 #else
1078 const Register thread = TREG;
1079 #endif
1081 __ bind(try_eden);
1083 // get the instance size
1084 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1085 __ eden_allocate(obj, obj_size, 0, t1, t2, slow_path);
1086 __ incr_allocated_bytes(thread, obj_size, 0);
1088 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1089 __ verify_oop(obj);
1090 __ jr(RA);
1091 __ delayed()->nop();
1093 __ bind(slow_path);
1094 }
1095 __ enter();
1096 OopMap* map = save_live_registers(sasm, 0);
1097 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1098 oop_maps = new OopMapSet();
1099 oop_maps->add_gc_map(call_offset, map);
1100 restore_live_registers_except_V0(sasm);
1101 __ verify_oop(obj);
1102 __ leave();
1103 __ jr(RA);
1104 __ delayed()->nop();
1106 // V0: new instance
1107 }
1108 break;
1111 #ifdef TIERED
1112 //FIXME, I hava no idea which register to use
1113 case counter_overflow_id:
1114 {
1115 #ifndef _LP64
1116 Register bci = T5;
1117 #else
1118 Register bci = A5;
1119 #endif
1120 Register method = AT;
1121 __ enter();
1122 OopMap* map = save_live_registers(sasm, 0);
1123 // Retrieve bci
1124 __ lw(bci, Address(FP, 2*BytesPerWord));// FIXME:wuhui.ebp==??
1125 __ ld(method, Address(FP, 3*BytesPerWord));
1126 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1127 oop_maps = new OopMapSet();
1128 oop_maps->add_gc_map(call_offset, map);
1129 restore_live_registers(sasm);
1130 __ leave();
1131 __ jr(RA);
1132 __ delayed()->nop();
1133 }
1134 break;
1135 #endif // TIERED
1139 case new_type_array_id:
1140 case new_object_array_id:
1141 {
1142 // i use T2 as length register, T4 as klass register, V0 as result register.
1143 // MUST accord with NewTypeArrayStub::emit_code, NewObjectArrayStub::emit_code
1144 Register length = T2; // Incoming
1145 #ifndef _LP64
1146 Register klass = T4; // Incoming
1147 #else
1148 Register klass = A4; // Incoming
1149 #endif
1150 Register obj = V0; // Result
1152 if (id == new_type_array_id) {
1153 __ set_info("new_type_array", dont_gc_arguments);
1154 } else {
1155 __ set_info("new_object_array", dont_gc_arguments);
1156 }
1158 if (UseTLAB && FastTLABRefill) {
1159 Register arr_size = T0;
1160 Register t1 = T1;
1161 Register t2 = T3;
1162 Label slow_path;
1163 assert_different_registers(length, klass, obj, arr_size, t1, t2);
1165 // check that array length is small enough for fast path
1166 __ move(AT, C1_MacroAssembler::max_array_allocation_length);
1167 __ sltu(AT, AT, length);
1168 __ bne(AT, R0, slow_path);
1169 __ delayed()->nop();
1171 // if we got here then the TLAB allocation failed, so try
1172 // refilling the TLAB or allocating directly from eden.
1173 Label retry_tlab, try_eden;
1174 //T0,T1,T5,T8 have changed!
1175 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves T2 & T4
1177 __ bind(retry_tlab);
1179 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1180 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1181 __ andi(AT, t1, 0x1f);
1182 __ sllv(arr_size, length, AT);
1183 __ srl(t1, t1, Klass::_lh_header_size_shift);
1184 __ andi(t1, t1, Klass::_lh_header_size_mask);
1185 __ add(arr_size, t1, arr_size);
1186 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1187 __ move(AT, ~MinObjAlignmentInBytesMask);
1188 __ andr(arr_size, arr_size, AT);
1191 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1192 __ initialize_header(obj, klass, length,t1,t2);
1193 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1194 + (Klass::_lh_header_size_shift / BitsPerByte)));
1195 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1196 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1197 __ andi(t1, t1, Klass::_lh_header_size_mask);
1198 __ sub(arr_size, arr_size, t1); // body length
1199 __ add(t1, t1, obj); // body start
1200 __ initialize_body(t1, arr_size, 0, t2);
1201 __ verify_oop(obj);
1202 __ jr(RA);
1203 __ delayed()->nop();
1205 #ifndef OPT_THREAD
1206 const Register thread = T8;
1207 __ get_thread(thread);
1208 #else
1209 const Register thread = TREG;
1210 #endif
1212 __ bind(try_eden);
1213 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1214 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1215 __ andi(AT, t1, 0x1f);
1216 __ sllv(arr_size, length, AT);
1217 __ srl(t1, t1, Klass::_lh_header_size_shift);
1218 __ andi(t1, t1, Klass::_lh_header_size_mask);
1219 __ add(arr_size, t1, arr_size);
1220 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1221 __ move(AT, ~MinObjAlignmentInBytesMask);
1222 __ andr(arr_size, arr_size, AT);
1223 __ eden_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1224 __ incr_allocated_bytes(thread, arr_size, 0);
1226 __ initialize_header(obj, klass, length,t1,t2);
1227 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1228 + (Klass::_lh_header_size_shift / BitsPerByte)));
1229 __ andi(t1, t1, Klass::_lh_header_size_mask);
1230 __ sub(arr_size, arr_size, t1); // body length
1231 __ add(t1, t1, obj); // body start
1233 __ initialize_body(t1, arr_size, 0, t2);
1234 __ verify_oop(obj);
1235 __ jr(RA);
1236 __ delayed()->nop();
1237 __ bind(slow_path);
1238 }
1241 __ enter();
1242 OopMap* map = save_live_registers(sasm, 0);
1243 int call_offset;
1244 if (id == new_type_array_id) {
1245 call_offset = __ call_RT(obj, noreg,
1246 CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1247 } else {
1248 call_offset = __ call_RT(obj, noreg,
1249 CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1250 }
1252 oop_maps = new OopMapSet();
1253 oop_maps->add_gc_map(call_offset, map);
1254 restore_live_registers_except_V0(sasm);
1255 __ verify_oop(obj);
1256 __ leave();
1257 __ jr(RA);
1258 __ delayed()->nop();
1259 }
1260 break;
1262 case new_multi_array_id:
1263 {
1264 StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1265 //refer to c1_LIRGenerate_mips.cpp:do_NewmultiArray
1266 // V0: klass
1267 // T2: rank
1268 // T0: address of 1st dimension
1269 //__ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array), A1, A2, A3);
1270 //OopMap* map = save_live_registers(sasm, 4);
1271 OopMap* map = save_live_registers(sasm, 0);
1272 int call_offset = __ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array),
1273 V0,T2,T0);
1274 oop_maps = new OopMapSet();
1275 oop_maps->add_gc_map(call_offset, map);
1276 //FIXME
1277 restore_live_registers_except_V0(sasm);
1278 // V0: new multi array
1279 __ verify_oop(V0);
1280 }
1281 break;
1284 case register_finalizer_id:
1285 {
1286 __ set_info("register_finalizer", dont_gc_arguments);
1288 // The object is passed on the stack and we haven't pushed a
1289 // frame yet so it's one work away from top of stack.
1290 //reference to LIRGenerator::do_RegisterFinalizer, call_runtime
1291 __ move(V0, A0);
1292 __ verify_oop(V0);
1293 // load the klass and check the has finalizer flag
1294 Label register_finalizer;
1295 #ifndef _LP64
1296 Register t = T5;
1297 #else
1298 Register t = A5;
1299 #endif
1300 //__ ld_ptr(t, Address(V0, oopDesc::klass_offset_in_bytes()));
1301 __ load_klass(t, V0);
1302 __ lw(t, Address(t, Klass::access_flags_offset()));
1303 __ move(AT, JVM_ACC_HAS_FINALIZER);
1304 __ andr(AT, AT, t);
1306 __ bne(AT, R0, register_finalizer);
1307 __ delayed()->nop();
1308 __ jr(RA);
1309 __ delayed()->nop();
1310 __ bind(register_finalizer);
1311 __ enter();
1312 OopMap* map = save_live_registers(sasm, 0 /*num_rt_args */);
1314 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1315 SharedRuntime::register_finalizer), V0);
1316 oop_maps = new OopMapSet();
1317 oop_maps->add_gc_map(call_offset, map);
1319 // Now restore all the live registers
1320 restore_live_registers(sasm);
1322 __ leave();
1323 __ jr(RA);
1324 __ delayed()->nop();
1325 }
1326 break;
1328 // case range_check_failed_id:
1329 case throw_range_check_failed_id:
1330 {
1331 StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1332 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1333 throw_range_check_exception),true);
1334 }
1335 break;
1337 case throw_index_exception_id:
1338 {
1339 // i use A1 as the index register, for this will be the first argument, see call_RT
1340 StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1341 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1342 throw_index_exception), true);
1343 }
1344 break;
1346 case throw_div0_exception_id:
1347 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1348 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1349 throw_div0_exception), false);
1350 }
1351 break;
1353 case throw_null_pointer_exception_id:
1354 {
1355 StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1356 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1357 throw_null_pointer_exception),false);
1358 }
1359 break;
1361 case handle_exception_nofpu_id:
1362 save_fpu_registers = false;
1363 // fall through
1364 case handle_exception_id:
1365 {
1366 StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1367 //OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers);
1368 oop_maps = generate_handle_exception(id, sasm);
1369 }
1370 break;
1371 case handle_exception_from_callee_id:
1372 {
1373 StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1374 oop_maps = generate_handle_exception(id, sasm);
1375 }
1376 break;
1377 case unwind_exception_id:
1378 {
1379 __ set_info("unwind_exception", dont_gc_arguments);
1380 generate_unwind_exception(sasm);
1381 }
1382 break;
1385 case throw_array_store_exception_id:
1386 {
1387 StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1388 // tos + 0: link
1389 // + 1: return address
1390 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1391 throw_array_store_exception), false);
1392 }
1393 break;
1395 case throw_class_cast_exception_id:
1396 {
1397 StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1398 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1399 throw_class_cast_exception), true);
1400 }
1401 break;
1403 case throw_incompatible_class_change_error_id:
1404 {
1405 StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1406 oop_maps = generate_exception_throw(sasm,
1407 CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1408 }
1409 break;
1411 case slow_subtype_check_id:
1412 {
1413 //actually , We do not use it
1414 // A0:klass_RInfo sub
1415 // A1:k->encoding() super
1416 __ set_info("slow_subtype_check", dont_gc_arguments);
1417 __ st_ptr(T0, SP, (-1) * wordSize);
1418 __ st_ptr(T1, SP, (-2) * wordSize);
1419 __ addiu(SP, SP, (-2) * wordSize);
1421 Label miss;
1422 __ check_klass_subtype_slow_path(A0, A1, T0, T1, NULL, &miss);
1424 __ addiu(V0, R0, 1);
1425 __ addiu(SP, SP, 2 * wordSize);
1426 __ ld_ptr(T0, SP, (-1) * wordSize);
1427 __ ld_ptr(T1, SP, (-2) * wordSize);
1428 __ jr(RA);
1429 __ delayed()->nop();
1432 __ bind(miss);
1433 __ move(V0, R0);
1434 __ addiu(SP, SP, 2 * wordSize);
1435 __ ld_ptr(T0, SP, (-1) * wordSize);
1436 __ ld_ptr(T1, SP, (-2) * wordSize);
1437 __ jr(RA);
1438 __ delayed()->nop();
1439 }
1440 break;
1442 case monitorenter_nofpu_id:
1443 save_fpu_registers = false;// fall through
1445 case monitorenter_id:
1446 {
1447 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1448 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1450 f.load_argument(1, V0); // V0: object
1451 #ifndef _LP64
1452 f.load_argument(0, T6); // T6: lock address
1453 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1454 monitorenter), V0, T6);
1455 #else
1456 f.load_argument(0, A6); // A6: lock address
1457 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1458 monitorenter), V0, A6);
1459 #endif
1461 oop_maps = new OopMapSet();
1462 oop_maps->add_gc_map(call_offset, map);
1463 restore_live_registers(sasm, save_fpu_registers);
1464 }
1465 break;
1467 case monitorexit_nofpu_id:
1468 save_fpu_registers = false;
1469 // fall through
1470 case monitorexit_id:
1471 {
1472 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1473 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1475 #ifndef _LP64
1476 f.load_argument(0, T6); // eax: lock address
1477 #else
1478 f.load_argument(0, A6); // A6: lock address
1479 #endif
1480 // note: really a leaf routine but must setup last java sp
1481 // => use call_RT for now (speed can be improved by
1482 // doing last java sp setup manually)
1483 #ifndef _LP64
1484 int call_offset = __ call_RT(noreg, noreg,
1485 CAST_FROM_FN_PTR(address, monitorexit), T6);
1486 #else
1487 int call_offset = __ call_RT(noreg, noreg,
1488 CAST_FROM_FN_PTR(address, monitorexit), A6);
1489 #endif
1490 oop_maps = new OopMapSet();
1491 oop_maps->add_gc_map(call_offset, map);
1492 restore_live_registers(sasm, save_fpu_registers);
1494 }
1495 break;
1496 // case init_check_patching_id:
1497 case access_field_patching_id:
1498 {
1499 StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1500 // we should set up register map
1501 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1503 }
1504 break;
1506 case load_klass_patching_id:
1507 {
1508 StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1509 // we should set up register map
1510 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address,
1511 move_klass_patching));
1512 }
1513 break;
1514 /* case jvmti_exception_throw_id:
1515 {
1516 // V0: exception oop
1517 // V1: exception pc
1518 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments);
1519 // Preserve all registers across this potentially blocking call
1520 const int num_rt_args = 2; // thread, exception oop
1521 //OopMap* map = save_live_registers(sasm, num_rt_args);
1522 OopMap* map = save_live_registers(sasm, 0);
1523 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1524 Runtime1::post_jvmti_exception_throw), V0);
1525 oop_maps = new OopMapSet();
1526 oop_maps->add_gc_map(call_offset, map);
1527 restore_live_registers(sasm);
1528 }*/
1529 case load_mirror_patching_id:
1530 {
1531 StubFrame f(sasm, "load_mirror_patching" , dont_gc_arguments);
1532 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1533 }
1534 break;
1536 case load_appendix_patching_id:
1537 {
1538 StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1539 // we should set up register map
1540 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1541 }
1542 break;
1544 case dtrace_object_alloc_id:
1545 {
1546 // V0:object
1547 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1548 // we can't gc here so skip the oopmap but make sure that all
1549 // the live registers get saved.
1550 save_live_registers(sasm, 0);
1552 __ push_reg(V0);
1553 __ move(A0, V0);
1554 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
1555 relocInfo::runtime_call_type);
1556 __ delayed()->nop();
1557 __ super_pop(V0);
1559 restore_live_registers(sasm);
1560 }
1561 break;
1563 case fpu2long_stub_id:
1564 {
1565 //FIXME, I hava no idea how to port this
1566 //tty->print_cr("fpu2long_stub_id unimplemented yet!");
1567 }
1568 break;
1570 case deoptimize_id:
1571 {
1572 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1573 const int num_rt_args = 1; // thread
1574 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1575 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
1576 oop_maps = new OopMapSet();
1577 oop_maps->add_gc_map(call_offset, oop_map);
1578 restore_live_registers(sasm);
1579 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1580 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1581 __ leave();
1582 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1583 __ delayed()->nop();
1584 }
1585 break;
1587 case predicate_failed_trap_id:
1588 {
1589 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1591 OopMap* map = save_live_registers(sasm, 1);
1593 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1594 oop_maps = new OopMapSet();
1595 oop_maps->add_gc_map(call_offset, map);
1596 restore_live_registers(sasm);
1597 __ leave();
1598 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1599 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1601 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1602 __ delayed()->nop();
1603 }
1604 break;
1606 default:
1607 {
1608 StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1609 __ move(A1, (int)id);
1610 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), A1);
1611 __ should_not_reach_here();
1612 }
1613 break;
1614 }
1615 return oop_maps;
1616 }
1618 #undef __
1620 const char *Runtime1::pd_name_for_address(address entry) {
1621 return "<unknown function>";
1622 }
