Tue, 12 Oct 2010 23:51:20 -0700
6991512: G1 barriers fail with 64bit C1
Summary: Fix compare-and-swap intrinsic problem with G1 post-barriers and issue with branch ranges in G1 stubs on sparc
Reviewed-by: never, kvn
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25 inline bool LinearScan::is_processed_reg_num(int reg_num) {
26 return reg_num < 26 || reg_num > 31;
27 }
29 inline int LinearScan::num_physical_regs(BasicType type) {
30 // Sparc requires two cpu registers for long
31 // and two cpu registers for double
32 #ifdef _LP64
33 if (type == T_DOUBLE) {
34 #else
35 if (type == T_DOUBLE || type == T_LONG) {
36 #endif
37 return 2;
38 }
39 return 1;
40 }
43 inline bool LinearScan::requires_adjacent_regs(BasicType type) {
44 #ifdef _LP64
45 return type == T_DOUBLE;
46 #else
47 return type == T_DOUBLE || type == T_LONG;
48 #endif
49 }
51 inline bool LinearScan::is_caller_save(int assigned_reg) {
52 return assigned_reg > pd_last_callee_saved_reg && assigned_reg <= pd_last_fpu_reg;
53 }
56 inline void LinearScan::pd_add_temps(LIR_Op* op) {
57 // No special case behaviours yet
58 }
61 inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
62 if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) {
63 assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only");
64 _first_reg = pd_first_callee_saved_reg;
65 _last_reg = pd_last_callee_saved_reg;
66 return true;
67 } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT) {
68 _first_reg = pd_first_cpu_reg;
69 _last_reg = pd_last_allocatable_cpu_reg;
70 return true;
71 }
72 return false;
73 }