src/cpu/x86/vm/icBuffer_x86.cpp

Fri, 16 Aug 2019 16:50:17 +0200

author
eosterlund
date
Fri, 16 Aug 2019 16:50:17 +0200
changeset 9834
bb1da64b0492
parent 4318
cd3d6a6b95d9
child 6876
710a3c8b516e
permissions
-rw-r--r--

8229345: Memory leak due to vtable stubs not being shared on SPARC
Reviewed-by: mdoerr, dholmes, kvn

     1 /*
     2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 #include "precompiled.hpp"
    26 #include "asm/macroAssembler.hpp"
    27 #include "asm/macroAssembler.inline.hpp"
    28 #include "code/icBuffer.hpp"
    29 #include "gc_interface/collectedHeap.inline.hpp"
    30 #include "interpreter/bytecodes.hpp"
    31 #include "memory/resourceArea.hpp"
    32 #include "nativeInst_x86.hpp"
    33 #include "oops/oop.inline.hpp"
    34 #include "oops/oop.inline2.hpp"
    36 int InlineCacheBuffer::ic_stub_code_size() {
    37   return NativeMovConstReg::instruction_size +
    38          NativeJump::instruction_size +
    39          1;
    40   // so that code_end can be set in CodeBuffer
    41   // 64bit 16 = 5 + 10 bytes + 1 byte
    42   // 32bit 11 = 10 bytes + 1 byte
    43 }
    47 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
    48   ResourceMark rm;
    49   CodeBuffer      code(code_begin, ic_stub_code_size());
    50   MacroAssembler* masm            = new MacroAssembler(&code);
    51   // note: even though the code contains an embedded value, we do not need reloc info
    52   // because
    53   // (1) the value is old (i.e., doesn't matter for scavenges)
    54   // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
    55   // assert(cached_value == NULL || cached_oop->is_perm(), "must be perm oop");
    56   masm->lea(rax, AddressLiteral((address) cached_value, relocInfo::metadata_type));
    57   masm->jump(ExternalAddress(entry_point));
    58 }
    61 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
    62   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
    63   NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    64   return jump->jump_destination();
    65 }
    68 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
    69   // creation also verifies the object
    70   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);
    71   // Verifies the jump
    72   NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    73   void* o = (void*)move->data();
    74   return o;
    75 }

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