src/cpu/x86/vm/c1_FpuStackSim_x86.hpp

Fri, 16 Aug 2019 16:50:17 +0200

author
eosterlund
date
Fri, 16 Aug 2019 16:50:17 +0200
changeset 9834
bb1da64b0492
parent 2314
f95d63e2154a
child 6876
710a3c8b516e
permissions
-rw-r--r--

8229345: Memory leak due to vtable stubs not being shared on SPARC
Reviewed-by: mdoerr, dholmes, kvn

     1 /*
     2  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 #ifndef CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP
    26 #define CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP
    28 //  Simulates the FPU stack and maintains mapping [fpu-register -> stack offset]
    29 //  FPU registers are described as numbers from 0..nof_fpu_regs-1
    31 class Compilation;
    33 class FpuStackSim VALUE_OBJ_CLASS_SPEC {
    34  private:
    35   Compilation* _compilation;
    36   int          _stack_size;
    37   int          _regs[FrameMap::nof_fpu_regs];
    39   int tos_index() const                        { return _stack_size - 1; }
    41   int regs_at(int i) const;
    42   void set_regs_at(int i, int val);
    43   void dec_stack_size();
    44   void inc_stack_size();
    46   // unified bailout support
    47   Compilation*  compilation() const              { return _compilation; }
    48   void          bailout(const char* msg) const   { compilation()->bailout(msg); }
    49   bool          bailed_out() const               { return compilation()->bailed_out(); }
    51  public:
    52   FpuStackSim(Compilation* compilation);
    53   void pop ();
    54   void pop (int rnr);                          // rnr must be on tos
    55   void push(int rnr);
    56   void swap(int offset);                       // exchange tos with tos + offset
    57   int offset_from_tos(int rnr) const;          // return the offset of the topmost instance of rnr from TOS
    58   int  get_slot(int tos_offset) const;         // return the entry at the given offset from TOS
    59   void set_slot(int tos_offset, int rnr);      // set the entry at the given offset from TOS
    60   void rename(int old_rnr, int new_rnr);       // rename all instances of old_rnr to new_rnr
    61   bool contains(int rnr);                      // debugging support only
    62   bool is_empty();
    63   bool slot_is_empty(int tos_offset);
    64   int stack_size() const                       { return _stack_size; }
    65   void clear();
    66   intArray* write_state();
    67   void read_state(intArray* fpu_stack_state);
    69   void print() PRODUCT_RETURN;
    70 };
    72 #endif // CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP

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