src/cpu/sparc/vm/relocInfo_sparc.cpp

Sat, 01 Dec 2007 00:00:00 +0000

author
duke
date
Sat, 01 Dec 2007 00:00:00 +0000
changeset 435
a61af66fc99e
child 599
c436414a719e
permissions
-rw-r--r--

Initial load

     1 /*
     2  * Copyright 1998-2005 Sun Microsystems, Inc.  All Rights Reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
    20  * CA 95054 USA or visit www.sun.com if you need additional information or
    21  * have any questions.
    22  *
    23  */
    25 # include "incls/_precompiled.incl"
    26 # include "incls/_relocInfo_sparc.cpp.incl"
    28 void Relocation::pd_set_data_value(address x, intptr_t o) {
    29   NativeInstruction* ip = nativeInstruction_at(addr());
    30   jint inst = ip->long_at(0);
    31   assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint");
    32   switch (Assembler::inv_op(inst)) {
    34   case Assembler::ldst_op:
    35     #ifdef ASSERT
    36       switch (Assembler::inv_op3(inst)) {
    37         case Assembler::lduw_op3:
    38         case Assembler::ldub_op3:
    39         case Assembler::lduh_op3:
    40         case Assembler::ldd_op3:
    41         case Assembler::ldsw_op3:
    42         case Assembler::ldsb_op3:
    43         case Assembler::ldsh_op3:
    44         case Assembler::ldx_op3:
    45         case Assembler::ldf_op3:
    46         case Assembler::lddf_op3:
    47         case Assembler::stw_op3:
    48         case Assembler::stb_op3:
    49         case Assembler::sth_op3:
    50         case Assembler::std_op3:
    51         case Assembler::stx_op3:
    52         case Assembler::stf_op3:
    53         case Assembler::stdf_op3:
    54         case Assembler::casa_op3:
    55         case Assembler::casxa_op3:
    56           break;
    57         default:
    58           ShouldNotReachHere();
    59       }
    60       goto do_non_sethi;
    61     #endif
    63   case Assembler::arith_op:
    64     #ifdef ASSERT
    65       switch (Assembler::inv_op3(inst)) {
    66         case Assembler::or_op3:
    67         case Assembler::add_op3:
    68         case Assembler::jmpl_op3:
    69           break;
    70         default:
    71           ShouldNotReachHere();
    72       }
    73     do_non_sethi:;
    74     #endif
    75     {
    76     guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
    77     int simm13 = Assembler::low10((intptr_t)x) + o;
    78     guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
    79     inst &= ~Assembler::simm(    -1, 13);
    80     inst |=  Assembler::simm(simm13, 13);
    81     ip->set_long_at(0, inst);
    82     }
    83     break;
    85   case Assembler::branch_op:
    86     {
    87 #ifdef _LP64
    88     jint inst2;
    89     guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
    90     ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x );
    91 #ifdef COMPILER2
    92     // [RGV] Someone must have missed putting in a reloc entry for the
    93     // add in compiler2.
    94     inst2 = ip->long_at( NativeMovConstReg::add_offset );
    95     guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
    96     ip->set_long_at(NativeMovConstReg::add_offset,ip->set_data32_simm13( inst2, (intptr_t)x+o));
    97 #endif
    98 #else
    99     guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
   100     inst &= ~Assembler::hi22(     -1);
   101     inst |=  Assembler::hi22((intptr_t)x);
   102     // (ignore offset; it doesn't play into the sethi)
   103     ip->set_long_at(0, inst);
   104 #endif
   105     }
   106     break;
   108   default:
   109     guarantee(false, "instruction must perform arithmetic or memory access");
   110   }
   111 }
   114 address Relocation::pd_call_destination(address orig_addr) {
   115   intptr_t adj = 0;
   116   if (orig_addr != NULL) {
   117     // We just moved this call instruction from orig_addr to addr().
   118     // This means its target will appear to have grown by addr() - orig_addr.
   119     adj = -( addr() - orig_addr );
   120   }
   121   if (NativeCall::is_call_at(addr())) {
   122     NativeCall* call = nativeCall_at(addr());
   123     return call->destination() + adj;
   124   }
   125   if (NativeFarCall::is_call_at(addr())) {
   126     NativeFarCall* call = nativeFarCall_at(addr());
   127     return call->destination() + adj;
   128   }
   129   // Special case:  Patchable branch local to the code cache.
   130   // This will break badly if the code cache grows larger than a few Mb.
   131   NativeGeneralJump* br = nativeGeneralJump_at(addr());
   132   return br->jump_destination() + adj;
   133 }
   136 void Relocation::pd_set_call_destination(address x) {
   137   if (NativeCall::is_call_at(addr())) {
   138     NativeCall* call = nativeCall_at(addr());
   139     call->set_destination(x);
   140     return;
   141   }
   142   if (NativeFarCall::is_call_at(addr())) {
   143     NativeFarCall* call = nativeFarCall_at(addr());
   144     call->set_destination(x);
   145     return;
   146   }
   147   // Special case:  Patchable branch local to the code cache.
   148   // This will break badly if the code cache grows larger than a few Mb.
   149   NativeGeneralJump* br = nativeGeneralJump_at(addr());
   150   br->set_jump_destination(x);
   151 }
   154 address* Relocation::pd_address_in_code() {
   155   // SPARC never embeds addresses in code, at present.
   156   //assert(type() == relocInfo::oop_type, "only oops are inlined at present");
   157   return (address*)addr();
   158 }
   161 address Relocation::pd_get_address_from_code() {
   162   // SPARC never embeds addresses in code, at present.
   163   //assert(type() == relocInfo::oop_type, "only oops are inlined at present");
   164   return *(address*)addr();
   165 }
   168 int Relocation::pd_breakpoint_size() {
   169   // minimum breakpoint size, in short words
   170   return NativeIllegalInstruction::instruction_size / sizeof(short);
   171 }
   173 void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
   174   Untested("pd_swap_in_breakpoint");
   175   // %%% probably do not need a general instrlen; just use the trap size
   176   if (instrs != NULL) {
   177     assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
   178     for (int i = 0; i < instrlen; i++) {
   179       instrs[i] = ((short*)x)[i];
   180     }
   181   }
   182   NativeIllegalInstruction::insert(x);
   183 }
   186 void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
   187   Untested("pd_swap_out_breakpoint");
   188   assert(instrlen * sizeof(short) == sizeof(int), "enough buf");
   189   union { int l; short s[1]; } u;
   190   for (int i = 0; i < instrlen; i++) {
   191     u.s[i] = instrs[i];
   192   }
   193   NativeInstruction* ni = nativeInstruction_at(x);
   194   ni->set_long_at(0, u.l);
   195 }

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