Mon, 27 Aug 2012 15:17:17 -0700
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
Reviewed-by: kvn, dholmes, coleenp
Contributed-by: Tao Mao <tao.mao@oracle.com>
1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "interp_masm_sparc.hpp"
27 #include "interpreter/interpreter.hpp"
28 #include "interpreter/interpreterRuntime.hpp"
29 #include "oops/arrayOop.hpp"
30 #include "oops/markOop.hpp"
31 #include "oops/methodDataOop.hpp"
32 #include "oops/methodOop.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "prims/jvmtiRedefineClassesTrace.hpp"
35 #include "prims/jvmtiThreadState.hpp"
36 #include "runtime/basicLock.hpp"
37 #include "runtime/biasedLocking.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #ifdef TARGET_OS_FAMILY_linux
40 # include "thread_linux.inline.hpp"
41 #endif
42 #ifdef TARGET_OS_FAMILY_solaris
43 # include "thread_solaris.inline.hpp"
44 #endif
46 #ifndef CC_INTERP
47 #ifndef FAST_DISPATCH
48 #define FAST_DISPATCH 1
49 #endif
50 #undef FAST_DISPATCH
52 // Implementation of InterpreterMacroAssembler
54 // This file specializes the assember with interpreter-specific macros
56 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
57 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
59 #else // CC_INTERP
60 #ifndef STATE
61 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
62 #endif // STATE
64 #endif // CC_INTERP
66 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
67 // Note: this algorithm is also used by C1's OSR entry sequence.
68 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
69 assert_different_registers(args_size, locals_size);
70 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
71 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
72 // Use br/mov combination because it works on both V8 and V9 and is
73 // faster.
74 Label skip_move;
75 br(Assembler::negative, true, Assembler::pt, skip_move);
76 delayed()->mov(G0, delta);
77 bind(skip_move);
78 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
79 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
80 }
82 #ifndef CC_INTERP
84 // Dispatch code executed in the prolog of a bytecode which does not do it's
85 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
86 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
87 assert_not_delayed();
88 #ifdef FAST_DISPATCH
89 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
90 // they both use I2.
91 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
92 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
93 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
94 // add offset to correct dispatch table
95 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
96 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
97 #else
98 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
99 // dispatch table to use
100 AddressLiteral tbl(Interpreter::dispatch_table(state));
101 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
102 set(tbl, G3_scratch); // compute addr of table
103 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
104 #endif
105 }
108 // Dispatch code executed in the epilog of a bytecode which does not do it's
109 // own dispatch. The dispatch address in IdispatchAddress is used for the
110 // dispatch.
111 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
112 assert_not_delayed();
113 verify_FPU(1, state);
114 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
115 jmp( IdispatchAddress, 0 );
116 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
117 else delayed()->nop();
118 }
121 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
122 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
123 assert_not_delayed();
124 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
125 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
126 }
129 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
130 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
131 assert_not_delayed();
132 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
133 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
134 }
137 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
138 // load current bytecode
139 assert_not_delayed();
140 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
141 dispatch_base(state, table);
142 }
145 void InterpreterMacroAssembler::call_VM_leaf_base(
146 Register java_thread,
147 address entry_point,
148 int number_of_arguments
149 ) {
150 if (!java_thread->is_valid())
151 java_thread = L7_thread_cache;
152 // super call
153 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
154 }
157 void InterpreterMacroAssembler::call_VM_base(
158 Register oop_result,
159 Register java_thread,
160 Register last_java_sp,
161 address entry_point,
162 int number_of_arguments,
163 bool check_exception
164 ) {
165 if (!java_thread->is_valid())
166 java_thread = L7_thread_cache;
167 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
168 // takes responsibility for setting its own thread-state on call-out.
169 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
171 //save_bcp(); // save bcp
172 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
173 //restore_bcp(); // restore bcp
174 //restore_locals(); // restore locals pointer
175 }
178 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
179 if (JvmtiExport::can_pop_frame()) {
180 Label L;
182 // Check the "pending popframe condition" flag in the current thread
183 ld(G2_thread, JavaThread::popframe_condition_offset(), scratch_reg);
185 // Initiate popframe handling only if it is not already being processed. If the flag
186 // has the popframe_processing bit set, it means that this code is called *during* popframe
187 // handling - we don't want to reenter.
188 btst(JavaThread::popframe_pending_bit, scratch_reg);
189 br(zero, false, pt, L);
190 delayed()->nop();
191 btst(JavaThread::popframe_processing_bit, scratch_reg);
192 br(notZero, false, pt, L);
193 delayed()->nop();
195 // Call Interpreter::remove_activation_preserving_args_entry() to get the
196 // address of the same-named entrypoint in the generated interpreter code.
197 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
199 // Jump to Interpreter::_remove_activation_preserving_args_entry
200 jmpl(O0, G0, G0);
201 delayed()->nop();
202 bind(L);
203 }
204 }
207 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
208 Register thr_state = G4_scratch;
209 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
210 const Address tos_addr(thr_state, JvmtiThreadState::earlyret_tos_offset());
211 const Address oop_addr(thr_state, JvmtiThreadState::earlyret_oop_offset());
212 const Address val_addr(thr_state, JvmtiThreadState::earlyret_value_offset());
213 switch (state) {
214 case ltos: ld_long(val_addr, Otos_l); break;
215 case atos: ld_ptr(oop_addr, Otos_l);
216 st_ptr(G0, oop_addr); break;
217 case btos: // fall through
218 case ctos: // fall through
219 case stos: // fall through
220 case itos: ld(val_addr, Otos_l1); break;
221 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
222 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
223 case vtos: /* nothing to do */ break;
224 default : ShouldNotReachHere();
225 }
226 // Clean up tos value in the jvmti thread state
227 or3(G0, ilgl, G3_scratch);
228 stw(G3_scratch, tos_addr);
229 st_long(G0, val_addr);
230 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
231 }
234 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
235 if (JvmtiExport::can_force_early_return()) {
236 Label L;
237 Register thr_state = G3_scratch;
238 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
239 br_null_short(thr_state, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
241 // Initiate earlyret handling only if it is not already being processed.
242 // If the flag has the earlyret_processing bit set, it means that this code
243 // is called *during* earlyret handling - we don't want to reenter.
244 ld(thr_state, JvmtiThreadState::earlyret_state_offset(), G4_scratch);
245 cmp_and_br_short(G4_scratch, JvmtiThreadState::earlyret_pending, Assembler::notEqual, pt, L);
247 // Call Interpreter::remove_activation_early_entry() to get the address of the
248 // same-named entrypoint in the generated interpreter code
249 ld(thr_state, JvmtiThreadState::earlyret_tos_offset(), Otos_l1);
250 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
252 // Jump to Interpreter::_remove_activation_early_entry
253 jmpl(O0, G0, G0);
254 delayed()->nop();
255 bind(L);
256 }
257 }
260 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
261 mov(arg_1, O0);
262 mov(arg_2, O1);
263 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 2);
264 }
265 #endif /* CC_INTERP */
268 #ifndef CC_INTERP
270 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
271 assert_not_delayed();
272 dispatch_Lbyte_code(state, table);
273 }
276 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
277 dispatch_base(state, Interpreter::normal_table(state));
278 }
281 void InterpreterMacroAssembler::dispatch_only(TosState state) {
282 dispatch_base(state, Interpreter::dispatch_table(state));
283 }
286 // common code to dispatch and dispatch_only
287 // dispatch value in Lbyte_code and increment Lbcp
289 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
290 verify_FPU(1, state);
291 // %%%%% maybe implement +VerifyActivationFrameSize here
292 //verify_thread(); //too slow; we will just verify on method entry & exit
293 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
294 #ifdef FAST_DISPATCH
295 if (table == Interpreter::dispatch_table(state)) {
296 // use IdispatchTables
297 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
298 // add offset to correct dispatch table
299 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
300 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
301 } else {
302 #endif
303 // dispatch table to use
304 AddressLiteral tbl(table);
305 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
306 set(tbl, G3_scratch); // compute addr of table
307 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
308 #ifdef FAST_DISPATCH
309 }
310 #endif
311 jmp( G3_scratch, 0 );
312 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
313 else delayed()->nop();
314 }
317 // Helpers for expression stack
319 // Longs and doubles are Category 2 computational types in the
320 // JVM specification (section 3.11.1) and take 2 expression stack or
321 // local slots.
322 // Aligning them on 32 bit with tagged stacks is hard because the code generated
323 // for the dup* bytecodes depends on what types are already on the stack.
324 // If the types are split into the two stack/local slots, that is much easier
325 // (and we can use 0 for non-reference tags).
327 // Known good alignment in _LP64 but unknown otherwise
328 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
329 assert_not_delayed();
331 #ifdef _LP64
332 ldf(FloatRegisterImpl::D, r1, offset, d);
333 #else
334 ldf(FloatRegisterImpl::S, r1, offset, d);
335 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize, d->successor());
336 #endif
337 }
339 // Known good alignment in _LP64 but unknown otherwise
340 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
341 assert_not_delayed();
343 #ifdef _LP64
344 stf(FloatRegisterImpl::D, d, r1, offset);
345 // store something more useful here
346 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
347 #else
348 stf(FloatRegisterImpl::S, d, r1, offset);
349 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize);
350 #endif
351 }
354 // Known good alignment in _LP64 but unknown otherwise
355 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
356 assert_not_delayed();
357 #ifdef _LP64
358 ldx(r1, offset, rd);
359 #else
360 ld(r1, offset, rd);
361 ld(r1, offset + Interpreter::stackElementSize, rd->successor());
362 #endif
363 }
365 // Known good alignment in _LP64 but unknown otherwise
366 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
367 assert_not_delayed();
369 #ifdef _LP64
370 stx(l, r1, offset);
371 // store something more useful here
372 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
373 #else
374 st(l, r1, offset);
375 st(l->successor(), r1, offset + Interpreter::stackElementSize);
376 #endif
377 }
379 void InterpreterMacroAssembler::pop_i(Register r) {
380 assert_not_delayed();
381 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
382 inc(Lesp, Interpreter::stackElementSize);
383 debug_only(verify_esp(Lesp));
384 }
386 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
387 assert_not_delayed();
388 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
389 inc(Lesp, Interpreter::stackElementSize);
390 debug_only(verify_esp(Lesp));
391 }
393 void InterpreterMacroAssembler::pop_l(Register r) {
394 assert_not_delayed();
395 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
396 inc(Lesp, 2*Interpreter::stackElementSize);
397 debug_only(verify_esp(Lesp));
398 }
401 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
402 assert_not_delayed();
403 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
404 inc(Lesp, Interpreter::stackElementSize);
405 debug_only(verify_esp(Lesp));
406 }
409 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
410 assert_not_delayed();
411 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
412 inc(Lesp, 2*Interpreter::stackElementSize);
413 debug_only(verify_esp(Lesp));
414 }
417 void InterpreterMacroAssembler::push_i(Register r) {
418 assert_not_delayed();
419 debug_only(verify_esp(Lesp));
420 st(r, Lesp, 0);
421 dec(Lesp, Interpreter::stackElementSize);
422 }
424 void InterpreterMacroAssembler::push_ptr(Register r) {
425 assert_not_delayed();
426 st_ptr(r, Lesp, 0);
427 dec(Lesp, Interpreter::stackElementSize);
428 }
430 // remember: our convention for longs in SPARC is:
431 // O0 (Otos_l1) has high-order part in first word,
432 // O1 (Otos_l2) has low-order part in second word
434 void InterpreterMacroAssembler::push_l(Register r) {
435 assert_not_delayed();
436 debug_only(verify_esp(Lesp));
437 // Longs are stored in memory-correct order, even if unaligned.
438 int offset = -Interpreter::stackElementSize;
439 store_unaligned_long(r, Lesp, offset);
440 dec(Lesp, 2 * Interpreter::stackElementSize);
441 }
444 void InterpreterMacroAssembler::push_f(FloatRegister f) {
445 assert_not_delayed();
446 debug_only(verify_esp(Lesp));
447 stf(FloatRegisterImpl::S, f, Lesp, 0);
448 dec(Lesp, Interpreter::stackElementSize);
449 }
452 void InterpreterMacroAssembler::push_d(FloatRegister d) {
453 assert_not_delayed();
454 debug_only(verify_esp(Lesp));
455 // Longs are stored in memory-correct order, even if unaligned.
456 int offset = -Interpreter::stackElementSize;
457 store_unaligned_double(d, Lesp, offset);
458 dec(Lesp, 2 * Interpreter::stackElementSize);
459 }
462 void InterpreterMacroAssembler::push(TosState state) {
463 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
464 switch (state) {
465 case atos: push_ptr(); break;
466 case btos: push_i(); break;
467 case ctos:
468 case stos: push_i(); break;
469 case itos: push_i(); break;
470 case ltos: push_l(); break;
471 case ftos: push_f(); break;
472 case dtos: push_d(); break;
473 case vtos: /* nothing to do */ break;
474 default : ShouldNotReachHere();
475 }
476 }
479 void InterpreterMacroAssembler::pop(TosState state) {
480 switch (state) {
481 case atos: pop_ptr(); break;
482 case btos: pop_i(); break;
483 case ctos:
484 case stos: pop_i(); break;
485 case itos: pop_i(); break;
486 case ltos: pop_l(); break;
487 case ftos: pop_f(); break;
488 case dtos: pop_d(); break;
489 case vtos: /* nothing to do */ break;
490 default : ShouldNotReachHere();
491 }
492 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
493 }
496 // Helpers for swap and dup
497 void InterpreterMacroAssembler::load_ptr(int n, Register val) {
498 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
499 }
500 void InterpreterMacroAssembler::store_ptr(int n, Register val) {
501 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
502 }
505 void InterpreterMacroAssembler::load_receiver(Register param_count,
506 Register recv) {
507 sll(param_count, Interpreter::logStackElementSize, param_count);
508 ld_ptr(Lesp, param_count, recv); // gets receiver oop
509 }
511 void InterpreterMacroAssembler::empty_expression_stack() {
512 // Reset Lesp.
513 sub( Lmonitors, wordSize, Lesp );
515 // Reset SP by subtracting more space from Lesp.
516 Label done;
517 verify_oop(Lmethod);
518 assert(G4_scratch != Gframe_size, "Only you can prevent register aliasing!");
520 // A native does not need to do this, since its callee does not change SP.
521 ld(Lmethod, methodOopDesc::access_flags_offset(), Gframe_size); // Load access flags.
522 btst(JVM_ACC_NATIVE, Gframe_size);
523 br(Assembler::notZero, false, Assembler::pt, done);
524 delayed()->nop();
526 // Compute max expression stack+register save area
527 lduh(Lmethod, in_bytes(methodOopDesc::max_stack_offset()), Gframe_size); // Load max stack.
528 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
530 //
531 // now set up a stack frame with the size computed above
532 //
533 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
534 sll( Gframe_size, LogBytesPerWord, Gframe_size );
535 sub( Lesp, Gframe_size, Gframe_size );
536 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
537 debug_only(verify_sp(Gframe_size, G4_scratch));
538 #ifdef _LP64
539 sub(Gframe_size, STACK_BIAS, Gframe_size );
540 #endif
541 mov(Gframe_size, SP);
543 bind(done);
544 }
547 #ifdef ASSERT
548 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
549 Label Bad, OK;
551 // Saved SP must be aligned.
552 #ifdef _LP64
553 btst(2*BytesPerWord-1, Rsp);
554 #else
555 btst(LongAlignmentMask, Rsp);
556 #endif
557 br(Assembler::notZero, false, Assembler::pn, Bad);
558 delayed()->nop();
560 // Saved SP, plus register window size, must not be above FP.
561 add(Rsp, frame::register_save_words * wordSize, Rtemp);
562 #ifdef _LP64
563 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
564 #endif
565 cmp_and_brx_short(Rtemp, FP, Assembler::greaterUnsigned, Assembler::pn, Bad);
567 // Saved SP must not be ridiculously below current SP.
568 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
569 set(maxstack, Rtemp);
570 sub(SP, Rtemp, Rtemp);
571 #ifdef _LP64
572 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
573 #endif
574 cmp_and_brx_short(Rsp, Rtemp, Assembler::lessUnsigned, Assembler::pn, Bad);
576 ba_short(OK);
578 bind(Bad);
579 stop("on return to interpreted call, restored SP is corrupted");
581 bind(OK);
582 }
585 void InterpreterMacroAssembler::verify_esp(Register Resp) {
586 // about to read or write Resp[0]
587 // make sure it is not in the monitors or the register save area
588 Label OK1, OK2;
590 cmp(Resp, Lmonitors);
591 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
592 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
593 stop("too many pops: Lesp points into monitor area");
594 bind(OK1);
595 #ifdef _LP64
596 sub(Resp, STACK_BIAS, Resp);
597 #endif
598 cmp(Resp, SP);
599 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
600 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
601 stop("too many pushes: Lesp points into register window");
602 bind(OK2);
603 }
604 #endif // ASSERT
606 // Load compiled (i2c) or interpreter entry when calling from interpreted and
607 // do the call. Centralized so that all interpreter calls will do the same actions.
608 // If jvmti single stepping is on for a thread we must not call compiled code.
609 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
611 // Assume we want to go compiled if available
613 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
615 if (JvmtiExport::can_post_interpreter_events()) {
616 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
617 // compiled code in threads for which the event is enabled. Check here for
618 // interp_only_mode if these events CAN be enabled.
619 verify_thread();
620 Label skip_compiled_code;
622 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
623 ld(interp_only, scratch);
624 cmp_zero_and_br(Assembler::notZero, scratch, skip_compiled_code, true, Assembler::pn);
625 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
626 bind(skip_compiled_code);
627 }
629 // the i2c_adapters need methodOop in G5_method (right? %%%)
630 // do the call
631 #ifdef ASSERT
632 {
633 Label ok;
634 br_notnull_short(target, Assembler::pt, ok);
635 stop("null entry point");
636 bind(ok);
637 }
638 #endif // ASSERT
640 // Adjust Rret first so Llast_SP can be same as Rret
641 add(Rret, -frame::pc_return_offset, O7);
642 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
643 // Record SP so we can remove any stack space allocated by adapter transition
644 jmp(target, 0);
645 delayed()->mov(SP, Llast_SP);
646 }
648 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
649 assert_not_delayed();
651 Label not_taken;
652 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
653 else br (cc, false, Assembler::pn, not_taken);
654 delayed()->nop();
656 TemplateTable::branch(false,false);
658 bind(not_taken);
660 profile_not_taken_branch(G3_scratch);
661 }
664 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
665 int bcp_offset,
666 Register Rtmp,
667 Register Rdst,
668 signedOrNot is_signed,
669 setCCOrNot should_set_CC ) {
670 assert(Rtmp != Rdst, "need separate temp register");
671 assert_not_delayed();
672 switch (is_signed) {
673 default: ShouldNotReachHere();
675 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
676 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
677 }
678 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
679 sll( Rdst, BitsPerByte, Rdst);
680 switch (should_set_CC ) {
681 default: ShouldNotReachHere();
683 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
684 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
685 }
686 }
689 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
690 int bcp_offset,
691 Register Rtmp,
692 Register Rdst,
693 setCCOrNot should_set_CC ) {
694 assert(Rtmp != Rdst, "need separate temp register");
695 assert_not_delayed();
696 add( Lbcp, bcp_offset, Rtmp);
697 andcc( Rtmp, 3, G0);
698 Label aligned;
699 switch (should_set_CC ) {
700 default: ShouldNotReachHere();
702 case set_CC: break;
703 case dont_set_CC: break;
704 }
706 br(Assembler::zero, true, Assembler::pn, aligned);
707 #ifdef _LP64
708 delayed()->ldsw(Rtmp, 0, Rdst);
709 #else
710 delayed()->ld(Rtmp, 0, Rdst);
711 #endif
713 ldub(Lbcp, bcp_offset + 3, Rdst);
714 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
715 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
716 #ifdef _LP64
717 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
718 #else
719 // Unsigned load is faster than signed on some implementations
720 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
721 #endif
722 or3(Rtmp, Rdst, Rdst );
724 bind(aligned);
725 if (should_set_CC == set_CC) tst(Rdst);
726 }
729 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register cache, Register tmp,
730 int bcp_offset, size_t index_size) {
731 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
732 if (index_size == sizeof(u2)) {
733 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
734 } else if (index_size == sizeof(u4)) {
735 assert(EnableInvokeDynamic, "giant index used only for JSR 292");
736 get_4_byte_integer_at_bcp(bcp_offset, cache, tmp);
737 assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
738 xor3(tmp, -1, tmp); // convert to plain index
739 } else if (index_size == sizeof(u1)) {
740 assert(EnableInvokeDynamic, "tiny index used only for JSR 292");
741 ldub(Lbcp, bcp_offset, tmp);
742 } else {
743 ShouldNotReachHere();
744 }
745 }
748 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
749 int bcp_offset, size_t index_size) {
750 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
751 assert_different_registers(cache, tmp);
752 assert_not_delayed();
753 get_cache_index_at_bcp(cache, tmp, bcp_offset, index_size);
754 // convert from field index to ConstantPoolCacheEntry index and from
755 // word index to byte offset
756 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
757 add(LcpoolCache, tmp, cache);
758 }
761 void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register cache,
762 Register temp,
763 Register bytecode,
764 int byte_no,
765 int bcp_offset,
766 size_t index_size) {
767 get_cache_and_index_at_bcp(cache, temp, bcp_offset, index_size);
768 ld_ptr(cache, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset(), bytecode);
769 const int shift_count = (1 + byte_no) * BitsPerByte;
770 assert((byte_no == TemplateTable::f1_byte && shift_count == ConstantPoolCacheEntry::bytecode_1_shift) ||
771 (byte_no == TemplateTable::f2_byte && shift_count == ConstantPoolCacheEntry::bytecode_2_shift),
772 "correct shift count");
773 srl(bytecode, shift_count, bytecode);
774 assert(ConstantPoolCacheEntry::bytecode_1_mask == ConstantPoolCacheEntry::bytecode_2_mask, "common mask");
775 and3(bytecode, ConstantPoolCacheEntry::bytecode_1_mask, bytecode);
776 }
779 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
780 int bcp_offset, size_t index_size) {
781 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
782 assert_different_registers(cache, tmp);
783 assert_not_delayed();
784 if (index_size == sizeof(u2)) {
785 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
786 } else {
787 ShouldNotReachHere(); // other sizes not supported here
788 }
789 // convert from field index to ConstantPoolCacheEntry index
790 // and from word index to byte offset
791 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
792 // skip past the header
793 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
794 // construct pointer to cache entry
795 add(LcpoolCache, tmp, cache);
796 }
799 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
800 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
801 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
802 Register Rsuper_klass,
803 Register Rtmp1,
804 Register Rtmp2,
805 Register Rtmp3,
806 Label &ok_is_subtype ) {
807 Label not_subtype;
809 // Profile the not-null value's klass.
810 profile_typecheck(Rsub_klass, Rtmp1);
812 check_klass_subtype_fast_path(Rsub_klass, Rsuper_klass,
813 Rtmp1, Rtmp2,
814 &ok_is_subtype, ¬_subtype, NULL);
816 check_klass_subtype_slow_path(Rsub_klass, Rsuper_klass,
817 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
818 &ok_is_subtype, NULL);
820 bind(not_subtype);
821 profile_typecheck_failed(Rtmp1);
822 }
824 // Separate these two to allow for delay slot in middle
825 // These are used to do a test and full jump to exception-throwing code.
827 // %%%%% Could possibly reoptimize this by testing to see if could use
828 // a single conditional branch (i.e. if span is small enough.
829 // If you go that route, than get rid of the split and give up
830 // on the delay-slot hack.
832 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
833 Label& ok ) {
834 assert_not_delayed();
835 br(ok_condition, true, pt, ok);
836 // DELAY SLOT
837 }
839 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
840 Label& ok ) {
841 assert_not_delayed();
842 bp( ok_condition, true, Assembler::xcc, pt, ok);
843 // DELAY SLOT
844 }
846 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
847 Label& ok ) {
848 assert_not_delayed();
849 brx(ok_condition, true, pt, ok);
850 // DELAY SLOT
851 }
853 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
854 Register Rscratch,
855 Label& ok ) {
856 assert(throw_entry_point != NULL, "entry point must be generated by now");
857 AddressLiteral dest(throw_entry_point);
858 jump_to(dest, Rscratch);
859 delayed()->nop();
860 bind(ok);
861 }
864 // And if you cannot use the delay slot, here is a shorthand:
866 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
867 address throw_entry_point,
868 Register Rscratch ) {
869 Label ok;
870 if (ok_condition != never) {
871 throw_if_not_1_icc( ok_condition, ok);
872 delayed()->nop();
873 }
874 throw_if_not_2( throw_entry_point, Rscratch, ok);
875 }
876 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
877 address throw_entry_point,
878 Register Rscratch ) {
879 Label ok;
880 if (ok_condition != never) {
881 throw_if_not_1_xcc( ok_condition, ok);
882 delayed()->nop();
883 }
884 throw_if_not_2( throw_entry_point, Rscratch, ok);
885 }
886 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
887 address throw_entry_point,
888 Register Rscratch ) {
889 Label ok;
890 if (ok_condition != never) {
891 throw_if_not_1_x( ok_condition, ok);
892 delayed()->nop();
893 }
894 throw_if_not_2( throw_entry_point, Rscratch, ok);
895 }
897 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
898 // Note: res is still shy of address by array offset into object.
900 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
901 assert_not_delayed();
903 verify_oop(array);
904 #ifdef _LP64
905 // sign extend since tos (index) can be a 32bit value
906 sra(index, G0, index);
907 #endif // _LP64
909 // check array
910 Label ptr_ok;
911 tst(array);
912 throw_if_not_1_x( notZero, ptr_ok );
913 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
914 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
916 Label index_ok;
917 cmp(index, tmp);
918 throw_if_not_1_icc( lessUnsigned, index_ok );
919 if (index_shift > 0) delayed()->sll(index, index_shift, index);
920 else delayed()->add(array, index, res); // addr - const offset in index
921 // convention: move aberrant index into G3_scratch for exception message
922 mov(index, G3_scratch);
923 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
925 // add offset if didn't do it in delay slot
926 if (index_shift > 0) add(array, index, res); // addr - const offset in index
927 }
930 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
931 assert_not_delayed();
933 // pop array
934 pop_ptr(array);
936 // check array
937 index_check_without_pop(array, index, index_shift, tmp, res);
938 }
941 void InterpreterMacroAssembler::get_const(Register Rdst) {
942 ld_ptr(Lmethod, in_bytes(methodOopDesc::const_offset()), Rdst);
943 }
946 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
947 get_const(Rdst);
948 ld_ptr(Rdst, in_bytes(constMethodOopDesc::constants_offset()), Rdst);
949 }
952 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
953 get_constant_pool(Rdst);
954 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
955 }
958 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
959 get_constant_pool(Rcpool);
960 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
961 }
964 // unlock if synchronized method
965 //
966 // Unlock the receiver if this is a synchronized method.
967 // Unlock any Java monitors from syncronized blocks.
968 //
969 // If there are locked Java monitors
970 // If throw_monitor_exception
971 // throws IllegalMonitorStateException
972 // Else if install_monitor_exception
973 // installs IllegalMonitorStateException
974 // Else
975 // no error processing
976 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
977 bool throw_monitor_exception,
978 bool install_monitor_exception) {
979 Label unlocked, unlock, no_unlock;
981 // get the value of _do_not_unlock_if_synchronized into G1_scratch
982 const Address do_not_unlock_if_synchronized(G2_thread,
983 JavaThread::do_not_unlock_if_synchronized_offset());
984 ldbool(do_not_unlock_if_synchronized, G1_scratch);
985 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
987 // check if synchronized method
988 const Address access_flags(Lmethod, methodOopDesc::access_flags_offset());
989 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
990 push(state); // save tos
991 ld(access_flags, G3_scratch); // Load access flags.
992 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
993 br(zero, false, pt, unlocked);
994 delayed()->nop();
996 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
997 // is set.
998 cmp_zero_and_br(Assembler::notZero, G1_scratch, no_unlock);
999 delayed()->nop();
1001 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
1002 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
1004 //Intel: if (throw_monitor_exception) ... else ...
1005 // Entry already unlocked, need to throw exception
1006 //...
1008 // pass top-most monitor elem
1009 add( top_most_monitor(), O1 );
1011 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
1012 br_notnull_short(G3_scratch, pt, unlock);
1014 if (throw_monitor_exception) {
1015 // Entry already unlocked need to throw an exception
1016 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1017 should_not_reach_here();
1018 } else {
1019 // Monitor already unlocked during a stack unroll.
1020 // If requested, install an illegal_monitor_state_exception.
1021 // Continue with stack unrolling.
1022 if (install_monitor_exception) {
1023 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1024 }
1025 ba_short(unlocked);
1026 }
1028 bind(unlock);
1030 unlock_object(O1);
1032 bind(unlocked);
1034 // I0, I1: Might contain return value
1036 // Check that all monitors are unlocked
1037 { Label loop, exception, entry, restart;
1039 Register Rmptr = O0;
1040 Register Rtemp = O1;
1041 Register Rlimit = Lmonitors;
1042 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1043 assert( (delta & LongAlignmentMask) == 0,
1044 "sizeof BasicObjectLock must be even number of doublewords");
1046 #ifdef ASSERT
1047 add(top_most_monitor(), Rmptr, delta);
1048 { Label L;
1049 // ensure that Rmptr starts out above (or at) Rlimit
1050 cmp_and_brx_short(Rmptr, Rlimit, Assembler::greaterEqualUnsigned, pn, L);
1051 stop("monitor stack has negative size");
1052 bind(L);
1053 }
1054 #endif
1055 bind(restart);
1056 ba(entry);
1057 delayed()->
1058 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1060 // Entry is still locked, need to throw exception
1061 bind(exception);
1062 if (throw_monitor_exception) {
1063 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1064 should_not_reach_here();
1065 } else {
1066 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1067 // Unlock does not block, so don't have to worry about the frame
1068 unlock_object(Rmptr);
1069 if (install_monitor_exception) {
1070 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1071 }
1072 ba_short(restart);
1073 }
1075 bind(loop);
1076 cmp(Rtemp, G0); // check if current entry is used
1077 brx(Assembler::notEqual, false, pn, exception);
1078 delayed()->
1079 dec(Rmptr, delta); // otherwise advance to next entry
1080 #ifdef ASSERT
1081 { Label L;
1082 // ensure that Rmptr has not somehow stepped below Rlimit
1083 cmp_and_brx_short(Rmptr, Rlimit, Assembler::greaterEqualUnsigned, pn, L);
1084 stop("ran off the end of the monitor stack");
1085 bind(L);
1086 }
1087 #endif
1088 bind(entry);
1089 cmp(Rmptr, Rlimit); // check if bottom reached
1090 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1091 delayed()->
1092 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1093 }
1095 bind(no_unlock);
1096 pop(state);
1097 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1098 }
1101 // remove activation
1102 //
1103 // Unlock the receiver if this is a synchronized method.
1104 // Unlock any Java monitors from syncronized blocks.
1105 // Remove the activation from the stack.
1106 //
1107 // If there are locked Java monitors
1108 // If throw_monitor_exception
1109 // throws IllegalMonitorStateException
1110 // Else if install_monitor_exception
1111 // installs IllegalMonitorStateException
1112 // Else
1113 // no error processing
1114 void InterpreterMacroAssembler::remove_activation(TosState state,
1115 bool throw_monitor_exception,
1116 bool install_monitor_exception) {
1118 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1120 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1121 notify_method_exit(false, state, NotifyJVMTI);
1123 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1124 verify_oop(Lmethod);
1125 verify_thread();
1127 // return tos
1128 assert(Otos_l1 == Otos_i, "adjust code below");
1129 switch (state) {
1130 #ifdef _LP64
1131 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1132 #else
1133 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1134 #endif
1135 case btos: // fall through
1136 case ctos:
1137 case stos: // fall through
1138 case atos: // fall through
1139 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1140 case ftos: // fall through
1141 case dtos: // fall through
1142 case vtos: /* nothing to do */ break;
1143 default : ShouldNotReachHere();
1144 }
1146 #if defined(COMPILER2) && !defined(_LP64)
1147 if (state == ltos) {
1148 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1149 // or compiled so just be safe use G1 and O0/O1
1151 // Shift bits into high (msb) of G1
1152 sllx(Otos_l1->after_save(), 32, G1);
1153 // Zero extend low bits
1154 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1155 or3 (Otos_l2->after_save(), G1, G1);
1156 }
1157 #endif /* COMPILER2 */
1159 }
1160 #endif /* CC_INTERP */
1163 // Lock object
1164 //
1165 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1166 // it must be initialized with the object to lock
1167 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1168 if (UseHeavyMonitors) {
1169 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1170 }
1171 else {
1172 Register obj_reg = Object;
1173 Register mark_reg = G4_scratch;
1174 Register temp_reg = G1_scratch;
1175 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1176 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1177 Label done;
1179 Label slow_case;
1181 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1183 // load markOop from object into mark_reg
1184 ld_ptr(mark_addr, mark_reg);
1186 if (UseBiasedLocking) {
1187 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1188 }
1190 // get the address of basicLock on stack that will be stored in the object
1191 // we need a temporary register here as we do not want to clobber lock_reg
1192 // (cas clobbers the destination register)
1193 mov(lock_reg, temp_reg);
1194 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1195 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1196 // initialize the box (Must happen before we update the object mark!)
1197 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1198 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1199 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1200 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1201 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1203 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1204 cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done);
1206 // We did not see an unlocked object so try the fast recursive case
1208 // Check if owner is self by comparing the value in the markOop of object
1209 // with the stack pointer
1210 sub(temp_reg, SP, temp_reg);
1211 #ifdef _LP64
1212 sub(temp_reg, STACK_BIAS, temp_reg);
1213 #endif
1214 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1216 // Composite "andcc" test:
1217 // (a) %sp -vs- markword proximity check, and,
1218 // (b) verify mark word LSBs == 0 (Stack-locked).
1219 //
1220 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1221 // Note that the page size used for %sp proximity testing is arbitrary and is
1222 // unrelated to the actual MMU page size. We use a 'logical' page size of
1223 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1224 // field of the andcc instruction.
1225 andcc (temp_reg, 0xFFFFF003, G0) ;
1227 // if condition is true we are done and hence we can store 0 in the displaced
1228 // header indicating it is a recursive lock and be done
1229 brx(Assembler::zero, true, Assembler::pt, done);
1230 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1232 // none of the above fast optimizations worked so we have to get into the
1233 // slow case of monitor enter
1234 bind(slow_case);
1235 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1237 bind(done);
1238 }
1239 }
1241 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1242 //
1243 // Argument - lock_reg points to the BasicObjectLock for lock
1244 // Throw IllegalMonitorException if object is not locked by current thread
1245 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1246 if (UseHeavyMonitors) {
1247 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1248 } else {
1249 Register obj_reg = G3_scratch;
1250 Register mark_reg = G4_scratch;
1251 Register displaced_header_reg = G1_scratch;
1252 Address lockobj_addr(lock_reg, BasicObjectLock::obj_offset_in_bytes());
1253 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1254 Label done;
1256 if (UseBiasedLocking) {
1257 // load the object out of the BasicObjectLock
1258 ld_ptr(lockobj_addr, obj_reg);
1259 biased_locking_exit(mark_addr, mark_reg, done, true);
1260 st_ptr(G0, lockobj_addr); // free entry
1261 }
1263 // Test first if we are in the fast recursive case
1264 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes() + BasicLock::displaced_header_offset_in_bytes());
1265 ld_ptr(lock_addr, displaced_header_reg);
1266 br_null(displaced_header_reg, true, Assembler::pn, done);
1267 delayed()->st_ptr(G0, lockobj_addr); // free entry
1269 // See if it is still a light weight lock, if so we just unlock
1270 // the object and we are done
1272 if (!UseBiasedLocking) {
1273 // load the object out of the BasicObjectLock
1274 ld_ptr(lockobj_addr, obj_reg);
1275 }
1277 // we have the displaced header in displaced_header_reg
1278 // we expect to see the stack address of the basicLock in case the
1279 // lock is still a light weight lock (lock_reg)
1280 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1281 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1282 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1283 cmp(lock_reg, displaced_header_reg);
1284 brx(Assembler::equal, true, Assembler::pn, done);
1285 delayed()->st_ptr(G0, lockobj_addr); // free entry
1287 // The lock has been converted into a heavy lock and hence
1288 // we need to get into the slow case
1290 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1292 bind(done);
1293 }
1294 }
1296 #ifndef CC_INTERP
1298 // Get the method data pointer from the methodOop and set the
1299 // specified register to its value.
1301 void InterpreterMacroAssembler::set_method_data_pointer() {
1302 assert(ProfileInterpreter, "must be profiling interpreter");
1303 Label get_continue;
1305 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1306 test_method_data_pointer(get_continue);
1307 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1308 bind(get_continue);
1309 }
1311 // Set the method data pointer for the current bcp.
1313 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1314 assert(ProfileInterpreter, "must be profiling interpreter");
1315 Label zero_continue;
1317 // Test MDO to avoid the call if it is NULL.
1318 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1319 test_method_data_pointer(zero_continue);
1320 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1321 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1322 add(ImethodDataPtr, O0, ImethodDataPtr);
1323 bind(zero_continue);
1324 }
1326 // Test ImethodDataPtr. If it is null, continue at the specified label
1328 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1329 assert(ProfileInterpreter, "must be profiling interpreter");
1330 br_null_short(ImethodDataPtr, Assembler::pn, zero_continue);
1331 }
1333 void InterpreterMacroAssembler::verify_method_data_pointer() {
1334 assert(ProfileInterpreter, "must be profiling interpreter");
1335 #ifdef ASSERT
1336 Label verify_continue;
1337 test_method_data_pointer(verify_continue);
1339 // If the mdp is valid, it will point to a DataLayout header which is
1340 // consistent with the bcp. The converse is highly probable also.
1341 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1342 ld_ptr(Lmethod, methodOopDesc::const_offset(), O5);
1343 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1344 add(G3_scratch, O5, G3_scratch);
1345 cmp(Lbcp, G3_scratch);
1346 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1348 Register temp_reg = O5;
1349 delayed()->mov(ImethodDataPtr, temp_reg);
1350 // %%% should use call_VM_leaf here?
1351 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1352 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1353 Address d_save(FP, -sizeof(jdouble) + STACK_BIAS);
1354 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1355 mov(temp_reg->after_save(), O2);
1356 save_thread(L7_thread_cache);
1357 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1358 delayed()->nop();
1359 restore_thread(L7_thread_cache);
1360 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1361 restore();
1362 bind(verify_continue);
1363 #endif // ASSERT
1364 }
1366 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1367 Register Rtmp,
1368 Label &profile_continue) {
1369 assert(ProfileInterpreter, "must be profiling interpreter");
1370 // Control will flow to "profile_continue" if the counter is less than the
1371 // limit or if we call profile_method()
1373 Label done;
1375 // if no method data exists, and the counter is high enough, make one
1376 br_notnull_short(ImethodDataPtr, Assembler::pn, done);
1378 // Test to see if we should create a method data oop
1379 AddressLiteral profile_limit((address) &InvocationCounter::InterpreterProfileLimit);
1380 sethi(profile_limit, Rtmp);
1381 ld(Rtmp, profile_limit.low10(), Rtmp);
1382 cmp_and_br_short(invocation_count, Rtmp, Assembler::lessUnsigned, Assembler::pn, profile_continue);
1384 // Build it now.
1385 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method));
1386 set_method_data_pointer_for_bcp();
1387 ba_short(profile_continue);
1388 bind(done);
1389 }
1391 // Store a value at some constant offset from the method data pointer.
1393 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1394 assert(ProfileInterpreter, "must be profiling interpreter");
1395 st_ptr(value, ImethodDataPtr, constant);
1396 }
1398 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1399 Register bumped_count,
1400 bool decrement) {
1401 assert(ProfileInterpreter, "must be profiling interpreter");
1403 // Load the counter.
1404 ld_ptr(counter, bumped_count);
1406 if (decrement) {
1407 // Decrement the register. Set condition codes.
1408 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1410 // If the decrement causes the counter to overflow, stay negative
1411 Label L;
1412 brx(Assembler::negative, true, Assembler::pn, L);
1414 // Store the decremented counter, if it is still negative.
1415 delayed()->st_ptr(bumped_count, counter);
1416 bind(L);
1417 } else {
1418 // Increment the register. Set carry flag.
1419 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1421 // If the increment causes the counter to overflow, pull back by 1.
1422 assert(DataLayout::counter_increment == 1, "subc works");
1423 subc(bumped_count, G0, bumped_count);
1425 // Store the incremented counter.
1426 st_ptr(bumped_count, counter);
1427 }
1428 }
1430 // Increment the value at some constant offset from the method data pointer.
1432 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1433 Register bumped_count,
1434 bool decrement) {
1435 // Locate the counter at a fixed offset from the mdp:
1436 Address counter(ImethodDataPtr, constant);
1437 increment_mdp_data_at(counter, bumped_count, decrement);
1438 }
1440 // Increment the value at some non-fixed (reg + constant) offset from
1441 // the method data pointer.
1443 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1444 int constant,
1445 Register bumped_count,
1446 Register scratch2,
1447 bool decrement) {
1448 // Add the constant to reg to get the offset.
1449 add(ImethodDataPtr, reg, scratch2);
1450 Address counter(scratch2, constant);
1451 increment_mdp_data_at(counter, bumped_count, decrement);
1452 }
1454 // Set a flag value at the current method data pointer position.
1455 // Updates a single byte of the header, to avoid races with other header bits.
1457 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1458 Register scratch) {
1459 assert(ProfileInterpreter, "must be profiling interpreter");
1460 // Load the data header
1461 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1463 // Set the flag
1464 or3(scratch, flag_constant, scratch);
1466 // Store the modified header.
1467 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1468 }
1470 // Test the location at some offset from the method data pointer.
1471 // If it is not equal to value, branch to the not_equal_continue Label.
1472 // Set condition codes to match the nullness of the loaded value.
1474 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1475 Register value,
1476 Label& not_equal_continue,
1477 Register scratch) {
1478 assert(ProfileInterpreter, "must be profiling interpreter");
1479 ld_ptr(ImethodDataPtr, offset, scratch);
1480 cmp(value, scratch);
1481 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1482 delayed()->tst(scratch);
1483 }
1485 // Update the method data pointer by the displacement located at some fixed
1486 // offset from the method data pointer.
1488 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1489 Register scratch) {
1490 assert(ProfileInterpreter, "must be profiling interpreter");
1491 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1492 add(ImethodDataPtr, scratch, ImethodDataPtr);
1493 }
1495 // Update the method data pointer by the displacement located at the
1496 // offset (reg + offset_of_disp).
1498 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1499 int offset_of_disp,
1500 Register scratch) {
1501 assert(ProfileInterpreter, "must be profiling interpreter");
1502 add(reg, offset_of_disp, scratch);
1503 ld_ptr(ImethodDataPtr, scratch, scratch);
1504 add(ImethodDataPtr, scratch, ImethodDataPtr);
1505 }
1507 // Update the method data pointer by a simple constant displacement.
1509 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1510 assert(ProfileInterpreter, "must be profiling interpreter");
1511 add(ImethodDataPtr, constant, ImethodDataPtr);
1512 }
1514 // Update the method data pointer for a _ret bytecode whose target
1515 // was not among our cached targets.
1517 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1518 Register return_bci) {
1519 assert(ProfileInterpreter, "must be profiling interpreter");
1520 push(state);
1521 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1522 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1523 ld_ptr(l_tmp, return_bci);
1524 pop(state);
1525 }
1527 // Count a taken branch in the bytecodes.
1529 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1530 if (ProfileInterpreter) {
1531 Label profile_continue;
1533 // If no method data exists, go to profile_continue.
1534 test_method_data_pointer(profile_continue);
1536 // We are taking a branch. Increment the taken count.
1537 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1539 // The method data pointer needs to be updated to reflect the new target.
1540 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1541 bind (profile_continue);
1542 }
1543 }
1546 // Count a not-taken branch in the bytecodes.
1548 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1549 if (ProfileInterpreter) {
1550 Label profile_continue;
1552 // If no method data exists, go to profile_continue.
1553 test_method_data_pointer(profile_continue);
1555 // We are taking a branch. Increment the not taken count.
1556 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1558 // The method data pointer needs to be updated to correspond to the
1559 // next bytecode.
1560 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1561 bind (profile_continue);
1562 }
1563 }
1566 // Count a non-virtual call in the bytecodes.
1568 void InterpreterMacroAssembler::profile_call(Register scratch) {
1569 if (ProfileInterpreter) {
1570 Label profile_continue;
1572 // If no method data exists, go to profile_continue.
1573 test_method_data_pointer(profile_continue);
1575 // We are making a call. Increment the count.
1576 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1578 // The method data pointer needs to be updated to reflect the new target.
1579 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1580 bind (profile_continue);
1581 }
1582 }
1585 // Count a final call in the bytecodes.
1587 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1588 if (ProfileInterpreter) {
1589 Label profile_continue;
1591 // If no method data exists, go to profile_continue.
1592 test_method_data_pointer(profile_continue);
1594 // We are making a call. Increment the count.
1595 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1597 // The method data pointer needs to be updated to reflect the new target.
1598 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1599 bind (profile_continue);
1600 }
1601 }
1604 // Count a virtual call in the bytecodes.
1606 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1607 Register scratch,
1608 bool receiver_can_be_null) {
1609 if (ProfileInterpreter) {
1610 Label profile_continue;
1612 // If no method data exists, go to profile_continue.
1613 test_method_data_pointer(profile_continue);
1616 Label skip_receiver_profile;
1617 if (receiver_can_be_null) {
1618 Label not_null;
1619 br_notnull_short(receiver, Assembler::pt, not_null);
1620 // We are making a call. Increment the count for null receiver.
1621 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1622 ba_short(skip_receiver_profile);
1623 bind(not_null);
1624 }
1626 // Record the receiver type.
1627 record_klass_in_profile(receiver, scratch, true);
1628 bind(skip_receiver_profile);
1630 // The method data pointer needs to be updated to reflect the new target.
1631 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1632 bind (profile_continue);
1633 }
1634 }
1636 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1637 Register receiver, Register scratch,
1638 int start_row, Label& done, bool is_virtual_call) {
1639 if (TypeProfileWidth == 0) {
1640 if (is_virtual_call) {
1641 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1642 }
1643 return;
1644 }
1646 int last_row = VirtualCallData::row_limit() - 1;
1647 assert(start_row <= last_row, "must be work left to do");
1648 // Test this row for both the receiver and for null.
1649 // Take any of three different outcomes:
1650 // 1. found receiver => increment count and goto done
1651 // 2. found null => keep looking for case 1, maybe allocate this cell
1652 // 3. found something else => keep looking for cases 1 and 2
1653 // Case 3 is handled by a recursive call.
1654 for (int row = start_row; row <= last_row; row++) {
1655 Label next_test;
1656 bool test_for_null_also = (row == start_row);
1658 // See if the receiver is receiver[n].
1659 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1660 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1661 // delayed()->tst(scratch);
1663 // The receiver is receiver[n]. Increment count[n].
1664 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1665 increment_mdp_data_at(count_offset, scratch);
1666 ba_short(done);
1667 bind(next_test);
1669 if (test_for_null_also) {
1670 Label found_null;
1671 // Failed the equality check on receiver[n]... Test for null.
1672 if (start_row == last_row) {
1673 // The only thing left to do is handle the null case.
1674 if (is_virtual_call) {
1675 brx(Assembler::zero, false, Assembler::pn, found_null);
1676 delayed()->nop();
1677 // Receiver did not match any saved receiver and there is no empty row for it.
1678 // Increment total counter to indicate polymorphic case.
1679 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1680 ba_short(done);
1681 bind(found_null);
1682 } else {
1683 brx(Assembler::notZero, false, Assembler::pt, done);
1684 delayed()->nop();
1685 }
1686 break;
1687 }
1688 // Since null is rare, make it be the branch-taken case.
1689 brx(Assembler::zero, false, Assembler::pn, found_null);
1690 delayed()->nop();
1692 // Put all the "Case 3" tests here.
1693 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call);
1695 // Found a null. Keep searching for a matching receiver,
1696 // but remember that this is an empty (unused) slot.
1697 bind(found_null);
1698 }
1699 }
1701 // In the fall-through case, we found no matching receiver, but we
1702 // observed the receiver[start_row] is NULL.
1704 // Fill in the receiver field and increment the count.
1705 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1706 set_mdp_data_at(recvr_offset, receiver);
1707 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1708 mov(DataLayout::counter_increment, scratch);
1709 set_mdp_data_at(count_offset, scratch);
1710 if (start_row > 0) {
1711 ba_short(done);
1712 }
1713 }
1715 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1716 Register scratch, bool is_virtual_call) {
1717 assert(ProfileInterpreter, "must be profiling");
1718 Label done;
1720 record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call);
1722 bind (done);
1723 }
1726 // Count a ret in the bytecodes.
1728 void InterpreterMacroAssembler::profile_ret(TosState state,
1729 Register return_bci,
1730 Register scratch) {
1731 if (ProfileInterpreter) {
1732 Label profile_continue;
1733 uint row;
1735 // If no method data exists, go to profile_continue.
1736 test_method_data_pointer(profile_continue);
1738 // Update the total ret count.
1739 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1741 for (row = 0; row < RetData::row_limit(); row++) {
1742 Label next_test;
1744 // See if return_bci is equal to bci[n]:
1745 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1746 return_bci, next_test, scratch);
1748 // return_bci is equal to bci[n]. Increment the count.
1749 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1751 // The method data pointer needs to be updated to reflect the new target.
1752 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1753 ba_short(profile_continue);
1754 bind(next_test);
1755 }
1757 update_mdp_for_ret(state, return_bci);
1759 bind (profile_continue);
1760 }
1761 }
1763 // Profile an unexpected null in the bytecodes.
1764 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1765 if (ProfileInterpreter) {
1766 Label profile_continue;
1768 // If no method data exists, go to profile_continue.
1769 test_method_data_pointer(profile_continue);
1771 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1773 // The method data pointer needs to be updated.
1774 int mdp_delta = in_bytes(BitData::bit_data_size());
1775 if (TypeProfileCasts) {
1776 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1777 }
1778 update_mdp_by_constant(mdp_delta);
1780 bind (profile_continue);
1781 }
1782 }
1784 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1785 Register scratch) {
1786 if (ProfileInterpreter) {
1787 Label profile_continue;
1789 // If no method data exists, go to profile_continue.
1790 test_method_data_pointer(profile_continue);
1792 int mdp_delta = in_bytes(BitData::bit_data_size());
1793 if (TypeProfileCasts) {
1794 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1796 // Record the object type.
1797 record_klass_in_profile(klass, scratch, false);
1798 }
1800 // The method data pointer needs to be updated.
1801 update_mdp_by_constant(mdp_delta);
1803 bind (profile_continue);
1804 }
1805 }
1807 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1808 if (ProfileInterpreter && TypeProfileCasts) {
1809 Label profile_continue;
1811 // If no method data exists, go to profile_continue.
1812 test_method_data_pointer(profile_continue);
1814 int count_offset = in_bytes(CounterData::count_offset());
1815 // Back up the address, since we have already bumped the mdp.
1816 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1818 // *Decrement* the counter. We expect to see zero or small negatives.
1819 increment_mdp_data_at(count_offset, scratch, true);
1821 bind (profile_continue);
1822 }
1823 }
1825 // Count the default case of a switch construct.
1827 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1828 if (ProfileInterpreter) {
1829 Label profile_continue;
1831 // If no method data exists, go to profile_continue.
1832 test_method_data_pointer(profile_continue);
1834 // Update the default case count
1835 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1836 scratch);
1838 // The method data pointer needs to be updated.
1839 update_mdp_by_offset(
1840 in_bytes(MultiBranchData::default_displacement_offset()),
1841 scratch);
1843 bind (profile_continue);
1844 }
1845 }
1847 // Count the index'th case of a switch construct.
1849 void InterpreterMacroAssembler::profile_switch_case(Register index,
1850 Register scratch,
1851 Register scratch2,
1852 Register scratch3) {
1853 if (ProfileInterpreter) {
1854 Label profile_continue;
1856 // If no method data exists, go to profile_continue.
1857 test_method_data_pointer(profile_continue);
1859 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1860 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1861 smul(index, scratch, scratch);
1862 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1864 // Update the case count
1865 increment_mdp_data_at(scratch,
1866 in_bytes(MultiBranchData::relative_count_offset()),
1867 scratch2,
1868 scratch3);
1870 // The method data pointer needs to be updated.
1871 update_mdp_by_offset(scratch,
1872 in_bytes(MultiBranchData::relative_displacement_offset()),
1873 scratch2);
1875 bind (profile_continue);
1876 }
1877 }
1879 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1881 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1882 Register Rtemp,
1883 Register Rtemp2 ) {
1885 Register Rlimit = Lmonitors;
1886 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1887 assert( (delta & LongAlignmentMask) == 0,
1888 "sizeof BasicObjectLock must be even number of doublewords");
1890 sub( SP, delta, SP);
1891 sub( Lesp, delta, Lesp);
1892 sub( Lmonitors, delta, Lmonitors);
1894 if (!stack_is_empty) {
1896 // must copy stack contents down
1898 Label start_copying, next;
1900 // untested("monitor stack expansion");
1901 compute_stack_base(Rtemp);
1902 ba(start_copying);
1903 delayed()->cmp(Rtemp, Rlimit); // done? duplicated below
1905 // note: must copy from low memory upwards
1906 // On entry to loop,
1907 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
1908 // Loop mutates Rtemp
1910 bind( next);
1912 st_ptr(Rtemp2, Rtemp, 0);
1913 inc(Rtemp, wordSize);
1914 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
1916 bind( start_copying );
1918 brx( notEqual, true, pn, next );
1919 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
1921 // done copying stack
1922 }
1923 }
1925 // Locals
1926 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
1927 assert_not_delayed();
1928 sll(index, Interpreter::logStackElementSize, index);
1929 sub(Llocals, index, index);
1930 ld_ptr(index, 0, dst);
1931 // Note: index must hold the effective address--the iinc template uses it
1932 }
1934 // Just like access_local_ptr but the tag is a returnAddress
1935 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
1936 Register dst ) {
1937 assert_not_delayed();
1938 sll(index, Interpreter::logStackElementSize, index);
1939 sub(Llocals, index, index);
1940 ld_ptr(index, 0, dst);
1941 }
1943 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
1944 assert_not_delayed();
1945 sll(index, Interpreter::logStackElementSize, index);
1946 sub(Llocals, index, index);
1947 ld(index, 0, dst);
1948 // Note: index must hold the effective address--the iinc template uses it
1949 }
1952 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
1953 assert_not_delayed();
1954 sll(index, Interpreter::logStackElementSize, index);
1955 sub(Llocals, index, index);
1956 // First half stored at index n+1 (which grows down from Llocals[n])
1957 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
1958 }
1961 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
1962 assert_not_delayed();
1963 sll(index, Interpreter::logStackElementSize, index);
1964 sub(Llocals, index, index);
1965 ldf(FloatRegisterImpl::S, index, 0, dst);
1966 }
1969 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
1970 assert_not_delayed();
1971 sll(index, Interpreter::logStackElementSize, index);
1972 sub(Llocals, index, index);
1973 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
1974 }
1977 #ifdef ASSERT
1978 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
1979 Label L;
1981 assert(Rindex != Rscratch, "Registers cannot be same");
1982 assert(Rindex != Rscratch1, "Registers cannot be same");
1983 assert(Rlimit != Rscratch, "Registers cannot be same");
1984 assert(Rlimit != Rscratch1, "Registers cannot be same");
1985 assert(Rscratch1 != Rscratch, "Registers cannot be same");
1987 // untested("reg area corruption");
1988 add(Rindex, offset, Rscratch);
1989 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
1990 cmp_and_brx_short(Rscratch, Rscratch1, Assembler::greaterEqualUnsigned, pn, L);
1991 stop("regsave area is being clobbered");
1992 bind(L);
1993 }
1994 #endif // ASSERT
1997 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
1998 assert_not_delayed();
1999 sll(index, Interpreter::logStackElementSize, index);
2000 sub(Llocals, index, index);
2001 debug_only(check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);)
2002 st(src, index, 0);
2003 }
2005 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src ) {
2006 assert_not_delayed();
2007 sll(index, Interpreter::logStackElementSize, index);
2008 sub(Llocals, index, index);
2009 #ifdef ASSERT
2010 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
2011 #endif
2012 st_ptr(src, index, 0);
2013 }
2017 void InterpreterMacroAssembler::store_local_ptr( int n, Register src ) {
2018 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2019 }
2021 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2022 assert_not_delayed();
2023 sll(index, Interpreter::logStackElementSize, index);
2024 sub(Llocals, index, index);
2025 #ifdef ASSERT
2026 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2027 #endif
2028 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2029 }
2032 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2033 assert_not_delayed();
2034 sll(index, Interpreter::logStackElementSize, index);
2035 sub(Llocals, index, index);
2036 #ifdef ASSERT
2037 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
2038 #endif
2039 stf(FloatRegisterImpl::S, src, index, 0);
2040 }
2043 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2044 assert_not_delayed();
2045 sll(index, Interpreter::logStackElementSize, index);
2046 sub(Llocals, index, index);
2047 #ifdef ASSERT
2048 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2049 #endif
2050 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2051 }
2054 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2055 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2056 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2057 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2058 }
2061 Address InterpreterMacroAssembler::top_most_monitor() {
2062 return Address(FP, top_most_monitor_byte_offset());
2063 }
2066 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2067 add( Lesp, wordSize, Rdest );
2068 }
2070 #endif /* CC_INTERP */
2072 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2073 assert(UseCompiler, "incrementing must be useful");
2074 #ifdef CC_INTERP
2075 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2076 InvocationCounter::counter_offset());
2077 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2078 InvocationCounter::counter_offset());
2079 #else
2080 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2081 InvocationCounter::counter_offset());
2082 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2083 InvocationCounter::counter_offset());
2084 #endif /* CC_INTERP */
2085 int delta = InvocationCounter::count_increment;
2087 // Load each counter in a register
2088 ld( inv_counter, Rtmp );
2089 ld( be_counter, Rtmp2 );
2091 assert( is_simm13( delta ), " delta too large.");
2093 // Add the delta to the invocation counter and store the result
2094 add( Rtmp, delta, Rtmp );
2096 // Mask the backedge counter
2097 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2099 // Store value
2100 st( Rtmp, inv_counter);
2102 // Add invocation counter + backedge counter
2103 add( Rtmp, Rtmp2, Rtmp);
2105 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2106 }
2108 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2109 assert(UseCompiler, "incrementing must be useful");
2110 #ifdef CC_INTERP
2111 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2112 InvocationCounter::counter_offset());
2113 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2114 InvocationCounter::counter_offset());
2115 #else
2116 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2117 InvocationCounter::counter_offset());
2118 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2119 InvocationCounter::counter_offset());
2120 #endif /* CC_INTERP */
2121 int delta = InvocationCounter::count_increment;
2122 // Load each counter in a register
2123 ld( be_counter, Rtmp );
2124 ld( inv_counter, Rtmp2 );
2126 // Add the delta to the backedge counter
2127 add( Rtmp, delta, Rtmp );
2129 // Mask the invocation counter, add to backedge counter
2130 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2132 // and store the result to memory
2133 st( Rtmp, be_counter );
2135 // Add backedge + invocation counter
2136 add( Rtmp, Rtmp2, Rtmp );
2138 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2139 }
2141 #ifndef CC_INTERP
2142 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2143 Register branch_bcp,
2144 Register Rtmp ) {
2145 Label did_not_overflow;
2146 Label overflow_with_error;
2147 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2148 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2150 AddressLiteral limit(&InvocationCounter::InterpreterBackwardBranchLimit);
2151 load_contents(limit, Rtmp);
2152 cmp_and_br_short(backedge_count, Rtmp, Assembler::lessUnsigned, Assembler::pt, did_not_overflow);
2154 // When ProfileInterpreter is on, the backedge_count comes from the
2155 // methodDataOop, which value does not get reset on the call to
2156 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2157 // routine while the method is being compiled, add a second test to make sure
2158 // the overflow function is called only once every overflow_frequency.
2159 if (ProfileInterpreter) {
2160 const int overflow_frequency = 1024;
2161 andcc(backedge_count, overflow_frequency-1, Rtmp);
2162 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2163 delayed()->nop();
2164 }
2166 // overflow in loop, pass branch bytecode
2167 set(6,Rtmp);
2168 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2170 // Was an OSR adapter generated?
2171 // O0 = osr nmethod
2172 br_null_short(O0, Assembler::pn, overflow_with_error);
2174 // Has the nmethod been invalidated already?
2175 ld(O0, nmethod::entry_bci_offset(), O2);
2176 cmp_and_br_short(O2, InvalidOSREntryBci, Assembler::equal, Assembler::pn, overflow_with_error);
2178 // migrate the interpreter frame off of the stack
2180 mov(G2_thread, L7);
2181 // save nmethod
2182 mov(O0, L6);
2183 set_last_Java_frame(SP, noreg);
2184 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2185 reset_last_Java_frame();
2186 mov(L7, G2_thread);
2188 // move OSR nmethod to I1
2189 mov(L6, I1);
2191 // OSR buffer to I0
2192 mov(O0, I0);
2194 // remove the interpreter frame
2195 restore(I5_savedSP, 0, SP);
2197 // Jump to the osr code.
2198 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2199 jmp(O2, G0);
2200 delayed()->nop();
2202 bind(overflow_with_error);
2204 bind(did_not_overflow);
2205 }
2209 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2210 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2211 }
2214 // local helper function for the verify_oop_or_return_address macro
2215 static bool verify_return_address(methodOopDesc* m, int bci) {
2216 #ifndef PRODUCT
2217 address pc = (address)(m->constMethod())
2218 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2219 // assume it is a valid return address if it is inside m and is preceded by a jsr
2220 if (!m->contains(pc)) return false;
2221 address jsr_pc;
2222 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2223 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2224 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2225 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2226 #endif // PRODUCT
2227 return false;
2228 }
2231 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2232 if (!VerifyOops) return;
2233 // the VM documentation for the astore[_wide] bytecode allows
2234 // the TOS to be not only an oop but also a return address
2235 Label test;
2236 Label skip;
2237 // See if it is an address (in the current method):
2239 mov(reg, Rtmp);
2240 const int log2_bytecode_size_limit = 16;
2241 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2242 br_notnull_short( Rtmp, pt, test );
2244 // %%% should use call_VM_leaf here?
2245 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2246 save_thread(L7_thread_cache);
2247 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2248 delayed()->nop();
2249 restore_thread(L7_thread_cache);
2250 br_notnull( O0, false, pt, skip );
2251 delayed()->restore();
2253 // Perform a more elaborate out-of-line call
2254 // Not an address; verify it:
2255 bind(test);
2256 verify_oop(reg);
2257 bind(skip);
2258 }
2261 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2262 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2263 }
2264 #endif /* CC_INTERP */
2266 // Inline assembly for:
2267 //
2268 // if (thread is in interp_only_mode) {
2269 // InterpreterRuntime::post_method_entry();
2270 // }
2271 // if (DTraceMethodProbes) {
2272 // SharedRuntime::dtrace_method_entry(method, receiver);
2273 // }
2274 // if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2275 // SharedRuntime::rc_trace_method_entry(method, receiver);
2276 // }
2278 void InterpreterMacroAssembler::notify_method_entry() {
2280 // C++ interpreter only uses this for native methods.
2282 // Whenever JVMTI puts a thread in interp_only_mode, method
2283 // entry/exit events are sent for that thread to track stack
2284 // depth. If it is possible to enter interp_only_mode we add
2285 // the code to check if the event should be sent.
2286 if (JvmtiExport::can_post_interpreter_events()) {
2287 Label L;
2288 Register temp_reg = O5;
2289 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2290 ld(interp_only, temp_reg);
2291 cmp_and_br_short(temp_reg, 0, equal, pt, L);
2292 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2293 bind(L);
2294 }
2296 {
2297 Register temp_reg = O5;
2298 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2299 call_VM_leaf(noreg,
2300 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2301 G2_thread, Lmethod);
2302 }
2304 // RedefineClasses() tracing support for obsolete method entry
2305 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2306 call_VM_leaf(noreg,
2307 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2308 G2_thread, Lmethod);
2309 }
2310 }
2313 // Inline assembly for:
2314 //
2315 // if (thread is in interp_only_mode) {
2316 // // save result
2317 // InterpreterRuntime::post_method_exit();
2318 // // restore result
2319 // }
2320 // if (DTraceMethodProbes) {
2321 // SharedRuntime::dtrace_method_exit(thread, method);
2322 // }
2323 //
2324 // Native methods have their result stored in d_tmp and l_tmp
2325 // Java methods have their result stored in the expression stack
2327 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2328 TosState state,
2329 NotifyMethodExitMode mode) {
2330 // C++ interpreter only uses this for native methods.
2332 // Whenever JVMTI puts a thread in interp_only_mode, method
2333 // entry/exit events are sent for that thread to track stack
2334 // depth. If it is possible to enter interp_only_mode we add
2335 // the code to check if the event should be sent.
2336 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2337 Label L;
2338 Register temp_reg = O5;
2339 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2340 ld(interp_only, temp_reg);
2341 cmp_and_br_short(temp_reg, 0, equal, pt, L);
2343 // Note: frame::interpreter_frame_result has a dependency on how the
2344 // method result is saved across the call to post_method_exit. For
2345 // native methods it assumes the result registers are saved to
2346 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2347 // implementation will need to be updated too.
2349 save_return_value(state, is_native_method);
2350 call_VM(noreg,
2351 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2352 restore_return_value(state, is_native_method);
2353 bind(L);
2354 }
2356 {
2357 Register temp_reg = O5;
2358 // Dtrace notification
2359 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2360 save_return_value(state, is_native_method);
2361 call_VM_leaf(
2362 noreg,
2363 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2364 G2_thread, Lmethod);
2365 restore_return_value(state, is_native_method);
2366 }
2367 }
2369 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2370 #ifdef CC_INTERP
2371 // result potentially in O0/O1: save it across calls
2372 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2373 #ifdef _LP64
2374 stx(O0, STATE(_native_lresult));
2375 #else
2376 std(O0, STATE(_native_lresult));
2377 #endif
2378 #else // CC_INTERP
2379 if (is_native_call) {
2380 stf(FloatRegisterImpl::D, F0, d_tmp);
2381 #ifdef _LP64
2382 stx(O0, l_tmp);
2383 #else
2384 std(O0, l_tmp);
2385 #endif
2386 } else {
2387 push(state);
2388 }
2389 #endif // CC_INTERP
2390 }
2392 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2393 #ifdef CC_INTERP
2394 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2395 #ifdef _LP64
2396 ldx(STATE(_native_lresult), O0);
2397 #else
2398 ldd(STATE(_native_lresult), O0);
2399 #endif
2400 #else // CC_INTERP
2401 if (is_native_call) {
2402 ldf(FloatRegisterImpl::D, d_tmp, F0);
2403 #ifdef _LP64
2404 ldx(l_tmp, O0);
2405 #else
2406 ldd(l_tmp, O0);
2407 #endif
2408 } else {
2409 pop(state);
2410 }
2411 #endif // CC_INTERP
2412 }
2414 // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
2415 void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
2416 int increment, int mask,
2417 Register scratch1, Register scratch2,
2418 Condition cond, Label *where) {
2419 ld(counter_addr, scratch1);
2420 add(scratch1, increment, scratch1);
2421 if (is_simm13(mask)) {
2422 andcc(scratch1, mask, G0);
2423 } else {
2424 set(mask, scratch2);
2425 andcc(scratch1, scratch2, G0);
2426 }
2427 br(cond, false, Assembler::pn, *where);
2428 delayed()->st(scratch1, counter_addr);
2429 }