Thu, 01 Aug 2013 17:25:10 -0700
Merge
1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
26 #define SHARE_VM_OPTO_CHAITIN_HPP
28 #include "code/vmreg.hpp"
29 #include "libadt/port.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "opto/connode.hpp"
32 #include "opto/live.hpp"
33 #include "opto/matcher.hpp"
34 #include "opto/phase.hpp"
35 #include "opto/regalloc.hpp"
36 #include "opto/regmask.hpp"
38 class LoopTree;
39 class MachCallNode;
40 class MachSafePointNode;
41 class Matcher;
42 class PhaseCFG;
43 class PhaseLive;
44 class PhaseRegAlloc;
45 class PhaseChaitin;
47 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)
48 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)
50 //------------------------------LRG--------------------------------------------
51 // Live-RanGe structure.
52 class LRG : public ResourceObj {
53 friend class VMStructs;
54 public:
55 enum { SPILL_REG=29999 }; // Register number of a spilled LRG
57 double _cost; // 2 for loads/1 for stores times block freq
58 double _area; // Sum of all simultaneously live values
59 double score() const; // Compute score from cost and area
60 double _maxfreq; // Maximum frequency of any def or use
62 Node *_def; // Check for multi-def live ranges
63 #ifndef PRODUCT
64 GrowableArray<Node*>* _defs;
65 #endif
67 uint _risk_bias; // Index of LRG which we want to avoid color
68 uint _copy_bias; // Index of LRG which we want to share color
70 uint _next; // Index of next LRG in linked list
71 uint _prev; // Index of prev LRG in linked list
72 private:
73 uint _reg; // Chosen register; undefined if mask is plural
74 public:
75 // Return chosen register for this LRG. Error if the LRG is not bound to
76 // a single register.
77 OptoReg::Name reg() const { return OptoReg::Name(_reg); }
78 void set_reg( OptoReg::Name r ) { _reg = r; }
80 private:
81 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs
82 public:
83 int degree() const { assert( _degree_valid, "" ); return _eff_degree; }
84 // Degree starts not valid and any change to the IFG neighbor
85 // set makes it not valid.
86 void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }
87 // Made a change that hammered degree
88 void invalid_degree() { debug_only(_degree_valid=0;) }
89 // Incrementally modify degree. If it was correct, it should remain correct
90 void inc_degree( uint mod ) { _eff_degree += mod; }
91 // Compute the degree between 2 live ranges
92 int compute_degree( LRG &l ) const;
94 private:
95 RegMask _mask; // Allowed registers for this LRG
96 uint _mask_size; // cache of _mask.Size();
97 public:
98 int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); }
99 void set_mask_size( int size ) {
100 assert((size == 65535) || (size == (int)_mask.Size()), "");
101 _mask_size = size;
102 #ifdef ASSERT
103 _msize_valid=1;
104 if (_is_vector) {
105 assert(!_fat_proj, "sanity");
106 _mask.verify_sets(_num_regs);
107 } else if (_num_regs == 2 && !_fat_proj) {
108 _mask.verify_pairs();
109 }
110 #endif
111 }
112 void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
113 int mask_size() const { assert( _msize_valid, "mask size not valid" );
114 return _mask_size; }
115 // Get the last mask size computed, even if it does not match the
116 // count of bits in the current mask.
117 int get_invalid_mask_size() const { return _mask_size; }
118 const RegMask &mask() const { return _mask; }
119 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
120 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
121 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
122 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }
123 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
124 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }
125 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }
126 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
127 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
129 // Number of registers this live range uses when it colors
130 private:
131 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else
132 // except _num_regs is kill count for fat_proj
133 public:
134 int num_regs() const { return _num_regs; }
135 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
137 private:
138 // Number of physical registers this live range uses when it colors
139 // Architecture and register-set dependent
140 uint8 _reg_pressure;
141 public:
142 void set_reg_pressure(int i) { _reg_pressure = i; }
143 int reg_pressure() const { return _reg_pressure; }
145 // How much 'wiggle room' does this live range have?
146 // How many color choices can it make (scaled by _num_regs)?
147 int degrees_of_freedom() const { return mask_size() - _num_regs; }
148 // Bound LRGs have ZERO degrees of freedom. We also count
149 // must_spill as bound.
150 bool is_bound () const { return _is_bound; }
151 // Negative degrees-of-freedom; even with no neighbors this
152 // live range must spill.
153 bool not_free() const { return degrees_of_freedom() < 0; }
154 // Is this live range of "low-degree"? Trivially colorable?
155 bool lo_degree () const { return degree() <= degrees_of_freedom(); }
156 // Is this live range just barely "low-degree"? Trivially colorable?
157 bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
159 uint _is_oop:1, // Live-range holds an oop
160 _is_float:1, // True if in float registers
161 _is_vector:1, // True if in vector registers
162 _was_spilled1:1, // True if prior spilling on def
163 _was_spilled2:1, // True if twice prior spilling on def
164 _is_bound:1, // live range starts life with no
165 // degrees of freedom.
166 _direct_conflict:1, // True if def and use registers in conflict
167 _must_spill:1, // live range has lost all degrees of freedom
168 // If _fat_proj is set, live range does NOT require aligned, adjacent
169 // registers and has NO interferences.
170 // If _fat_proj is clear, live range requires num_regs() to be a power of
171 // 2, and it requires registers to form an aligned, adjacent set.
172 _fat_proj:1, //
173 _was_lo:1, // Was lo-degree prior to coalesce
174 _msize_valid:1, // _mask_size cache valid
175 _degree_valid:1, // _degree cache valid
176 _has_copy:1, // Adjacent to some copy instruction
177 _at_risk:1; // Simplify says this guy is at risk to spill
180 // Alive if non-zero, dead if zero
181 bool alive() const { return _def != NULL; }
182 bool is_multidef() const { return _def == NodeSentinel; }
183 bool is_singledef() const { return _def != NodeSentinel; }
185 #ifndef PRODUCT
186 void dump( ) const;
187 #endif
188 };
190 //------------------------------IFG--------------------------------------------
191 // InterFerence Graph
192 // An undirected graph implementation. Created with a fixed number of
193 // vertices. Edges can be added & tested. Vertices can be removed, then
194 // added back later with all edges intact. Can add edges between one vertex
195 // and a list of other vertices. Can union vertices (and their edges)
196 // together. The IFG needs to be really really fast, and also fairly
197 // abstract! It needs abstraction so I can fiddle with the implementation to
198 // get even more speed.
199 class PhaseIFG : public Phase {
200 friend class VMStructs;
201 // Current implementation: a triangular adjacency list.
203 // Array of adjacency-lists, indexed by live-range number
204 IndexSet *_adjs;
206 // Assertion bit for proper use of Squaring
207 bool _is_square;
209 // Live range structure goes here
210 LRG *_lrgs; // Array of LRG structures
212 public:
213 // Largest live-range number
214 uint _maxlrg;
216 Arena *_arena;
218 // Keep track of inserted and deleted Nodes
219 VectorSet *_yanked;
221 PhaseIFG( Arena *arena );
222 void init( uint maxlrg );
224 // Add edge between a and b. Returns true if actually addded.
225 int add_edge( uint a, uint b );
227 // Add edge between a and everything in the vector
228 void add_vector( uint a, IndexSet *vec );
230 // Test for edge existance
231 int test_edge( uint a, uint b ) const;
233 // Square-up matrix for faster Union
234 void SquareUp();
236 // Return number of LRG neighbors
237 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
238 // Union edges of b into a on Squared-up matrix
239 void Union( uint a, uint b );
240 // Test for edge in Squared-up matrix
241 int test_edge_sq( uint a, uint b ) const;
242 // Yank a Node and all connected edges from the IFG. Be prepared to
243 // re-insert the yanked Node in reverse order of yanking. Return a
244 // list of neighbors (edges) yanked.
245 IndexSet *remove_node( uint a );
246 // Reinsert a yanked Node
247 void re_insert( uint a );
248 // Return set of neighbors
249 IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
251 #ifndef PRODUCT
252 // Dump the IFG
253 void dump() const;
254 void stats() const;
255 void verify( const PhaseChaitin * ) const;
256 #endif
258 //--------------- Live Range Accessors
259 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
261 // Compute and set effective degree. Might be folded into SquareUp().
262 void Compute_Effective_Degree();
264 // Compute effective degree as the sum of neighbors' _sizes.
265 int effective_degree( uint lidx ) const;
266 };
268 // The LiveRangeMap class is responsible for storing node to live range id mapping.
269 // Each node is mapped to a live range id (a virtual register). Nodes that are
270 // not considered for register allocation are given live range id 0.
271 class LiveRangeMap VALUE_OBJ_CLASS_SPEC {
273 private:
275 uint _max_lrg_id;
277 // Union-find map. Declared as a short for speed.
278 // Indexed by live-range number, it returns the compacted live-range number
279 LRG_List _uf_map;
281 // Map from Nodes to live ranges
282 LRG_List _names;
284 // Straight out of Tarjan's union-find algorithm
285 uint find_compress(const Node *node) {
286 uint lrg_id = find_compress(_names[node->_idx]);
287 _names.map(node->_idx, lrg_id);
288 return lrg_id;
289 }
291 uint find_compress(uint lrg);
293 public:
295 const LRG_List& names() {
296 return _names;
297 }
299 uint max_lrg_id() const {
300 return _max_lrg_id;
301 }
303 void set_max_lrg_id(uint max_lrg_id) {
304 _max_lrg_id = max_lrg_id;
305 }
307 uint size() const {
308 return _names.Size();
309 }
311 uint live_range_id(uint idx) const {
312 return _names[idx];
313 }
315 uint live_range_id(const Node *node) const {
316 return _names[node->_idx];
317 }
319 uint uf_live_range_id(uint lrg_id) const {
320 return _uf_map[lrg_id];
321 }
323 void map(uint idx, uint lrg_id) {
324 _names.map(idx, lrg_id);
325 }
327 void uf_map(uint dst_lrg_id, uint src_lrg_id) {
328 _uf_map.map(dst_lrg_id, src_lrg_id);
329 }
331 void extend(uint idx, uint lrg_id) {
332 _names.extend(idx, lrg_id);
333 }
335 void uf_extend(uint dst_lrg_id, uint src_lrg_id) {
336 _uf_map.extend(dst_lrg_id, src_lrg_id);
337 }
339 LiveRangeMap(uint unique)
340 : _names(unique)
341 , _uf_map(unique)
342 , _max_lrg_id(0) {}
344 uint find_id( const Node *n ) {
345 uint retval = live_range_id(n);
346 assert(retval == find(n),"Invalid node to lidx mapping");
347 return retval;
348 }
350 // Reset the Union-Find map to identity
351 void reset_uf_map(uint max_lrg_id);
353 // Make all Nodes map directly to their final live range; no need for
354 // the Union-Find mapping after this call.
355 void compress_uf_map_for_nodes();
357 uint find(uint lidx) {
358 uint uf_lidx = _uf_map[lidx];
359 return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx);
360 }
362 // Convert a Node into a Live Range Index - a lidx
363 uint find(const Node *node) {
364 uint lidx = live_range_id(node);
365 uint uf_lidx = _uf_map[lidx];
366 return (uf_lidx == lidx) ? uf_lidx : find_compress(node);
367 }
369 // Like Find above, but no path compress, so bad asymptotic behavior
370 uint find_const(uint lrg) const;
372 // Like Find above, but no path compress, so bad asymptotic behavior
373 uint find_const(const Node *node) const {
374 if(node->_idx >= _names.Size()) {
375 return 0; // not mapped, usual for debug dump
376 }
377 return find_const(_names[node->_idx]);
378 }
379 };
381 //------------------------------Chaitin----------------------------------------
382 // Briggs-Chaitin style allocation, mostly.
383 class PhaseChaitin : public PhaseRegAlloc {
384 friend class VMStructs;
386 int _trip_cnt;
387 int _alternate;
389 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
390 PhaseLive *_live; // Liveness, used in the interference graph
391 PhaseIFG *_ifg; // Interference graph (for original chunk)
392 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill
393 VectorSet _spilled_once; // Nodes that have been spilled
394 VectorSet _spilled_twice; // Nodes that have been spilled twice
396 // Combine the Live Range Indices for these 2 Nodes into a single live
397 // range. Future requests for any Node in either live range will
398 // return the live range index for the combined live range.
399 void Union( const Node *src, const Node *dst );
401 void new_lrg( const Node *x, uint lrg );
403 // Compact live ranges, removing unused ones. Return new maxlrg.
404 void compact();
406 uint _lo_degree; // Head of lo-degree LRGs list
407 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list
408 uint _hi_degree; // Head of hi-degree LRGs list
409 uint _simplified; // Linked list head of simplified LRGs
411 // Helper functions for Split()
412 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
413 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
415 bool clone_projs(Block *b, uint idx, Node *con, Node *copy, LiveRangeMap &lrg_map) {
416 bool found_projs = clone_projs_shared(b, idx, con, copy, lrg_map.max_lrg_id());
418 if(found_projs) {
419 uint max_lrg_id = lrg_map.max_lrg_id();
420 lrg_map.set_max_lrg_id(max_lrg_id + 1);
421 }
423 return found_projs;
424 }
426 //------------------------------clone_projs------------------------------------
427 // After cloning some rematerialized instruction, clone any MachProj's that
428 // follow it. Example: Intel zero is XOR, kills flags. Sparc FP constants
429 // use G3 as an address temp.
430 bool clone_projs(Block *b, uint idx, Node *con, Node *copy, uint &max_lrg_id) {
431 bool found_projs = clone_projs_shared(b, idx, con, copy, max_lrg_id);
433 if(found_projs) {
434 max_lrg_id++;
435 }
437 return found_projs;
438 }
440 bool clone_projs_shared(Block *b, uint idx, Node *con, Node *copy, uint max_lrg_id);
442 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
443 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
444 // True if lidx is used before any real register is def'd in the block
445 bool prompt_use( Block *b, uint lidx );
446 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );
447 // Insert the spill at chosen location. Skip over any intervening Proj's or
448 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block
449 // instead. Update high-pressure indices. Create a new live range.
450 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
452 bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
454 uint _oldphi; // Node index which separates pre-allocation nodes
456 Block **_blks; // Array of blocks sorted by frequency for coalescing
458 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
460 #ifndef PRODUCT
461 bool _trace_spilling;
462 #endif
464 public:
465 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
466 ~PhaseChaitin() {}
468 LiveRangeMap _lrg_map;
470 // Do all the real work of allocate
471 void Register_Allocate();
473 float high_frequency_lrg() const { return _high_frequency_lrg; }
475 #ifndef PRODUCT
476 bool trace_spilling() const { return _trace_spilling; }
477 #endif
479 private:
480 // De-SSA the world. Assign registers to Nodes. Use the same register for
481 // all inputs to a PhiNode, effectively coalescing live ranges. Insert
482 // copies as needed.
483 void de_ssa();
485 // Add edge between reg and everything in the vector.
486 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
487 // information to trim the set of interferences. Return the
488 // count of edges added.
489 void interfere_with_live( uint reg, IndexSet *live );
490 // Count register pressure for asserts
491 uint count_int_pressure( IndexSet *liveout );
492 uint count_float_pressure( IndexSet *liveout );
494 // Build the interference graph using virtual registers only.
495 // Used for aggressive coalescing.
496 void build_ifg_virtual( );
498 // Build the interference graph using physical registers when available.
499 // That is, if 2 live ranges are simultaneously alive but in their
500 // acceptable register sets do not overlap, then they do not interfere.
501 uint build_ifg_physical( ResourceArea *a );
503 // Gather LiveRanGe information, including register masks and base pointer/
504 // derived pointer relationships.
505 void gather_lrg_masks( bool mod_cisc_masks );
507 // Force the bases of derived pointers to be alive at GC points.
508 bool stretch_base_pointer_live_ranges( ResourceArea *a );
509 // Helper to stretch above; recursively discover the base Node for
510 // a given derived Node. Easy for AddP-related machine nodes, but
511 // needs to be recursive for derived Phis.
512 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
514 // Set the was-lo-degree bit. Conservative coalescing should not change the
515 // colorability of the graph. If any live range was of low-degree before
516 // coalescing, it should Simplify. This call sets the was-lo-degree bit.
517 void set_was_low();
519 // Split live-ranges that must spill due to register conflicts (as opposed
520 // to capacity spills). Typically these are things def'd in a register
521 // and used on the stack or vice-versa.
522 void pre_spill();
524 // Init LRG caching of degree, numregs. Init lo_degree list.
525 void cache_lrg_info( );
527 // Simplify the IFG by removing LRGs of low degree with no copies
528 void Pre_Simplify();
530 // Simplify the IFG by removing LRGs of low degree
531 void Simplify();
533 // Select colors by re-inserting edges into the IFG.
534 // Return TRUE if any spills occurred.
535 uint Select( );
536 // Helper function for select which allows biased coloring
537 OptoReg::Name choose_color( LRG &lrg, int chunk );
538 // Helper function which implements biasing heuristic
539 OptoReg::Name bias_color( LRG &lrg, int chunk );
541 // Split uncolorable live ranges
542 // Return new number of live ranges
543 uint Split(uint maxlrg, ResourceArea* split_arena);
545 // Copy 'was_spilled'-edness from one Node to another.
546 void copy_was_spilled( Node *src, Node *dst );
547 // Set the 'spilled_once' or 'spilled_twice' flag on a node.
548 void set_was_spilled( Node *n );
550 // Convert ideal spill-nodes into machine loads & stores
551 // Set C->failing when fixup spills could not complete, node limit exceeded.
552 void fixup_spills();
554 // Post-Allocation peephole copy removal
555 void post_allocate_copy_removal();
556 Node *skip_copies( Node *c );
557 // Replace the old node with the current live version of that value
558 // and yank the old value if it's dead.
559 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
560 Block *current_block, Node_List& value, Node_List& regnd ) {
561 Node* v = regnd[nreg];
562 assert(v->outcnt() != 0, "no dead values");
563 old->replace_by(v);
564 return yank_if_dead(old, current_block, &value, ®nd);
565 }
567 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
568 return yank_if_dead_recurse(old, old, current_block, value, regnd);
569 }
570 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
571 Node_List *value, Node_List *regnd);
572 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
573 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs );
574 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd );
575 bool may_be_copy_of_callee( Node *def ) const;
577 // If nreg already contains the same constant as val then eliminate it
578 bool eliminate_copy_of_constant(Node* val, Node* n,
579 Block *current_block, Node_List& value, Node_List ®nd,
580 OptoReg::Name nreg, OptoReg::Name nreg2);
581 // Extend the node to LRG mapping
582 void add_reference( const Node *node, const Node *old_node);
584 private:
586 static int _final_loads, _final_stores, _final_copies, _final_memoves;
587 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
588 static int _conserv_coalesce, _conserv_coalesce_pair;
589 static int _conserv_coalesce_trie, _conserv_coalesce_quad;
590 static int _post_alloc;
591 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
592 static int _used_cisc_instructions, _unused_cisc_instructions;
593 static int _allocator_attempts, _allocator_successes;
595 #ifndef PRODUCT
596 static uint _high_pressure, _low_pressure;
598 void dump() const;
599 void dump( const Node *n ) const;
600 void dump( const Block * b ) const;
601 void dump_degree_lists() const;
602 void dump_simplified() const;
603 void dump_lrg( uint lidx, bool defs_only) const;
604 void dump_lrg( uint lidx) const {
605 // dump defs and uses by default
606 dump_lrg(lidx, false);
607 }
608 void dump_bb( uint pre_order ) const;
610 // Verify that base pointers and derived pointers are still sane
611 void verify_base_ptrs( ResourceArea *a ) const;
613 void verify( ResourceArea *a, bool verify_ifg = false ) const;
615 void dump_for_spill_split_recycle() const;
617 public:
618 void dump_frame() const;
619 char *dump_register( const Node *n, char *buf ) const;
620 private:
621 static void print_chaitin_statistics();
622 #endif
623 friend class PhaseCoalesce;
624 friend class PhaseAggressiveCoalesce;
625 friend class PhaseConservativeCoalesce;
626 };
628 #endif // SHARE_VM_OPTO_CHAITIN_HPP