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src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp@87fc6aca31ab
src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp
Thu, 27 May 2010 22:01:55 -0700
- author
- iveresov
- date
- Thu, 27 May 2010 22:01:55 -0700
- changeset 1927
- 87fc6aca31ab
- parent 1495
- 323bd24c6520
- child 1934
- e9ff18c4ace7
- permissions
- -rw-r--r--
6955349: C1: Make G1 barriers work with x64
Summary: This fixes G1 barriers in c1 on x64.
Reviewed-by: never
1 /*
2 * Copyright 2005-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
25 # include "incls/_precompiled.incl"
26 # include "incls/_c1_LIRGenerator_sparc.cpp.incl"
28 #ifdef ASSERT
29 #define __ gen()->lir(__FILE__, __LINE__)->
30 #else
31 #define __ gen()->lir()->
32 #endif
34 void LIRItem::load_byte_item() {
35 // byte loads use same registers as other loads
36 load_item();
37 }
40 void LIRItem::load_nonconstant() {
41 LIR_Opr r = value()->operand();
42 if (_gen->can_inline_as_constant(value())) {
43 if (!r->is_constant()) {
44 r = LIR_OprFact::value_type(value()->type());
45 }
46 _result = r;
47 } else {
48 load_item();
49 }
50 }
53 //--------------------------------------------------------------
54 // LIRGenerator
55 //--------------------------------------------------------------
57 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
58 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
59 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
60 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); }
62 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
63 LIR_Opr opr;
64 switch (type->tag()) {
65 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
66 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
67 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
68 case floatTag: opr = FrameMap::F0_opr; break;
69 case doubleTag: opr = FrameMap::F0_double_opr; break;
71 case addressTag:
72 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
73 }
75 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
76 return opr;
77 }
79 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
80 LIR_Opr reg = new_register(type);
81 set_vreg_flag(reg, callee_saved);
82 return reg;
83 }
86 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
87 return new_register(T_INT);
88 }
94 //--------- loading items into registers --------------------------------
96 // SPARC cannot inline all constants
97 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
98 if (v->type()->as_IntConstant() != NULL) {
99 return v->type()->as_IntConstant()->value() == 0;
100 } else if (v->type()->as_LongConstant() != NULL) {
101 return v->type()->as_LongConstant()->value() == 0L;
102 } else if (v->type()->as_ObjectConstant() != NULL) {
103 return v->type()->as_ObjectConstant()->value()->is_null_object();
104 } else {
105 return false;
106 }
107 }
110 // only simm13 constants can be inlined
111 bool LIRGenerator:: can_inline_as_constant(Value i) const {
112 if (i->type()->as_IntConstant() != NULL) {
113 return Assembler::is_simm13(i->type()->as_IntConstant()->value());
114 } else {
115 return can_store_as_constant(i, as_BasicType(i->type()));
116 }
117 }
120 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
121 if (c->type() == T_INT) {
122 return Assembler::is_simm13(c->as_jint());
123 }
124 return false;
125 }
128 LIR_Opr LIRGenerator::safepoint_poll_register() {
129 return new_register(T_INT);
130 }
134 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
135 int shift, int disp, BasicType type) {
136 assert(base->is_register(), "must be");
138 // accumulate fixed displacements
139 if (index->is_constant()) {
140 disp += index->as_constant_ptr()->as_jint() << shift;
141 index = LIR_OprFact::illegalOpr;
142 }
144 if (index->is_register()) {
145 // apply the shift and accumulate the displacement
146 if (shift > 0) {
147 LIR_Opr tmp = new_pointer_register();
148 __ shift_left(index, shift, tmp);
149 index = tmp;
150 }
151 if (disp != 0) {
152 LIR_Opr tmp = new_pointer_register();
153 if (Assembler::is_simm13(disp)) {
154 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
155 index = tmp;
156 } else {
157 __ move(LIR_OprFact::intptrConst(disp), tmp);
158 __ add(tmp, index, tmp);
159 index = tmp;
160 }
161 disp = 0;
162 }
163 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
164 // index is illegal so replace it with the displacement loaded into a register
165 index = new_pointer_register();
166 __ move(LIR_OprFact::intptrConst(disp), index);
167 disp = 0;
168 }
170 // at this point we either have base + index or base + displacement
171 if (disp == 0) {
172 return new LIR_Address(base, index, type);
173 } else {
174 assert(Assembler::is_simm13(disp), "must be");
175 return new LIR_Address(base, disp, type);
176 }
177 }
180 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
181 BasicType type, bool needs_card_mark) {
182 int elem_size = type2aelembytes(type);
183 int shift = exact_log2(elem_size);
185 LIR_Opr base_opr;
186 int offset = arrayOopDesc::base_offset_in_bytes(type);
188 if (index_opr->is_constant()) {
189 int i = index_opr->as_constant_ptr()->as_jint();
190 int array_offset = i * elem_size;
191 if (Assembler::is_simm13(array_offset + offset)) {
192 base_opr = array_opr;
193 offset = array_offset + offset;
194 } else {
195 base_opr = new_pointer_register();
196 if (Assembler::is_simm13(array_offset)) {
197 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
198 } else {
199 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
200 __ add(base_opr, array_opr, base_opr);
201 }
202 }
203 } else {
204 #ifdef _LP64
205 if (index_opr->type() == T_INT) {
206 LIR_Opr tmp = new_register(T_LONG);
207 __ convert(Bytecodes::_i2l, index_opr, tmp);
208 index_opr = tmp;
209 }
210 #endif
212 base_opr = new_pointer_register();
213 assert (index_opr->is_register(), "Must be register");
214 if (shift > 0) {
215 __ shift_left(index_opr, shift, base_opr);
216 __ add(base_opr, array_opr, base_opr);
217 } else {
218 __ add(index_opr, array_opr, base_opr);
219 }
220 }
221 if (needs_card_mark) {
222 LIR_Opr ptr = new_pointer_register();
223 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
224 return new LIR_Address(ptr, type);
225 } else {
226 return new LIR_Address(base_opr, offset, type);
227 }
228 }
231 void LIRGenerator::increment_counter(address counter, int step) {
232 LIR_Opr pointer = new_pointer_register();
233 __ move(LIR_OprFact::intptrConst(counter), pointer);
234 LIR_Address* addr = new LIR_Address(pointer, T_INT);
235 increment_counter(addr, step);
236 }
238 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
239 LIR_Opr temp = new_register(T_INT);
240 __ move(addr, temp);
241 LIR_Opr c = LIR_OprFact::intConst(step);
242 if (Assembler::is_simm13(step)) {
243 __ add(temp, c, temp);
244 } else {
245 LIR_Opr temp2 = new_register(T_INT);
246 __ move(c, temp2);
247 __ add(temp, temp2, temp);
248 }
249 __ move(temp, addr);
250 }
253 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
254 LIR_Opr o7opr = FrameMap::O7_opr;
255 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
256 __ cmp(condition, o7opr, c);
257 }
260 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
261 LIR_Opr o7opr = FrameMap::O7_opr;
262 __ load(new LIR_Address(base, disp, type), o7opr, info);
263 __ cmp(condition, reg, o7opr);
264 }
267 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
268 LIR_Opr o7opr = FrameMap::O7_opr;
269 __ load(new LIR_Address(base, disp, type), o7opr, info);
270 __ cmp(condition, reg, o7opr);
271 }
274 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
275 assert(left != result, "should be different registers");
276 if (is_power_of_2(c + 1)) {
277 __ shift_left(left, log2_intptr(c + 1), result);
278 __ sub(result, left, result);
279 return true;
280 } else if (is_power_of_2(c - 1)) {
281 __ shift_left(left, log2_intptr(c - 1), result);
282 __ add(result, left, result);
283 return true;
284 }
285 return false;
286 }
289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
290 BasicType t = item->type();
291 LIR_Opr sp_opr = FrameMap::SP_opr;
292 if ((t == T_LONG || t == T_DOUBLE) &&
293 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
294 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
295 } else {
296 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
297 }
298 }
300 //----------------------------------------------------------------------
301 // visitor functions
302 //----------------------------------------------------------------------
305 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
306 assert(x->is_root(),"");
307 bool needs_range_check = true;
308 bool use_length = x->length() != NULL;
309 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
310 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
311 !get_jobject_constant(x->value())->is_null_object());
313 LIRItem array(x->array(), this);
314 LIRItem index(x->index(), this);
315 LIRItem value(x->value(), this);
316 LIRItem length(this);
318 array.load_item();
319 index.load_nonconstant();
321 if (use_length) {
322 needs_range_check = x->compute_needs_range_check();
323 if (needs_range_check) {
324 length.set_instruction(x->length());
325 length.load_item();
326 }
327 }
328 if (needs_store_check) {
329 value.load_item();
330 } else {
331 value.load_for_store(x->elt_type());
332 }
334 set_no_result(x);
336 // the CodeEmitInfo must be duplicated for each different
337 // LIR-instruction because spilling can occur anywhere between two
338 // instructions and so the debug information must be different
339 CodeEmitInfo* range_check_info = state_for(x);
340 CodeEmitInfo* null_check_info = NULL;
341 if (x->needs_null_check()) {
342 null_check_info = new CodeEmitInfo(range_check_info);
343 }
345 // emit array address setup early so it schedules better
346 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
348 if (GenerateRangeChecks && needs_range_check) {
349 if (use_length) {
350 __ cmp(lir_cond_belowEqual, length.result(), index.result());
351 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
352 } else {
353 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
354 // range_check also does the null check
355 null_check_info = NULL;
356 }
357 }
359 if (GenerateArrayStoreCheck && needs_store_check) {
360 LIR_Opr tmp1 = FrameMap::G1_opr;
361 LIR_Opr tmp2 = FrameMap::G3_opr;
362 LIR_Opr tmp3 = FrameMap::G5_opr;
364 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
365 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
366 }
368 if (obj_store) {
369 // Needs GC write barriers.
370 pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
371 }
372 __ move(value.result(), array_addr, null_check_info);
373 if (obj_store) {
374 // Precise card mark
375 post_barrier(LIR_OprFact::address(array_addr), value.result());
376 }
377 }
380 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
381 assert(x->is_root(),"");
382 LIRItem obj(x->obj(), this);
383 obj.load_item();
385 set_no_result(x);
387 LIR_Opr lock = FrameMap::G1_opr;
388 LIR_Opr scratch = FrameMap::G3_opr;
389 LIR_Opr hdr = FrameMap::G4_opr;
391 CodeEmitInfo* info_for_exception = NULL;
392 if (x->needs_null_check()) {
393 info_for_exception = state_for(x, x->lock_stack_before());
394 }
396 // this CodeEmitInfo must not have the xhandlers because here the
397 // object is already locked (xhandlers expects object to be unlocked)
398 CodeEmitInfo* info = state_for(x, x->state(), true);
399 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
400 }
403 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
404 assert(x->is_root(),"");
405 LIRItem obj(x->obj(), this);
406 obj.dont_load_item();
408 set_no_result(x);
409 LIR_Opr lock = FrameMap::G1_opr;
410 LIR_Opr hdr = FrameMap::G3_opr;
411 LIR_Opr obj_temp = FrameMap::G4_opr;
412 monitor_exit(obj_temp, lock, hdr, x->monitor_no());
413 }
416 // _ineg, _lneg, _fneg, _dneg
417 void LIRGenerator::do_NegateOp(NegateOp* x) {
418 LIRItem value(x->x(), this);
419 value.load_item();
420 LIR_Opr reg = rlock_result(x);
421 __ negate(value.result(), reg);
422 }
426 // for _fadd, _fmul, _fsub, _fdiv, _frem
427 // _dadd, _dmul, _dsub, _ddiv, _drem
428 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
429 switch (x->op()) {
430 case Bytecodes::_fadd:
431 case Bytecodes::_fmul:
432 case Bytecodes::_fsub:
433 case Bytecodes::_fdiv:
434 case Bytecodes::_dadd:
435 case Bytecodes::_dmul:
436 case Bytecodes::_dsub:
437 case Bytecodes::_ddiv: {
438 LIRItem left(x->x(), this);
439 LIRItem right(x->y(), this);
440 left.load_item();
441 right.load_item();
442 rlock_result(x);
443 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
444 }
445 break;
447 case Bytecodes::_frem:
448 case Bytecodes::_drem: {
449 address entry;
450 switch (x->op()) {
451 case Bytecodes::_frem:
452 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
453 break;
454 case Bytecodes::_drem:
455 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
456 break;
457 default:
458 ShouldNotReachHere();
459 }
460 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
461 set_result(x, result);
462 }
463 break;
465 default: ShouldNotReachHere();
466 }
467 }
470 // for _ladd, _lmul, _lsub, _ldiv, _lrem
471 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
472 switch (x->op()) {
473 case Bytecodes::_lrem:
474 case Bytecodes::_lmul:
475 case Bytecodes::_ldiv: {
477 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
478 LIRItem right(x->y(), this);
479 right.load_item();
481 CodeEmitInfo* info = state_for(x);
482 LIR_Opr item = right.result();
483 assert(item->is_register(), "must be");
484 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
485 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
486 }
488 address entry;
489 switch (x->op()) {
490 case Bytecodes::_lrem:
491 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
492 break; // check if dividend is 0 is done elsewhere
493 case Bytecodes::_ldiv:
494 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
495 break; // check if dividend is 0 is done elsewhere
496 case Bytecodes::_lmul:
497 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
498 break;
499 default:
500 ShouldNotReachHere();
501 }
503 // order of arguments to runtime call is reversed.
504 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
505 set_result(x, result);
506 break;
507 }
508 case Bytecodes::_ladd:
509 case Bytecodes::_lsub: {
510 LIRItem left(x->x(), this);
511 LIRItem right(x->y(), this);
512 left.load_item();
513 right.load_item();
514 rlock_result(x);
516 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
517 break;
518 }
519 default: ShouldNotReachHere();
520 }
521 }
524 // Returns if item is an int constant that can be represented by a simm13
525 static bool is_simm13(LIR_Opr item) {
526 if (item->is_constant() && item->type() == T_INT) {
527 return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
528 } else {
529 return false;
530 }
531 }
534 // for: _iadd, _imul, _isub, _idiv, _irem
535 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
536 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
537 LIRItem left(x->x(), this);
538 LIRItem right(x->y(), this);
539 // missing test if instr is commutative and if we should swap
540 right.load_nonconstant();
541 assert(right.is_constant() || right.is_register(), "wrong state of right");
542 left.load_item();
543 rlock_result(x);
544 if (is_div_rem) {
545 CodeEmitInfo* info = state_for(x);
546 LIR_Opr tmp = FrameMap::G1_opr;
547 if (x->op() == Bytecodes::_irem) {
548 __ irem(left.result(), right.result(), x->operand(), tmp, info);
549 } else if (x->op() == Bytecodes::_idiv) {
550 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
551 }
552 } else {
553 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
554 }
555 }
558 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
559 ValueTag tag = x->type()->tag();
560 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
561 switch (tag) {
562 case floatTag:
563 case doubleTag: do_ArithmeticOp_FPU(x); return;
564 case longTag: do_ArithmeticOp_Long(x); return;
565 case intTag: do_ArithmeticOp_Int(x); return;
566 }
567 ShouldNotReachHere();
568 }
571 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
572 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
573 LIRItem value(x->x(), this);
574 LIRItem count(x->y(), this);
575 // Long shift destroys count register
576 if (value.type()->is_long()) {
577 count.set_destroys_register();
578 }
579 value.load_item();
580 // the old backend doesn't support this
581 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
582 jint c = count.get_jint_constant() & 0x1f;
583 assert(c >= 0 && c < 32, "should be small");
584 count.dont_load_item();
585 } else {
586 count.load_item();
587 }
588 LIR_Opr reg = rlock_result(x);
589 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
590 }
593 // _iand, _land, _ior, _lor, _ixor, _lxor
594 void LIRGenerator::do_LogicOp(LogicOp* x) {
595 LIRItem left(x->x(), this);
596 LIRItem right(x->y(), this);
598 left.load_item();
599 right.load_nonconstant();
600 LIR_Opr reg = rlock_result(x);
602 logic_op(x->op(), reg, left.result(), right.result());
603 }
607 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
608 void LIRGenerator::do_CompareOp(CompareOp* x) {
609 LIRItem left(x->x(), this);
610 LIRItem right(x->y(), this);
611 left.load_item();
612 right.load_item();
613 LIR_Opr reg = rlock_result(x);
615 if (x->x()->type()->is_float_kind()) {
616 Bytecodes::Code code = x->op();
617 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
618 } else if (x->x()->type()->tag() == longTag) {
619 __ lcmp2int(left.result(), right.result(), reg);
620 } else {
621 Unimplemented();
622 }
623 }
626 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
627 assert(x->number_of_arguments() == 3, "wrong type");
628 LIRItem obj (x->argument_at(0), this); // AtomicLong object
629 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
630 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
632 obj.load_item();
633 cmp_value.load_item();
634 new_value.load_item();
636 // generate compare-and-swap and produce zero condition if swap occurs
637 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
638 LIR_Opr addr = FrameMap::O7_opr;
639 __ add(obj.result(), LIR_OprFact::intConst(value_offset), addr);
640 LIR_Opr t1 = FrameMap::G1_opr; // temp for 64-bit value
641 LIR_Opr t2 = FrameMap::G3_opr; // temp for 64-bit value
642 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
644 // generate conditional move of boolean result
645 LIR_Opr result = rlock_result(x);
646 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
647 }
650 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
651 assert(x->number_of_arguments() == 4, "wrong type");
652 LIRItem obj (x->argument_at(0), this); // object
653 LIRItem offset(x->argument_at(1), this); // offset of field
654 LIRItem cmp (x->argument_at(2), this); // value to compare with field
655 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
657 // Use temps to avoid kills
658 LIR_Opr t1 = FrameMap::G1_opr;
659 LIR_Opr t2 = FrameMap::G3_opr;
660 LIR_Opr addr = new_pointer_register();
662 // get address of field
663 obj.load_item();
664 offset.load_item();
665 cmp.load_item();
666 val.load_item();
668 __ add(obj.result(), offset.result(), addr);
670 if (type == objectType) { // Write-barrier needed for Object fields.
671 pre_barrier(addr, false, NULL);
672 }
674 if (type == objectType)
675 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
676 else if (type == intType)
677 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
678 else if (type == longType)
679 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
680 else {
681 ShouldNotReachHere();
682 }
684 // generate conditional move of boolean result
685 LIR_Opr result = rlock_result(x);
686 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
687 if (type == objectType) { // Write-barrier needed for Object fields.
688 // Precise card mark since could either be object or array
689 post_barrier(addr, val.result());
690 }
691 }
694 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
695 switch (x->id()) {
696 case vmIntrinsics::_dabs:
697 case vmIntrinsics::_dsqrt: {
698 assert(x->number_of_arguments() == 1, "wrong type");
699 LIRItem value(x->argument_at(0), this);
700 value.load_item();
701 LIR_Opr dst = rlock_result(x);
703 switch (x->id()) {
704 case vmIntrinsics::_dsqrt: {
705 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
706 break;
707 }
708 case vmIntrinsics::_dabs: {
709 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
710 break;
711 }
712 }
713 break;
714 }
715 case vmIntrinsics::_dlog10: // fall through
716 case vmIntrinsics::_dlog: // fall through
717 case vmIntrinsics::_dsin: // fall through
718 case vmIntrinsics::_dtan: // fall through
719 case vmIntrinsics::_dcos: {
720 assert(x->number_of_arguments() == 1, "wrong type");
722 address runtime_entry = NULL;
723 switch (x->id()) {
724 case vmIntrinsics::_dsin:
725 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
726 break;
727 case vmIntrinsics::_dcos:
728 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
729 break;
730 case vmIntrinsics::_dtan:
731 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
732 break;
733 case vmIntrinsics::_dlog:
734 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
735 break;
736 case vmIntrinsics::_dlog10:
737 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
738 break;
739 default:
740 ShouldNotReachHere();
741 }
743 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
744 set_result(x, result);
745 }
746 }
747 }
750 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
751 assert(x->number_of_arguments() == 5, "wrong type");
753 // Make all state_for calls early since they can emit code
754 CodeEmitInfo* info = state_for(x, x->state());
756 // Note: spill caller save before setting the item
757 LIRItem src (x->argument_at(0), this);
758 LIRItem src_pos (x->argument_at(1), this);
759 LIRItem dst (x->argument_at(2), this);
760 LIRItem dst_pos (x->argument_at(3), this);
761 LIRItem length (x->argument_at(4), this);
762 // load all values in callee_save_registers, as this makes the
763 // parameter passing to the fast case simpler
764 src.load_item_force (rlock_callee_saved(T_OBJECT));
765 src_pos.load_item_force (rlock_callee_saved(T_INT));
766 dst.load_item_force (rlock_callee_saved(T_OBJECT));
767 dst_pos.load_item_force (rlock_callee_saved(T_INT));
768 length.load_item_force (rlock_callee_saved(T_INT));
770 int flags;
771 ciArrayKlass* expected_type;
772 arraycopy_helper(x, &flags, &expected_type);
774 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
775 length.result(), rlock_callee_saved(T_INT),
776 expected_type, flags, info);
777 set_no_result(x);
778 }
780 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
781 // _i2b, _i2c, _i2s
782 void LIRGenerator::do_Convert(Convert* x) {
784 switch (x->op()) {
785 case Bytecodes::_f2l:
786 case Bytecodes::_d2l:
787 case Bytecodes::_d2i:
788 case Bytecodes::_l2f:
789 case Bytecodes::_l2d: {
791 address entry;
792 switch (x->op()) {
793 case Bytecodes::_l2f:
794 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
795 break;
796 case Bytecodes::_l2d:
797 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
798 break;
799 case Bytecodes::_f2l:
800 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
801 break;
802 case Bytecodes::_d2l:
803 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
804 break;
805 case Bytecodes::_d2i:
806 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
807 break;
808 default:
809 ShouldNotReachHere();
810 }
811 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
812 set_result(x, result);
813 break;
814 }
816 case Bytecodes::_i2f:
817 case Bytecodes::_i2d: {
818 LIRItem value(x->value(), this);
820 LIR_Opr reg = rlock_result(x);
821 // To convert an int to double, we need to load the 32-bit int
822 // from memory into a single precision floating point register
823 // (even numbered). Then the sparc fitod instruction takes care
824 // of the conversion. This is a bit ugly, but is the best way to
825 // get the int value in a single precision floating point register
826 value.load_item();
827 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
828 __ convert(x->op(), tmp, reg);
829 break;
830 }
831 break;
833 case Bytecodes::_i2l:
834 case Bytecodes::_i2b:
835 case Bytecodes::_i2c:
836 case Bytecodes::_i2s:
837 case Bytecodes::_l2i:
838 case Bytecodes::_f2d:
839 case Bytecodes::_d2f: { // inline code
840 LIRItem value(x->value(), this);
842 value.load_item();
843 LIR_Opr reg = rlock_result(x);
844 __ convert(x->op(), value.result(), reg, false);
845 }
846 break;
848 case Bytecodes::_f2i: {
849 LIRItem value (x->value(), this);
850 value.set_destroys_register();
851 value.load_item();
852 LIR_Opr reg = rlock_result(x);
853 set_vreg_flag(reg, must_start_in_memory);
854 __ convert(x->op(), value.result(), reg, false);
855 }
856 break;
858 default: ShouldNotReachHere();
859 }
860 }
863 void LIRGenerator::do_NewInstance(NewInstance* x) {
864 // This instruction can be deoptimized in the slow path : use
865 // O0 as result register.
866 const LIR_Opr reg = result_register_for(x->type());
868 if (PrintNotLoaded && !x->klass()->is_loaded()) {
869 tty->print_cr(" ###class not loaded at new bci %d", x->bci());
870 }
871 CodeEmitInfo* info = state_for(x, x->state());
872 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
873 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
874 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
875 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
876 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
877 new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
878 LIR_Opr result = rlock_result(x);
879 __ move(reg, result);
880 }
883 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
884 // Evaluate state_for early since it may emit code
885 CodeEmitInfo* info = state_for(x, x->state());
887 LIRItem length(x->length(), this);
888 length.load_item();
890 LIR_Opr reg = result_register_for(x->type());
891 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
892 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
893 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
894 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
895 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
896 LIR_Opr len = length.result();
897 BasicType elem_type = x->elt_type();
899 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
901 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
902 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
904 LIR_Opr result = rlock_result(x);
905 __ move(reg, result);
906 }
909 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
910 // Evaluate state_for early since it may emit code.
911 CodeEmitInfo* info = state_for(x, x->state());
912 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
913 // and therefore provide the state before the parameters have been consumed
914 CodeEmitInfo* patching_info = NULL;
915 if (!x->klass()->is_loaded() || PatchALot) {
916 patching_info = state_for(x, x->state_before());
917 }
919 LIRItem length(x->length(), this);
920 length.load_item();
922 const LIR_Opr reg = result_register_for(x->type());
923 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
924 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
925 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
926 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
927 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
928 LIR_Opr len = length.result();
930 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
931 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
932 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
933 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
934 }
935 jobject2reg_with_patching(klass_reg, obj, patching_info);
936 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
938 LIR_Opr result = rlock_result(x);
939 __ move(reg, result);
940 }
943 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
944 Values* dims = x->dims();
945 int i = dims->length();
946 LIRItemList* items = new LIRItemList(dims->length(), NULL);
947 while (i-- > 0) {
948 LIRItem* size = new LIRItem(dims->at(i), this);
949 items->at_put(i, size);
950 }
952 // Evaluate state_for early since it may emit code.
953 CodeEmitInfo* patching_info = NULL;
954 if (!x->klass()->is_loaded() || PatchALot) {
955 patching_info = state_for(x, x->state_before());
957 // cannot re-use same xhandlers for multiple CodeEmitInfos, so
958 // clone all handlers. This is handled transparently in other
959 // places by the CodeEmitInfo cloning logic but is handled
960 // specially here because a stub isn't being used.
961 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
962 }
963 CodeEmitInfo* info = state_for(x, x->state());
965 i = dims->length();
966 while (i-- > 0) {
967 LIRItem* size = items->at(i);
968 size->load_item();
969 store_stack_parameter (size->result(),
970 in_ByteSize(STACK_BIAS +
971 frame::memory_parameter_word_sp_offset * wordSize +
972 i * sizeof(jint)));
973 }
975 // This instruction can be deoptimized in the slow path : use
976 // O0 as result register.
977 const LIR_Opr reg = result_register_for(x->type());
978 jobject2reg_with_patching(reg, x->klass(), patching_info);
979 LIR_Opr rank = FrameMap::O1_opr;
980 __ move(LIR_OprFact::intConst(x->rank()), rank);
981 LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
982 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
983 __ add(FrameMap::SP_opr,
984 LIR_OprFact::intptrConst(offset_from_sp),
985 varargs);
986 LIR_OprList* args = new LIR_OprList(3);
987 args->append(reg);
988 args->append(rank);
989 args->append(varargs);
990 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
991 LIR_OprFact::illegalOpr,
992 reg, args, info);
994 LIR_Opr result = rlock_result(x);
995 __ move(reg, result);
996 }
999 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1000 }
1003 void LIRGenerator::do_CheckCast(CheckCast* x) {
1004 LIRItem obj(x->obj(), this);
1005 CodeEmitInfo* patching_info = NULL;
1006 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1007 // must do this before locking the destination register as an oop register,
1008 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
1009 patching_info = state_for(x, x->state_before());
1010 }
1011 obj.load_item();
1012 LIR_Opr out_reg = rlock_result(x);
1013 CodeStub* stub;
1014 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
1016 if (x->is_incompatible_class_change_check()) {
1017 assert(patching_info == NULL, "can't patch this");
1018 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1019 } else {
1020 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1021 }
1022 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1023 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1024 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1025 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1026 x->direct_compare(), info_for_exception, patching_info, stub,
1027 x->profiled_method(), x->profiled_bci());
1028 }
1031 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1032 LIRItem obj(x->obj(), this);
1033 CodeEmitInfo* patching_info = NULL;
1034 if (!x->klass()->is_loaded() || PatchALot) {
1035 patching_info = state_for(x, x->state_before());
1036 }
1037 // ensure the result register is not the input register because the result is initialized before the patching safepoint
1038 obj.load_item();
1039 LIR_Opr out_reg = rlock_result(x);
1040 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1041 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1042 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1043 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, x->direct_compare(), patching_info);
1044 }
1047 void LIRGenerator::do_If(If* x) {
1048 assert(x->number_of_sux() == 2, "inconsistency");
1049 ValueTag tag = x->x()->type()->tag();
1050 LIRItem xitem(x->x(), this);
1051 LIRItem yitem(x->y(), this);
1052 LIRItem* xin = &xitem;
1053 LIRItem* yin = &yitem;
1054 If::Condition cond = x->cond();
1056 if (tag == longTag) {
1057 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1058 // mirror for other conditions
1059 if (cond == If::gtr || cond == If::leq) {
1060 // swap inputs
1061 cond = Instruction::mirror(cond);
1062 xin = &yitem;
1063 yin = &xitem;
1064 }
1065 xin->set_destroys_register();
1066 }
1068 LIR_Opr left = LIR_OprFact::illegalOpr;
1069 LIR_Opr right = LIR_OprFact::illegalOpr;
1071 xin->load_item();
1072 left = xin->result();
1074 if (is_simm13(yin->result())) {
1075 // inline int constants which are small enough to be immediate operands
1076 right = LIR_OprFact::value_type(yin->value()->type());
1077 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1078 (cond == If::eql || cond == If::neq)) {
1079 // inline long zero
1080 right = LIR_OprFact::value_type(yin->value()->type());
1081 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1082 right = LIR_OprFact::value_type(yin->value()->type());
1083 } else {
1084 yin->load_item();
1085 right = yin->result();
1086 }
1087 set_no_result(x);
1089 // add safepoint before generating condition code so it can be recomputed
1090 if (x->is_safepoint()) {
1091 // increment backedge counter if needed
1092 increment_backedge_counter(state_for(x, x->state_before()));
1094 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
1095 }
1097 __ cmp(lir_cond(cond), left, right);
1098 profile_branch(x, cond);
1099 move_to_phi(x->state());
1100 if (x->x()->type()->is_float_kind()) {
1101 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1102 } else {
1103 __ branch(lir_cond(cond), right->type(), x->tsux());
1104 }
1105 assert(x->default_sux() == x->fsux(), "wrong destination above");
1106 __ jump(x->default_sux());
1107 }
1110 LIR_Opr LIRGenerator::getThreadPointer() {
1111 return FrameMap::as_pointer_opr(G2);
1112 }
1115 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1116 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
1117 LIR_OprList* args = new LIR_OprList(1);
1118 args->append(FrameMap::O0_opr);
1119 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1120 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
1121 }
1124 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1125 CodeEmitInfo* info) {
1126 #ifdef _LP64
1127 __ store(value, address, info);
1128 #else
1129 __ volatile_store_mem_reg(value, address, info);
1130 #endif
1131 }
1133 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1134 CodeEmitInfo* info) {
1135 #ifdef _LP64
1136 __ load(address, result, info);
1137 #else
1138 __ volatile_load_mem_reg(address, result, info);
1139 #endif
1140 }
1143 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1144 BasicType type, bool is_volatile) {
1145 LIR_Opr base_op = src;
1146 LIR_Opr index_op = offset;
1148 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1149 #ifndef _LP64
1150 if (is_volatile && type == T_LONG) {
1151 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1152 } else
1153 #endif
1154 {
1155 if (type == T_BOOLEAN) {
1156 type = T_BYTE;
1157 }
1158 LIR_Address* addr;
1159 if (type == T_ARRAY || type == T_OBJECT) {
1160 LIR_Opr tmp = new_pointer_register();
1161 __ add(base_op, index_op, tmp);
1162 addr = new LIR_Address(tmp, type);
1163 } else {
1164 addr = new LIR_Address(base_op, index_op, type);
1165 }
1167 if (is_obj) {
1168 pre_barrier(LIR_OprFact::address(addr), false, NULL);
1169 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1170 }
1171 __ move(data, addr);
1172 if (is_obj) {
1173 // This address is precise
1174 post_barrier(LIR_OprFact::address(addr), data);
1175 }
1176 }
1177 }
1180 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1181 BasicType type, bool is_volatile) {
1182 #ifndef _LP64
1183 if (is_volatile && type == T_LONG) {
1184 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1185 } else
1186 #endif
1187 {
1188 LIR_Address* addr = new LIR_Address(src, offset, type);
1189 __ load(addr, dst);
1190 }
1191 }
