Thu, 15 Aug 2013 20:04:10 -0400
8003424: Enable Class Data Sharing for CompressedOops
8016729: ObjectAlignmentInBytes=16 now forces the use of heap based compressed oops
8005933: The -Xshare:auto option is ignored for -server
Summary: Move klass metaspace above the heap and support CDS with compressed klass ptrs.
Reviewed-by: coleenp, kvn, mgerdin, tschatzl, stefank
1 /*
2 * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "asm/register.hpp"
28 #include "register_x86.hpp"
29 #ifdef TARGET_ARCH_MODEL_x86_32
30 # include "interp_masm_x86_32.hpp"
31 #endif
32 #ifdef TARGET_ARCH_MODEL_x86_64
33 # include "interp_masm_x86_64.hpp"
34 #endif
36 REGISTER_DEFINITION(Register, noreg);
37 REGISTER_DEFINITION(Register, rax);
38 REGISTER_DEFINITION(Register, rcx);
39 REGISTER_DEFINITION(Register, rdx);
40 REGISTER_DEFINITION(Register, rbx);
41 REGISTER_DEFINITION(Register, rsp);
42 REGISTER_DEFINITION(Register, rbp);
43 REGISTER_DEFINITION(Register, rsi);
44 REGISTER_DEFINITION(Register, rdi);
45 #ifdef AMD64
46 REGISTER_DEFINITION(Register, r8);
47 REGISTER_DEFINITION(Register, r9);
48 REGISTER_DEFINITION(Register, r10);
49 REGISTER_DEFINITION(Register, r11);
50 REGISTER_DEFINITION(Register, r12);
51 REGISTER_DEFINITION(Register, r13);
52 REGISTER_DEFINITION(Register, r14);
53 REGISTER_DEFINITION(Register, r15);
54 #endif // AMD64
56 REGISTER_DEFINITION(XMMRegister, xnoreg);
57 REGISTER_DEFINITION(XMMRegister, xmm0 );
58 REGISTER_DEFINITION(XMMRegister, xmm1 );
59 REGISTER_DEFINITION(XMMRegister, xmm2 );
60 REGISTER_DEFINITION(XMMRegister, xmm3 );
61 REGISTER_DEFINITION(XMMRegister, xmm4 );
62 REGISTER_DEFINITION(XMMRegister, xmm5 );
63 REGISTER_DEFINITION(XMMRegister, xmm6 );
64 REGISTER_DEFINITION(XMMRegister, xmm7 );
65 #ifdef AMD64
66 REGISTER_DEFINITION(XMMRegister, xmm8);
67 REGISTER_DEFINITION(XMMRegister, xmm9);
68 REGISTER_DEFINITION(XMMRegister, xmm10);
69 REGISTER_DEFINITION(XMMRegister, xmm11);
70 REGISTER_DEFINITION(XMMRegister, xmm12);
71 REGISTER_DEFINITION(XMMRegister, xmm13);
72 REGISTER_DEFINITION(XMMRegister, xmm14);
73 REGISTER_DEFINITION(XMMRegister, xmm15);
75 REGISTER_DEFINITION(Register, c_rarg0);
76 REGISTER_DEFINITION(Register, c_rarg1);
77 REGISTER_DEFINITION(Register, c_rarg2);
78 REGISTER_DEFINITION(Register, c_rarg3);
80 REGISTER_DEFINITION(XMMRegister, c_farg0);
81 REGISTER_DEFINITION(XMMRegister, c_farg1);
82 REGISTER_DEFINITION(XMMRegister, c_farg2);
83 REGISTER_DEFINITION(XMMRegister, c_farg3);
85 // Non windows OS's have a few more argument registers
86 #ifndef _WIN64
87 REGISTER_DEFINITION(Register, c_rarg4);
88 REGISTER_DEFINITION(Register, c_rarg5);
90 REGISTER_DEFINITION(XMMRegister, c_farg4);
91 REGISTER_DEFINITION(XMMRegister, c_farg5);
92 REGISTER_DEFINITION(XMMRegister, c_farg6);
93 REGISTER_DEFINITION(XMMRegister, c_farg7);
94 #endif /* _WIN64 */
96 REGISTER_DEFINITION(Register, j_rarg0);
97 REGISTER_DEFINITION(Register, j_rarg1);
98 REGISTER_DEFINITION(Register, j_rarg2);
99 REGISTER_DEFINITION(Register, j_rarg3);
100 REGISTER_DEFINITION(Register, j_rarg4);
101 REGISTER_DEFINITION(Register, j_rarg5);
103 REGISTER_DEFINITION(XMMRegister, j_farg0);
104 REGISTER_DEFINITION(XMMRegister, j_farg1);
105 REGISTER_DEFINITION(XMMRegister, j_farg2);
106 REGISTER_DEFINITION(XMMRegister, j_farg3);
107 REGISTER_DEFINITION(XMMRegister, j_farg4);
108 REGISTER_DEFINITION(XMMRegister, j_farg5);
109 REGISTER_DEFINITION(XMMRegister, j_farg6);
110 REGISTER_DEFINITION(XMMRegister, j_farg7);
112 REGISTER_DEFINITION(Register, rscratch1);
113 REGISTER_DEFINITION(Register, rscratch2);
115 REGISTER_DEFINITION(Register, r12_heapbase);
116 REGISTER_DEFINITION(Register, r15_thread);
117 #endif // AMD64
119 REGISTER_DEFINITION(MMXRegister, mnoreg );
120 REGISTER_DEFINITION(MMXRegister, mmx0 );
121 REGISTER_DEFINITION(MMXRegister, mmx1 );
122 REGISTER_DEFINITION(MMXRegister, mmx2 );
123 REGISTER_DEFINITION(MMXRegister, mmx3 );
124 REGISTER_DEFINITION(MMXRegister, mmx4 );
125 REGISTER_DEFINITION(MMXRegister, mmx5 );
126 REGISTER_DEFINITION(MMXRegister, mmx6 );
127 REGISTER_DEFINITION(MMXRegister, mmx7 );
129 // JSR 292
130 REGISTER_DEFINITION(Register, rbp_mh_SP_save);