Tue, 01 Feb 2011 03:38:44 -0800
7009309: JSR 292: compiler/6991596/Test6991596.java crashes on fastdebug JDK7/b122
Reviewed-by: kvn, never
1 /*
2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "assembler_x86.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolderOop.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
45 #ifdef COMPILER2
46 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob;
47 #endif // COMPILER2
49 DeoptimizationBlob *SharedRuntime::_deopt_blob;
50 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob;
51 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob;
52 RuntimeStub* SharedRuntime::_wrong_method_blob;
53 RuntimeStub* SharedRuntime::_ic_miss_blob;
54 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob;
55 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob;
56 RuntimeStub* SharedRuntime::_resolve_static_call_blob;
58 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
60 class RegisterSaver {
61 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
62 // Capture info about frame layout
63 enum layout {
64 fpu_state_off = 0,
65 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
66 st0_off, st0H_off,
67 st1_off, st1H_off,
68 st2_off, st2H_off,
69 st3_off, st3H_off,
70 st4_off, st4H_off,
71 st5_off, st5H_off,
72 st6_off, st6H_off,
73 st7_off, st7H_off,
75 xmm0_off, xmm0H_off,
76 xmm1_off, xmm1H_off,
77 xmm2_off, xmm2H_off,
78 xmm3_off, xmm3H_off,
79 xmm4_off, xmm4H_off,
80 xmm5_off, xmm5H_off,
81 xmm6_off, xmm6H_off,
82 xmm7_off, xmm7H_off,
83 flags_off,
84 rdi_off,
85 rsi_off,
86 ignore_off, // extra copy of rbp,
87 rsp_off,
88 rbx_off,
89 rdx_off,
90 rcx_off,
91 rax_off,
92 // The frame sender code expects that rbp will be in the "natural" place and
93 // will override any oopMap setting for it. We must therefore force the layout
94 // so that it agrees with the frame sender code.
95 rbp_off,
96 return_off, // slot for return address
97 reg_save_size };
100 public:
102 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
103 int* total_frame_words, bool verify_fpu = true);
104 static void restore_live_registers(MacroAssembler* masm);
106 static int rax_offset() { return rax_off; }
107 static int rbx_offset() { return rbx_off; }
109 // Offsets into the register save area
110 // Used by deoptimization when it is managing result register
111 // values on its own
113 static int raxOffset(void) { return rax_off; }
114 static int rdxOffset(void) { return rdx_off; }
115 static int rbxOffset(void) { return rbx_off; }
116 static int xmm0Offset(void) { return xmm0_off; }
117 // This really returns a slot in the fp save area, which one is not important
118 static int fpResultOffset(void) { return st0_off; }
120 // During deoptimization only the result register need to be restored
121 // all the other values have already been extracted.
123 static void restore_result_registers(MacroAssembler* masm);
125 };
127 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
128 int* total_frame_words, bool verify_fpu) {
130 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
131 int frame_words = frame_size_in_bytes / wordSize;
132 *total_frame_words = frame_words;
134 assert(FPUStateSizeInWords == 27, "update stack layout");
136 // save registers, fpu state, and flags
137 // We assume caller has already has return address slot on the stack
138 // We push epb twice in this sequence because we want the real rbp,
139 // to be under the return like a normal enter and we want to use pusha
140 // We push by hand instead of pusing push
141 __ enter();
142 __ pusha();
143 __ pushf();
144 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
145 __ push_FPU_state(); // Save FPU state & init
147 if (verify_fpu) {
148 // Some stubs may have non standard FPU control word settings so
149 // only check and reset the value when it required to be the
150 // standard value. The safepoint blob in particular can be used
151 // in methods which are using the 24 bit control word for
152 // optimized float math.
154 #ifdef ASSERT
155 // Make sure the control word has the expected value
156 Label ok;
157 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
158 __ jccb(Assembler::equal, ok);
159 __ stop("corrupted control word detected");
160 __ bind(ok);
161 #endif
163 // Reset the control word to guard against exceptions being unmasked
164 // since fstp_d can cause FPU stack underflow exceptions. Write it
165 // into the on stack copy and then reload that to make sure that the
166 // current and future values are correct.
167 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
168 }
170 __ frstor(Address(rsp, 0));
171 if (!verify_fpu) {
172 // Set the control word so that exceptions are masked for the
173 // following code.
174 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
175 }
177 // Save the FPU registers in de-opt-able form
179 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
180 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
181 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
182 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
183 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
184 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
185 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
186 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
188 if( UseSSE == 1 ) { // Save the XMM state
189 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
190 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
191 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
192 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
193 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
194 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
195 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
196 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
197 } else if( UseSSE >= 2 ) {
198 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
199 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
200 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
201 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
202 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
203 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
204 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
205 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
206 }
208 // Set an oopmap for the call site. This oopmap will map all
209 // oop-registers and debug-info registers as callee-saved. This
210 // will allow deoptimization at this safepoint to find all possible
211 // debug-info recordings, as well as let GC find all oops.
213 OopMapSet *oop_maps = new OopMapSet();
214 OopMap* map = new OopMap( frame_words, 0 );
216 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
218 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
222 // rbp, location is known implicitly, no oopMap
223 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
229 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
230 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
231 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
232 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
233 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
234 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
236 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
241 // %%% This is really a waste but we'll keep things as they were for now
242 if (true) {
243 #define NEXTREG(x) (x)->as_VMReg()->next()
244 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
245 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
246 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
247 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
248 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
249 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
250 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
251 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
252 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
253 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
254 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
255 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
256 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
257 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
258 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
259 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
260 #undef NEXTREG
261 #undef STACK_OFFSET
262 }
264 return map;
266 }
268 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
270 // Recover XMM & FPU state
271 if( UseSSE == 1 ) {
272 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
273 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
274 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
275 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
276 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
277 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
278 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
279 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
280 } else if( UseSSE >= 2 ) {
281 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
282 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
283 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
284 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
285 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
286 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
287 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
288 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
289 }
290 __ pop_FPU_state();
291 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
293 __ popf();
294 __ popa();
295 // Get the rbp, described implicitly by the frame sender code (no oopMap)
296 __ pop(rbp);
298 }
300 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
302 // Just restore result register. Only used by deoptimization. By
303 // now any callee save register that needs to be restore to a c2
304 // caller of the deoptee has been extracted into the vframeArray
305 // and will be stuffed into the c2i adapter we create for later
306 // restoration so only result registers need to be restored here.
307 //
309 __ frstor(Address(rsp, 0)); // Restore fpu state
311 // Recover XMM & FPU state
312 if( UseSSE == 1 ) {
313 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
314 } else if( UseSSE >= 2 ) {
315 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
316 }
317 __ movptr(rax, Address(rsp, rax_off*wordSize));
318 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
319 // Pop all of the register save are off the stack except the return address
320 __ addptr(rsp, return_off * wordSize);
321 }
323 // The java_calling_convention describes stack locations as ideal slots on
324 // a frame with no abi restrictions. Since we must observe abi restrictions
325 // (like the placement of the register window) the slots must be biased by
326 // the following value.
327 static int reg2offset_in(VMReg r) {
328 // Account for saved rbp, and return address
329 // This should really be in_preserve_stack_slots
330 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
331 }
333 static int reg2offset_out(VMReg r) {
334 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
335 }
337 // ---------------------------------------------------------------------------
338 // Read the array of BasicTypes from a signature, and compute where the
339 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
340 // quantities. Values less than SharedInfo::stack0 are registers, those above
341 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
342 // as framesizes are fixed.
343 // VMRegImpl::stack0 refers to the first slot 0(sp).
344 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
345 // up to RegisterImpl::number_of_registers) are the 32-bit
346 // integer registers.
348 // Pass first two oop/int args in registers ECX and EDX.
349 // Pass first two float/double args in registers XMM0 and XMM1.
350 // Doubles have precedence, so if you pass a mix of floats and doubles
351 // the doubles will grab the registers before the floats will.
353 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
354 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
355 // units regardless of build. Of course for i486 there is no 64 bit build
358 // ---------------------------------------------------------------------------
359 // The compiled Java calling convention.
360 // Pass first two oop/int args in registers ECX and EDX.
361 // Pass first two float/double args in registers XMM0 and XMM1.
362 // Doubles have precedence, so if you pass a mix of floats and doubles
363 // the doubles will grab the registers before the floats will.
364 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
365 VMRegPair *regs,
366 int total_args_passed,
367 int is_outgoing) {
368 uint stack = 0; // Starting stack position for args on stack
371 // Pass first two oop/int args in registers ECX and EDX.
372 uint reg_arg0 = 9999;
373 uint reg_arg1 = 9999;
375 // Pass first two float/double args in registers XMM0 and XMM1.
376 // Doubles have precedence, so if you pass a mix of floats and doubles
377 // the doubles will grab the registers before the floats will.
378 // CNC - TURNED OFF FOR non-SSE.
379 // On Intel we have to round all doubles (and most floats) at
380 // call sites by storing to the stack in any case.
381 // UseSSE=0 ==> Don't Use ==> 9999+0
382 // UseSSE=1 ==> Floats only ==> 9999+1
383 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
384 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
385 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
386 uint freg_arg0 = 9999+fargs;
387 uint freg_arg1 = 9999+fargs;
389 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
390 int i;
391 for( i = 0; i < total_args_passed; i++) {
392 if( sig_bt[i] == T_DOUBLE ) {
393 // first 2 doubles go in registers
394 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
395 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
396 else // Else double is passed low on the stack to be aligned.
397 stack += 2;
398 } else if( sig_bt[i] == T_LONG ) {
399 stack += 2;
400 }
401 }
402 int dstack = 0; // Separate counter for placing doubles
404 // Now pick where all else goes.
405 for( i = 0; i < total_args_passed; i++) {
406 // From the type and the argument number (count) compute the location
407 switch( sig_bt[i] ) {
408 case T_SHORT:
409 case T_CHAR:
410 case T_BYTE:
411 case T_BOOLEAN:
412 case T_INT:
413 case T_ARRAY:
414 case T_OBJECT:
415 case T_ADDRESS:
416 if( reg_arg0 == 9999 ) {
417 reg_arg0 = i;
418 regs[i].set1(rcx->as_VMReg());
419 } else if( reg_arg1 == 9999 ) {
420 reg_arg1 = i;
421 regs[i].set1(rdx->as_VMReg());
422 } else {
423 regs[i].set1(VMRegImpl::stack2reg(stack++));
424 }
425 break;
426 case T_FLOAT:
427 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
428 freg_arg0 = i;
429 regs[i].set1(xmm0->as_VMReg());
430 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
431 freg_arg1 = i;
432 regs[i].set1(xmm1->as_VMReg());
433 } else {
434 regs[i].set1(VMRegImpl::stack2reg(stack++));
435 }
436 break;
437 case T_LONG:
438 assert(sig_bt[i+1] == T_VOID, "missing Half" );
439 regs[i].set2(VMRegImpl::stack2reg(dstack));
440 dstack += 2;
441 break;
442 case T_DOUBLE:
443 assert(sig_bt[i+1] == T_VOID, "missing Half" );
444 if( freg_arg0 == (uint)i ) {
445 regs[i].set2(xmm0->as_VMReg());
446 } else if( freg_arg1 == (uint)i ) {
447 regs[i].set2(xmm1->as_VMReg());
448 } else {
449 regs[i].set2(VMRegImpl::stack2reg(dstack));
450 dstack += 2;
451 }
452 break;
453 case T_VOID: regs[i].set_bad(); break;
454 break;
455 default:
456 ShouldNotReachHere();
457 break;
458 }
459 }
461 // return value can be odd number of VMRegImpl stack slots make multiple of 2
462 return round_to(stack, 2);
463 }
465 // Patch the callers callsite with entry to compiled code if it exists.
466 static void patch_callers_callsite(MacroAssembler *masm) {
467 Label L;
468 __ verify_oop(rbx);
469 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
470 __ jcc(Assembler::equal, L);
471 // Schedule the branch target address early.
472 // Call into the VM to patch the caller, then jump to compiled callee
473 // rax, isn't live so capture return address while we easily can
474 __ movptr(rax, Address(rsp, 0));
475 __ pusha();
476 __ pushf();
478 if (UseSSE == 1) {
479 __ subptr(rsp, 2*wordSize);
480 __ movflt(Address(rsp, 0), xmm0);
481 __ movflt(Address(rsp, wordSize), xmm1);
482 }
483 if (UseSSE >= 2) {
484 __ subptr(rsp, 4*wordSize);
485 __ movdbl(Address(rsp, 0), xmm0);
486 __ movdbl(Address(rsp, 2*wordSize), xmm1);
487 }
488 #ifdef COMPILER2
489 // C2 may leave the stack dirty if not in SSE2+ mode
490 if (UseSSE >= 2) {
491 __ verify_FPU(0, "c2i transition should have clean FPU stack");
492 } else {
493 __ empty_FPU_stack();
494 }
495 #endif /* COMPILER2 */
497 // VM needs caller's callsite
498 __ push(rax);
499 // VM needs target method
500 __ push(rbx);
501 __ verify_oop(rbx);
502 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
503 __ addptr(rsp, 2*wordSize);
505 if (UseSSE == 1) {
506 __ movflt(xmm0, Address(rsp, 0));
507 __ movflt(xmm1, Address(rsp, wordSize));
508 __ addptr(rsp, 2*wordSize);
509 }
510 if (UseSSE >= 2) {
511 __ movdbl(xmm0, Address(rsp, 0));
512 __ movdbl(xmm1, Address(rsp, 2*wordSize));
513 __ addptr(rsp, 4*wordSize);
514 }
516 __ popf();
517 __ popa();
518 __ bind(L);
519 }
522 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
523 int next_off = st_off - Interpreter::stackElementSize;
524 __ movdbl(Address(rsp, next_off), r);
525 }
527 static void gen_c2i_adapter(MacroAssembler *masm,
528 int total_args_passed,
529 int comp_args_on_stack,
530 const BasicType *sig_bt,
531 const VMRegPair *regs,
532 Label& skip_fixup) {
533 // Before we get into the guts of the C2I adapter, see if we should be here
534 // at all. We've come from compiled code and are attempting to jump to the
535 // interpreter, which means the caller made a static call to get here
536 // (vcalls always get a compiled target if there is one). Check for a
537 // compiled target. If there is one, we need to patch the caller's call.
538 patch_callers_callsite(masm);
540 __ bind(skip_fixup);
542 #ifdef COMPILER2
543 // C2 may leave the stack dirty if not in SSE2+ mode
544 if (UseSSE >= 2) {
545 __ verify_FPU(0, "c2i transition should have clean FPU stack");
546 } else {
547 __ empty_FPU_stack();
548 }
549 #endif /* COMPILER2 */
551 // Since all args are passed on the stack, total_args_passed * interpreter_
552 // stack_element_size is the
553 // space we need.
554 int extraspace = total_args_passed * Interpreter::stackElementSize;
556 // Get return address
557 __ pop(rax);
559 // set senderSP value
560 __ movptr(rsi, rsp);
562 __ subptr(rsp, extraspace);
564 // Now write the args into the outgoing interpreter space
565 for (int i = 0; i < total_args_passed; i++) {
566 if (sig_bt[i] == T_VOID) {
567 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
568 continue;
569 }
571 // st_off points to lowest address on stack.
572 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
573 int next_off = st_off - Interpreter::stackElementSize;
575 // Say 4 args:
576 // i st_off
577 // 0 12 T_LONG
578 // 1 8 T_VOID
579 // 2 4 T_OBJECT
580 // 3 0 T_BOOL
581 VMReg r_1 = regs[i].first();
582 VMReg r_2 = regs[i].second();
583 if (!r_1->is_valid()) {
584 assert(!r_2->is_valid(), "");
585 continue;
586 }
588 if (r_1->is_stack()) {
589 // memory to memory use fpu stack top
590 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
592 if (!r_2->is_valid()) {
593 __ movl(rdi, Address(rsp, ld_off));
594 __ movptr(Address(rsp, st_off), rdi);
595 } else {
597 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
598 // st_off == MSW, st_off-wordSize == LSW
600 __ movptr(rdi, Address(rsp, ld_off));
601 __ movptr(Address(rsp, next_off), rdi);
602 #ifndef _LP64
603 __ movptr(rdi, Address(rsp, ld_off + wordSize));
604 __ movptr(Address(rsp, st_off), rdi);
605 #else
606 #ifdef ASSERT
607 // Overwrite the unused slot with known junk
608 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
609 __ movptr(Address(rsp, st_off), rax);
610 #endif /* ASSERT */
611 #endif // _LP64
612 }
613 } else if (r_1->is_Register()) {
614 Register r = r_1->as_Register();
615 if (!r_2->is_valid()) {
616 __ movl(Address(rsp, st_off), r);
617 } else {
618 // long/double in gpr
619 NOT_LP64(ShouldNotReachHere());
620 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
621 // T_DOUBLE and T_LONG use two slots in the interpreter
622 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
623 // long/double in gpr
624 #ifdef ASSERT
625 // Overwrite the unused slot with known junk
626 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
627 __ movptr(Address(rsp, st_off), rax);
628 #endif /* ASSERT */
629 __ movptr(Address(rsp, next_off), r);
630 } else {
631 __ movptr(Address(rsp, st_off), r);
632 }
633 }
634 } else {
635 assert(r_1->is_XMMRegister(), "");
636 if (!r_2->is_valid()) {
637 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
638 } else {
639 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
640 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
641 }
642 }
643 }
645 // Schedule the branch target address early.
646 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
647 // And repush original return address
648 __ push(rax);
649 __ jmp(rcx);
650 }
653 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
654 int next_val_off = ld_off - Interpreter::stackElementSize;
655 __ movdbl(r, Address(saved_sp, next_val_off));
656 }
658 static void gen_i2c_adapter(MacroAssembler *masm,
659 int total_args_passed,
660 int comp_args_on_stack,
661 const BasicType *sig_bt,
662 const VMRegPair *regs) {
664 // Note: rsi contains the senderSP on entry. We must preserve it since
665 // we may do a i2c -> c2i transition if we lose a race where compiled
666 // code goes non-entrant while we get args ready.
668 // Pick up the return address
669 __ movptr(rax, Address(rsp, 0));
671 // Must preserve original SP for loading incoming arguments because
672 // we need to align the outgoing SP for compiled code.
673 __ movptr(rdi, rsp);
675 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
676 // in registers, we will occasionally have no stack args.
677 int comp_words_on_stack = 0;
678 if (comp_args_on_stack) {
679 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
680 // registers are below. By subtracting stack0, we either get a negative
681 // number (all values in registers) or the maximum stack slot accessed.
682 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
683 // Convert 4-byte stack slots to words.
684 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
685 // Round up to miminum stack alignment, in wordSize
686 comp_words_on_stack = round_to(comp_words_on_stack, 2);
687 __ subptr(rsp, comp_words_on_stack * wordSize);
688 }
690 // Align the outgoing SP
691 __ andptr(rsp, -(StackAlignmentInBytes));
693 // push the return address on the stack (note that pushing, rather
694 // than storing it, yields the correct frame alignment for the callee)
695 __ push(rax);
697 // Put saved SP in another register
698 const Register saved_sp = rax;
699 __ movptr(saved_sp, rdi);
702 // Will jump to the compiled code just as if compiled code was doing it.
703 // Pre-load the register-jump target early, to schedule it better.
704 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
706 // Now generate the shuffle code. Pick up all register args and move the
707 // rest through the floating point stack top.
708 for (int i = 0; i < total_args_passed; i++) {
709 if (sig_bt[i] == T_VOID) {
710 // Longs and doubles are passed in native word order, but misaligned
711 // in the 32-bit build.
712 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
713 continue;
714 }
716 // Pick up 0, 1 or 2 words from SP+offset.
718 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
719 "scrambled load targets?");
720 // Load in argument order going down.
721 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
722 // Point to interpreter value (vs. tag)
723 int next_off = ld_off - Interpreter::stackElementSize;
724 //
725 //
726 //
727 VMReg r_1 = regs[i].first();
728 VMReg r_2 = regs[i].second();
729 if (!r_1->is_valid()) {
730 assert(!r_2->is_valid(), "");
731 continue;
732 }
733 if (r_1->is_stack()) {
734 // Convert stack slot to an SP offset (+ wordSize to account for return address )
735 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
737 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
738 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
739 // we be generated.
740 if (!r_2->is_valid()) {
741 // __ fld_s(Address(saved_sp, ld_off));
742 // __ fstp_s(Address(rsp, st_off));
743 __ movl(rsi, Address(saved_sp, ld_off));
744 __ movptr(Address(rsp, st_off), rsi);
745 } else {
746 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
747 // are accessed as negative so LSW is at LOW address
749 // ld_off is MSW so get LSW
750 // st_off is LSW (i.e. reg.first())
751 // __ fld_d(Address(saved_sp, next_off));
752 // __ fstp_d(Address(rsp, st_off));
753 //
754 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
755 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
756 // So we must adjust where to pick up the data to match the interpreter.
757 //
758 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
759 // are accessed as negative so LSW is at LOW address
761 // ld_off is MSW so get LSW
762 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
763 next_off : ld_off;
764 __ movptr(rsi, Address(saved_sp, offset));
765 __ movptr(Address(rsp, st_off), rsi);
766 #ifndef _LP64
767 __ movptr(rsi, Address(saved_sp, ld_off));
768 __ movptr(Address(rsp, st_off + wordSize), rsi);
769 #endif // _LP64
770 }
771 } else if (r_1->is_Register()) { // Register argument
772 Register r = r_1->as_Register();
773 assert(r != rax, "must be different");
774 if (r_2->is_valid()) {
775 //
776 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
777 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
778 // So we must adjust where to pick up the data to match the interpreter.
780 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
781 next_off : ld_off;
783 // this can be a misaligned move
784 __ movptr(r, Address(saved_sp, offset));
785 #ifndef _LP64
786 assert(r_2->as_Register() != rax, "need another temporary register");
787 // Remember r_1 is low address (and LSB on x86)
788 // So r_2 gets loaded from high address regardless of the platform
789 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
790 #endif // _LP64
791 } else {
792 __ movl(r, Address(saved_sp, ld_off));
793 }
794 } else {
795 assert(r_1->is_XMMRegister(), "");
796 if (!r_2->is_valid()) {
797 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
798 } else {
799 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
800 }
801 }
802 }
804 // 6243940 We might end up in handle_wrong_method if
805 // the callee is deoptimized as we race thru here. If that
806 // happens we don't want to take a safepoint because the
807 // caller frame will look interpreted and arguments are now
808 // "compiled" so it is much better to make this transition
809 // invisible to the stack walking code. Unfortunately if
810 // we try and find the callee by normal means a safepoint
811 // is possible. So we stash the desired callee in the thread
812 // and the vm will find there should this case occur.
814 __ get_thread(rax);
815 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
817 // move methodOop to rax, in case we end up in an c2i adapter.
818 // the c2i adapters expect methodOop in rax, (c2) because c2's
819 // resolve stubs return the result (the method) in rax,.
820 // I'd love to fix this.
821 __ mov(rax, rbx);
823 __ jmp(rdi);
824 }
826 // ---------------------------------------------------------------
827 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
828 int total_args_passed,
829 int comp_args_on_stack,
830 const BasicType *sig_bt,
831 const VMRegPair *regs,
832 AdapterFingerPrint* fingerprint) {
833 address i2c_entry = __ pc();
835 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
837 // -------------------------------------------------------------------------
838 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
839 // to the interpreter. The args start out packed in the compiled layout. They
840 // need to be unpacked into the interpreter layout. This will almost always
841 // require some stack space. We grow the current (compiled) stack, then repack
842 // the args. We finally end in a jump to the generic interpreter entry point.
843 // On exit from the interpreter, the interpreter will restore our SP (lest the
844 // compiled code, which relys solely on SP and not EBP, get sick).
846 address c2i_unverified_entry = __ pc();
847 Label skip_fixup;
849 Register holder = rax;
850 Register receiver = rcx;
851 Register temp = rbx;
853 {
855 Label missed;
857 __ verify_oop(holder);
858 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
859 __ verify_oop(temp);
861 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
862 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
863 __ jcc(Assembler::notEqual, missed);
864 // Method might have been compiled since the call site was patched to
865 // interpreted if that is the case treat it as a miss so we can get
866 // the call site corrected.
867 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
868 __ jcc(Assembler::equal, skip_fixup);
870 __ bind(missed);
871 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
872 }
874 address c2i_entry = __ pc();
876 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
878 __ flush();
879 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
880 }
882 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
883 VMRegPair *regs,
884 int total_args_passed) {
885 // We return the amount of VMRegImpl stack slots we need to reserve for all
886 // the arguments NOT counting out_preserve_stack_slots.
888 uint stack = 0; // All arguments on stack
890 for( int i = 0; i < total_args_passed; i++) {
891 // From the type and the argument number (count) compute the location
892 switch( sig_bt[i] ) {
893 case T_BOOLEAN:
894 case T_CHAR:
895 case T_FLOAT:
896 case T_BYTE:
897 case T_SHORT:
898 case T_INT:
899 case T_OBJECT:
900 case T_ARRAY:
901 case T_ADDRESS:
902 regs[i].set1(VMRegImpl::stack2reg(stack++));
903 break;
904 case T_LONG:
905 case T_DOUBLE: // The stack numbering is reversed from Java
906 // Since C arguments do not get reversed, the ordering for
907 // doubles on the stack must be opposite the Java convention
908 assert(sig_bt[i+1] == T_VOID, "missing Half" );
909 regs[i].set2(VMRegImpl::stack2reg(stack));
910 stack += 2;
911 break;
912 case T_VOID: regs[i].set_bad(); break;
913 default:
914 ShouldNotReachHere();
915 break;
916 }
917 }
918 return stack;
919 }
921 // A simple move of integer like type
922 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
923 if (src.first()->is_stack()) {
924 if (dst.first()->is_stack()) {
925 // stack to stack
926 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
927 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
928 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
929 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
930 } else {
931 // stack to reg
932 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
933 }
934 } else if (dst.first()->is_stack()) {
935 // reg to stack
936 // no need to sign extend on 64bit
937 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
938 } else {
939 if (dst.first() != src.first()) {
940 __ mov(dst.first()->as_Register(), src.first()->as_Register());
941 }
942 }
943 }
945 // An oop arg. Must pass a handle not the oop itself
946 static void object_move(MacroAssembler* masm,
947 OopMap* map,
948 int oop_handle_offset,
949 int framesize_in_slots,
950 VMRegPair src,
951 VMRegPair dst,
952 bool is_receiver,
953 int* receiver_offset) {
955 // Because of the calling conventions we know that src can be a
956 // register or a stack location. dst can only be a stack location.
958 assert(dst.first()->is_stack(), "must be stack");
959 // must pass a handle. First figure out the location we use as a handle
961 if (src.first()->is_stack()) {
962 // Oop is already on the stack as an argument
963 Register rHandle = rax;
964 Label nil;
965 __ xorptr(rHandle, rHandle);
966 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
967 __ jcc(Assembler::equal, nil);
968 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
969 __ bind(nil);
970 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
972 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
973 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
974 if (is_receiver) {
975 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
976 }
977 } else {
978 // Oop is in an a register we must store it to the space we reserve
979 // on the stack for oop_handles
980 const Register rOop = src.first()->as_Register();
981 const Register rHandle = rax;
982 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
983 int offset = oop_slot*VMRegImpl::stack_slot_size;
984 Label skip;
985 __ movptr(Address(rsp, offset), rOop);
986 map->set_oop(VMRegImpl::stack2reg(oop_slot));
987 __ xorptr(rHandle, rHandle);
988 __ cmpptr(rOop, (int32_t)NULL_WORD);
989 __ jcc(Assembler::equal, skip);
990 __ lea(rHandle, Address(rsp, offset));
991 __ bind(skip);
992 // Store the handle parameter
993 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
994 if (is_receiver) {
995 *receiver_offset = offset;
996 }
997 }
998 }
1000 // A float arg may have to do float reg int reg conversion
1001 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1002 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1004 // Because of the calling convention we know that src is either a stack location
1005 // or an xmm register. dst can only be a stack location.
1007 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1009 if (src.first()->is_stack()) {
1010 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1011 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1012 } else {
1013 // reg to stack
1014 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1015 }
1016 }
1018 // A long move
1019 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1021 // The only legal possibility for a long_move VMRegPair is:
1022 // 1: two stack slots (possibly unaligned)
1023 // as neither the java or C calling convention will use registers
1024 // for longs.
1026 if (src.first()->is_stack() && dst.first()->is_stack()) {
1027 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1028 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1029 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1030 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1031 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1032 } else {
1033 ShouldNotReachHere();
1034 }
1035 }
1037 // A double move
1038 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1040 // The only legal possibilities for a double_move VMRegPair are:
1041 // The painful thing here is that like long_move a VMRegPair might be
1043 // Because of the calling convention we know that src is either
1044 // 1: a single physical register (xmm registers only)
1045 // 2: two stack slots (possibly unaligned)
1046 // dst can only be a pair of stack slots.
1048 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1050 if (src.first()->is_stack()) {
1051 // source is all stack
1052 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1053 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1054 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1055 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1056 } else {
1057 // reg to stack
1058 // No worries about stack alignment
1059 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1060 }
1061 }
1064 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1065 // We always ignore the frame_slots arg and just use the space just below frame pointer
1066 // which by this time is free to use
1067 switch (ret_type) {
1068 case T_FLOAT:
1069 __ fstp_s(Address(rbp, -wordSize));
1070 break;
1071 case T_DOUBLE:
1072 __ fstp_d(Address(rbp, -2*wordSize));
1073 break;
1074 case T_VOID: break;
1075 case T_LONG:
1076 __ movptr(Address(rbp, -wordSize), rax);
1077 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1078 break;
1079 default: {
1080 __ movptr(Address(rbp, -wordSize), rax);
1081 }
1082 }
1083 }
1085 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1086 // We always ignore the frame_slots arg and just use the space just below frame pointer
1087 // which by this time is free to use
1088 switch (ret_type) {
1089 case T_FLOAT:
1090 __ fld_s(Address(rbp, -wordSize));
1091 break;
1092 case T_DOUBLE:
1093 __ fld_d(Address(rbp, -2*wordSize));
1094 break;
1095 case T_LONG:
1096 __ movptr(rax, Address(rbp, -wordSize));
1097 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1098 break;
1099 case T_VOID: break;
1100 default: {
1101 __ movptr(rax, Address(rbp, -wordSize));
1102 }
1103 }
1104 }
1106 // ---------------------------------------------------------------------------
1107 // Generate a native wrapper for a given method. The method takes arguments
1108 // in the Java compiled code convention, marshals them to the native
1109 // convention (handlizes oops, etc), transitions to native, makes the call,
1110 // returns to java state (possibly blocking), unhandlizes any result and
1111 // returns.
1112 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1113 methodHandle method,
1114 int total_in_args,
1115 int comp_args_on_stack,
1116 BasicType *in_sig_bt,
1117 VMRegPair *in_regs,
1118 BasicType ret_type) {
1120 // An OopMap for lock (and class if static)
1121 OopMapSet *oop_maps = new OopMapSet();
1123 // We have received a description of where all the java arg are located
1124 // on entry to the wrapper. We need to convert these args to where
1125 // the jni function will expect them. To figure out where they go
1126 // we convert the java signature to a C signature by inserting
1127 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1129 int total_c_args = total_in_args + 1;
1130 if (method->is_static()) {
1131 total_c_args++;
1132 }
1134 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1135 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1137 int argc = 0;
1138 out_sig_bt[argc++] = T_ADDRESS;
1139 if (method->is_static()) {
1140 out_sig_bt[argc++] = T_OBJECT;
1141 }
1143 int i;
1144 for (i = 0; i < total_in_args ; i++ ) {
1145 out_sig_bt[argc++] = in_sig_bt[i];
1146 }
1149 // Now figure out where the args must be stored and how much stack space
1150 // they require (neglecting out_preserve_stack_slots but space for storing
1151 // the 1st six register arguments). It's weird see int_stk_helper.
1152 //
1153 int out_arg_slots;
1154 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1156 // Compute framesize for the wrapper. We need to handlize all oops in
1157 // registers a max of 2 on x86.
1159 // Calculate the total number of stack slots we will need.
1161 // First count the abi requirement plus all of the outgoing args
1162 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1164 // Now the space for the inbound oop handle area
1166 int oop_handle_offset = stack_slots;
1167 stack_slots += 2*VMRegImpl::slots_per_word;
1169 // Now any space we need for handlizing a klass if static method
1171 int klass_slot_offset = 0;
1172 int klass_offset = -1;
1173 int lock_slot_offset = 0;
1174 bool is_static = false;
1175 int oop_temp_slot_offset = 0;
1177 if (method->is_static()) {
1178 klass_slot_offset = stack_slots;
1179 stack_slots += VMRegImpl::slots_per_word;
1180 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1181 is_static = true;
1182 }
1184 // Plus a lock if needed
1186 if (method->is_synchronized()) {
1187 lock_slot_offset = stack_slots;
1188 stack_slots += VMRegImpl::slots_per_word;
1189 }
1191 // Now a place (+2) to save return values or temp during shuffling
1192 // + 2 for return address (which we own) and saved rbp,
1193 stack_slots += 4;
1195 // Ok The space we have allocated will look like:
1196 //
1197 //
1198 // FP-> | |
1199 // |---------------------|
1200 // | 2 slots for moves |
1201 // |---------------------|
1202 // | lock box (if sync) |
1203 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1204 // | klass (if static) |
1205 // |---------------------| <- klass_slot_offset
1206 // | oopHandle area |
1207 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1208 // | outbound memory |
1209 // | based arguments |
1210 // | |
1211 // |---------------------|
1212 // | |
1213 // SP-> | out_preserved_slots |
1214 //
1215 //
1216 // ****************************************************************************
1217 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1218 // arguments off of the stack after the jni call. Before the call we can use
1219 // instructions that are SP relative. After the jni call we switch to FP
1220 // relative instructions instead of re-adjusting the stack on windows.
1221 // ****************************************************************************
1224 // Now compute actual number of stack words we need rounding to make
1225 // stack properly aligned.
1226 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1228 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1230 intptr_t start = (intptr_t)__ pc();
1232 // First thing make an ic check to see if we should even be here
1234 // We are free to use all registers as temps without saving them and
1235 // restoring them except rbp,. rbp, is the only callee save register
1236 // as far as the interpreter and the compiler(s) are concerned.
1239 const Register ic_reg = rax;
1240 const Register receiver = rcx;
1241 Label hit;
1242 Label exception_pending;
1245 __ verify_oop(receiver);
1246 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1247 __ jcc(Assembler::equal, hit);
1249 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1251 // verified entry must be aligned for code patching.
1252 // and the first 5 bytes must be in the same cache line
1253 // if we align at 8 then we will be sure 5 bytes are in the same line
1254 __ align(8);
1256 __ bind(hit);
1258 int vep_offset = ((intptr_t)__ pc()) - start;
1260 #ifdef COMPILER1
1261 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1262 // Object.hashCode can pull the hashCode from the header word
1263 // instead of doing a full VM transition once it's been computed.
1264 // Since hashCode is usually polymorphic at call sites we can't do
1265 // this optimization at the call site without a lot of work.
1266 Label slowCase;
1267 Register receiver = rcx;
1268 Register result = rax;
1269 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1271 // check if locked
1272 __ testptr(result, markOopDesc::unlocked_value);
1273 __ jcc (Assembler::zero, slowCase);
1275 if (UseBiasedLocking) {
1276 // Check if biased and fall through to runtime if so
1277 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1278 __ jcc (Assembler::notZero, slowCase);
1279 }
1281 // get hash
1282 __ andptr(result, markOopDesc::hash_mask_in_place);
1283 // test if hashCode exists
1284 __ jcc (Assembler::zero, slowCase);
1285 __ shrptr(result, markOopDesc::hash_shift);
1286 __ ret(0);
1287 __ bind (slowCase);
1288 }
1289 #endif // COMPILER1
1291 // The instruction at the verified entry point must be 5 bytes or longer
1292 // because it can be patched on the fly by make_non_entrant. The stack bang
1293 // instruction fits that requirement.
1295 // Generate stack overflow check
1297 if (UseStackBanging) {
1298 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1299 } else {
1300 // need a 5 byte instruction to allow MT safe patching to non-entrant
1301 __ fat_nop();
1302 }
1304 // Generate a new frame for the wrapper.
1305 __ enter();
1306 // -2 because return address is already present and so is saved rbp,
1307 __ subptr(rsp, stack_size - 2*wordSize);
1309 // Frame is now completed as far a size and linkage.
1311 int frame_complete = ((intptr_t)__ pc()) - start;
1313 // Calculate the difference between rsp and rbp,. We need to know it
1314 // after the native call because on windows Java Natives will pop
1315 // the arguments and it is painful to do rsp relative addressing
1316 // in a platform independent way. So after the call we switch to
1317 // rbp, relative addressing.
1319 int fp_adjustment = stack_size - 2*wordSize;
1321 #ifdef COMPILER2
1322 // C2 may leave the stack dirty if not in SSE2+ mode
1323 if (UseSSE >= 2) {
1324 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1325 } else {
1326 __ empty_FPU_stack();
1327 }
1328 #endif /* COMPILER2 */
1330 // Compute the rbp, offset for any slots used after the jni call
1332 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1333 int oop_temp_slot_rbp_offset = (oop_temp_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1335 // We use rdi as a thread pointer because it is callee save and
1336 // if we load it once it is usable thru the entire wrapper
1337 const Register thread = rdi;
1339 // We use rsi as the oop handle for the receiver/klass
1340 // It is callee save so it survives the call to native
1342 const Register oop_handle_reg = rsi;
1344 __ get_thread(thread);
1347 //
1348 // We immediately shuffle the arguments so that any vm call we have to
1349 // make from here on out (sync slow path, jvmti, etc.) we will have
1350 // captured the oops from our caller and have a valid oopMap for
1351 // them.
1353 // -----------------
1354 // The Grand Shuffle
1355 //
1356 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1357 // and, if static, the class mirror instead of a receiver. This pretty much
1358 // guarantees that register layout will not match (and x86 doesn't use reg
1359 // parms though amd does). Since the native abi doesn't use register args
1360 // and the java conventions does we don't have to worry about collisions.
1361 // All of our moved are reg->stack or stack->stack.
1362 // We ignore the extra arguments during the shuffle and handle them at the
1363 // last moment. The shuffle is described by the two calling convention
1364 // vectors we have in our possession. We simply walk the java vector to
1365 // get the source locations and the c vector to get the destinations.
1367 int c_arg = method->is_static() ? 2 : 1 ;
1369 // Record rsp-based slot for receiver on stack for non-static methods
1370 int receiver_offset = -1;
1372 // This is a trick. We double the stack slots so we can claim
1373 // the oops in the caller's frame. Since we are sure to have
1374 // more args than the caller doubling is enough to make
1375 // sure we can capture all the incoming oop args from the
1376 // caller.
1377 //
1378 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1380 // Mark location of rbp,
1381 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1383 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1384 // Are free to temporaries if we have to do stack to steck moves.
1385 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1387 for (i = 0; i < total_in_args ; i++, c_arg++ ) {
1388 switch (in_sig_bt[i]) {
1389 case T_ARRAY:
1390 case T_OBJECT:
1391 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1392 ((i == 0) && (!is_static)),
1393 &receiver_offset);
1394 break;
1395 case T_VOID:
1396 break;
1398 case T_FLOAT:
1399 float_move(masm, in_regs[i], out_regs[c_arg]);
1400 break;
1402 case T_DOUBLE:
1403 assert( i + 1 < total_in_args &&
1404 in_sig_bt[i + 1] == T_VOID &&
1405 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1406 double_move(masm, in_regs[i], out_regs[c_arg]);
1407 break;
1409 case T_LONG :
1410 long_move(masm, in_regs[i], out_regs[c_arg]);
1411 break;
1413 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1415 default:
1416 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1417 }
1418 }
1420 // Pre-load a static method's oop into rsi. Used both by locking code and
1421 // the normal JNI call code.
1422 if (method->is_static()) {
1424 // load opp into a register
1425 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1427 // Now handlize the static class mirror it's known not-null.
1428 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1429 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1431 // Now get the handle
1432 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1433 // store the klass handle as second argument
1434 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1435 }
1437 // Change state to native (we save the return address in the thread, since it might not
1438 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1439 // points into the right code segment. It does not have to be the correct return pc.
1440 // We use the same pc/oopMap repeatedly when we call out
1442 intptr_t the_pc = (intptr_t) __ pc();
1443 oop_maps->add_gc_map(the_pc - start, map);
1445 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1448 // We have all of the arguments setup at this point. We must not touch any register
1449 // argument registers at this point (what if we save/restore them there are no oop?
1451 {
1452 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1453 __ movoop(rax, JNIHandles::make_local(method()));
1454 __ call_VM_leaf(
1455 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1456 thread, rax);
1457 }
1459 // RedefineClasses() tracing support for obsolete method entry
1460 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1461 __ movoop(rax, JNIHandles::make_local(method()));
1462 __ call_VM_leaf(
1463 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1464 thread, rax);
1465 }
1467 // These are register definitions we need for locking/unlocking
1468 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1469 const Register obj_reg = rcx; // Will contain the oop
1470 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1472 Label slow_path_lock;
1473 Label lock_done;
1475 // Lock a synchronized method
1476 if (method->is_synchronized()) {
1479 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1481 // Get the handle (the 2nd argument)
1482 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1484 // Get address of the box
1486 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1488 // Load the oop from the handle
1489 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1491 if (UseBiasedLocking) {
1492 // Note that oop_handle_reg is trashed during this call
1493 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1494 }
1496 // Load immediate 1 into swap_reg %rax,
1497 __ movptr(swap_reg, 1);
1499 // Load (object->mark() | 1) into swap_reg %rax,
1500 __ orptr(swap_reg, Address(obj_reg, 0));
1502 // Save (object->mark() | 1) into BasicLock's displaced header
1503 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1505 if (os::is_MP()) {
1506 __ lock();
1507 }
1509 // src -> dest iff dest == rax, else rax, <- dest
1510 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1511 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1512 __ jcc(Assembler::equal, lock_done);
1514 // Test if the oopMark is an obvious stack pointer, i.e.,
1515 // 1) (mark & 3) == 0, and
1516 // 2) rsp <= mark < mark + os::pagesize()
1517 // These 3 tests can be done by evaluating the following
1518 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1519 // assuming both stack pointer and pagesize have their
1520 // least significant 2 bits clear.
1521 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1523 __ subptr(swap_reg, rsp);
1524 __ andptr(swap_reg, 3 - os::vm_page_size());
1526 // Save the test result, for recursive case, the result is zero
1527 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1528 __ jcc(Assembler::notEqual, slow_path_lock);
1529 // Slow path will re-enter here
1530 __ bind(lock_done);
1532 if (UseBiasedLocking) {
1533 // Re-fetch oop_handle_reg as we trashed it above
1534 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1535 }
1536 }
1539 // Finally just about ready to make the JNI call
1542 // get JNIEnv* which is first argument to native
1544 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1545 __ movptr(Address(rsp, 0), rdx);
1547 // Now set thread in native
1548 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1550 __ call(RuntimeAddress(method->native_function()));
1552 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1553 // arguments off of the stack. We could just re-adjust the stack pointer here
1554 // and continue to do SP relative addressing but we instead switch to FP
1555 // relative addressing.
1557 // Unpack native results.
1558 switch (ret_type) {
1559 case T_BOOLEAN: __ c2bool(rax); break;
1560 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1561 case T_BYTE : __ sign_extend_byte (rax); break;
1562 case T_SHORT : __ sign_extend_short(rax); break;
1563 case T_INT : /* nothing to do */ break;
1564 case T_DOUBLE :
1565 case T_FLOAT :
1566 // Result is in st0 we'll save as needed
1567 break;
1568 case T_ARRAY: // Really a handle
1569 case T_OBJECT: // Really a handle
1570 break; // can't de-handlize until after safepoint check
1571 case T_VOID: break;
1572 case T_LONG: break;
1573 default : ShouldNotReachHere();
1574 }
1576 // Switch thread to "native transition" state before reading the synchronization state.
1577 // This additional state is necessary because reading and testing the synchronization
1578 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1579 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1580 // VM thread changes sync state to synchronizing and suspends threads for GC.
1581 // Thread A is resumed to finish this native method, but doesn't block here since it
1582 // didn't see any synchronization is progress, and escapes.
1583 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1585 if(os::is_MP()) {
1586 if (UseMembar) {
1587 // Force this write out before the read below
1588 __ membar(Assembler::Membar_mask_bits(
1589 Assembler::LoadLoad | Assembler::LoadStore |
1590 Assembler::StoreLoad | Assembler::StoreStore));
1591 } else {
1592 // Write serialization page so VM thread can do a pseudo remote membar.
1593 // We use the current thread pointer to calculate a thread specific
1594 // offset to write to within the page. This minimizes bus traffic
1595 // due to cache line collision.
1596 __ serialize_memory(thread, rcx);
1597 }
1598 }
1600 if (AlwaysRestoreFPU) {
1601 // Make sure the control word is correct.
1602 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
1603 }
1605 // check for safepoint operation in progress and/or pending suspend requests
1606 { Label Continue;
1608 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1609 SafepointSynchronize::_not_synchronized);
1611 Label L;
1612 __ jcc(Assembler::notEqual, L);
1613 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1614 __ jcc(Assembler::equal, Continue);
1615 __ bind(L);
1617 // Don't use call_VM as it will see a possible pending exception and forward it
1618 // and never return here preventing us from clearing _last_native_pc down below.
1619 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1620 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1621 // by hand.
1622 //
1623 save_native_result(masm, ret_type, stack_slots);
1624 __ push(thread);
1625 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1626 JavaThread::check_special_condition_for_native_trans)));
1627 __ increment(rsp, wordSize);
1628 // Restore any method result value
1629 restore_native_result(masm, ret_type, stack_slots);
1631 __ bind(Continue);
1632 }
1634 // change thread state
1635 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1637 Label reguard;
1638 Label reguard_done;
1639 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1640 __ jcc(Assembler::equal, reguard);
1642 // slow path reguard re-enters here
1643 __ bind(reguard_done);
1645 // Handle possible exception (will unlock if necessary)
1647 // native result if any is live
1649 // Unlock
1650 Label slow_path_unlock;
1651 Label unlock_done;
1652 if (method->is_synchronized()) {
1654 Label done;
1656 // Get locked oop from the handle we passed to jni
1657 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1659 if (UseBiasedLocking) {
1660 __ biased_locking_exit(obj_reg, rbx, done);
1661 }
1663 // Simple recursive lock?
1665 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
1666 __ jcc(Assembler::equal, done);
1668 // Must save rax, if if it is live now because cmpxchg must use it
1669 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1670 save_native_result(masm, ret_type, stack_slots);
1671 }
1673 // get old displaced header
1674 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1676 // get address of the stack lock
1677 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1679 // Atomic swap old header if oop still contains the stack lock
1680 if (os::is_MP()) {
1681 __ lock();
1682 }
1684 // src -> dest iff dest == rax, else rax, <- dest
1685 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1686 __ cmpxchgptr(rbx, Address(obj_reg, 0));
1687 __ jcc(Assembler::notEqual, slow_path_unlock);
1689 // slow path re-enters here
1690 __ bind(unlock_done);
1691 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1692 restore_native_result(masm, ret_type, stack_slots);
1693 }
1695 __ bind(done);
1697 }
1699 {
1700 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1701 // Tell dtrace about this method exit
1702 save_native_result(masm, ret_type, stack_slots);
1703 __ movoop(rax, JNIHandles::make_local(method()));
1704 __ call_VM_leaf(
1705 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1706 thread, rax);
1707 restore_native_result(masm, ret_type, stack_slots);
1708 }
1710 // We can finally stop using that last_Java_frame we setup ages ago
1712 __ reset_last_Java_frame(thread, false, true);
1714 // Unpack oop result
1715 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1716 Label L;
1717 __ cmpptr(rax, (int32_t)NULL_WORD);
1718 __ jcc(Assembler::equal, L);
1719 __ movptr(rax, Address(rax, 0));
1720 __ bind(L);
1721 __ verify_oop(rax);
1722 }
1724 // reset handle block
1725 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1727 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
1729 // Any exception pending?
1730 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1731 __ jcc(Assembler::notEqual, exception_pending);
1734 // no exception, we're almost done
1736 // check that only result value is on FPU stack
1737 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1739 // Fixup floating pointer results so that result looks like a return from a compiled method
1740 if (ret_type == T_FLOAT) {
1741 if (UseSSE >= 1) {
1742 // Pop st0 and store as float and reload into xmm register
1743 __ fstp_s(Address(rbp, -4));
1744 __ movflt(xmm0, Address(rbp, -4));
1745 }
1746 } else if (ret_type == T_DOUBLE) {
1747 if (UseSSE >= 2) {
1748 // Pop st0 and store as double and reload into xmm register
1749 __ fstp_d(Address(rbp, -8));
1750 __ movdbl(xmm0, Address(rbp, -8));
1751 }
1752 }
1754 // Return
1756 __ leave();
1757 __ ret(0);
1759 // Unexpected paths are out of line and go here
1761 // Slow path locking & unlocking
1762 if (method->is_synchronized()) {
1764 // BEGIN Slow path lock
1766 __ bind(slow_path_lock);
1768 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1769 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1770 __ push(thread);
1771 __ push(lock_reg);
1772 __ push(obj_reg);
1773 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1774 __ addptr(rsp, 3*wordSize);
1776 #ifdef ASSERT
1777 { Label L;
1778 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1779 __ jcc(Assembler::equal, L);
1780 __ stop("no pending exception allowed on exit from monitorenter");
1781 __ bind(L);
1782 }
1783 #endif
1784 __ jmp(lock_done);
1786 // END Slow path lock
1788 // BEGIN Slow path unlock
1789 __ bind(slow_path_unlock);
1791 // Slow path unlock
1793 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1794 save_native_result(masm, ret_type, stack_slots);
1795 }
1796 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1798 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1799 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1802 // should be a peal
1803 // +wordSize because of the push above
1804 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1805 __ push(rax);
1807 __ push(obj_reg);
1808 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1809 __ addptr(rsp, 2*wordSize);
1810 #ifdef ASSERT
1811 {
1812 Label L;
1813 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1814 __ jcc(Assembler::equal, L);
1815 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1816 __ bind(L);
1817 }
1818 #endif /* ASSERT */
1820 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1822 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1823 restore_native_result(masm, ret_type, stack_slots);
1824 }
1825 __ jmp(unlock_done);
1826 // END Slow path unlock
1828 }
1830 // SLOW PATH Reguard the stack if needed
1832 __ bind(reguard);
1833 save_native_result(masm, ret_type, stack_slots);
1834 {
1835 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1836 }
1837 restore_native_result(masm, ret_type, stack_slots);
1838 __ jmp(reguard_done);
1841 // BEGIN EXCEPTION PROCESSING
1843 // Forward the exception
1844 __ bind(exception_pending);
1846 // remove possible return value from FPU register stack
1847 __ empty_FPU_stack();
1849 // pop our frame
1850 __ leave();
1851 // and forward the exception
1852 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1854 __ flush();
1856 nmethod *nm = nmethod::new_native_nmethod(method,
1857 masm->code(),
1858 vep_offset,
1859 frame_complete,
1860 stack_slots / VMRegImpl::slots_per_word,
1861 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1862 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1863 oop_maps);
1864 return nm;
1866 }
1868 #ifdef HAVE_DTRACE_H
1869 // ---------------------------------------------------------------------------
1870 // Generate a dtrace nmethod for a given signature. The method takes arguments
1871 // in the Java compiled code convention, marshals them to the native
1872 // abi and then leaves nops at the position you would expect to call a native
1873 // function. When the probe is enabled the nops are replaced with a trap
1874 // instruction that dtrace inserts and the trace will cause a notification
1875 // to dtrace.
1876 //
1877 // The probes are only able to take primitive types and java/lang/String as
1878 // arguments. No other java types are allowed. Strings are converted to utf8
1879 // strings so that from dtrace point of view java strings are converted to C
1880 // strings. There is an arbitrary fixed limit on the total space that a method
1881 // can use for converting the strings. (256 chars per string in the signature).
1882 // So any java string larger then this is truncated.
1884 nmethod *SharedRuntime::generate_dtrace_nmethod(
1885 MacroAssembler *masm, methodHandle method) {
1887 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1888 // be single threaded in this method.
1889 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1891 // Fill in the signature array, for the calling-convention call.
1892 int total_args_passed = method->size_of_parameters();
1894 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1895 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1897 // The signature we are going to use for the trap that dtrace will see
1898 // java/lang/String is converted. We drop "this" and any other object
1899 // is converted to NULL. (A one-slot java/lang/Long object reference
1900 // is converted to a two-slot long, which is why we double the allocation).
1901 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1902 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1904 int i=0;
1905 int total_strings = 0;
1906 int first_arg_to_pass = 0;
1907 int total_c_args = 0;
1909 if( !method->is_static() ) { // Pass in receiver first
1910 in_sig_bt[i++] = T_OBJECT;
1911 first_arg_to_pass = 1;
1912 }
1914 // We need to convert the java args to where a native (non-jni) function
1915 // would expect them. To figure out where they go we convert the java
1916 // signature to a C signature.
1918 SignatureStream ss(method->signature());
1919 for ( ; !ss.at_return_type(); ss.next()) {
1920 BasicType bt = ss.type();
1921 in_sig_bt[i++] = bt; // Collect remaining bits of signature
1922 out_sig_bt[total_c_args++] = bt;
1923 if( bt == T_OBJECT) {
1924 Symbol* s = ss.as_symbol_or_null(); // symbol is created
1925 if (s == vmSymbols::java_lang_String()) {
1926 total_strings++;
1927 out_sig_bt[total_c_args-1] = T_ADDRESS;
1928 } else if (s == vmSymbols::java_lang_Boolean() ||
1929 s == vmSymbols::java_lang_Character() ||
1930 s == vmSymbols::java_lang_Byte() ||
1931 s == vmSymbols::java_lang_Short() ||
1932 s == vmSymbols::java_lang_Integer() ||
1933 s == vmSymbols::java_lang_Float()) {
1934 out_sig_bt[total_c_args-1] = T_INT;
1935 } else if (s == vmSymbols::java_lang_Long() ||
1936 s == vmSymbols::java_lang_Double()) {
1937 out_sig_bt[total_c_args-1] = T_LONG;
1938 out_sig_bt[total_c_args++] = T_VOID;
1939 }
1940 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
1941 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
1942 out_sig_bt[total_c_args++] = T_VOID;
1943 }
1944 }
1946 assert(i==total_args_passed, "validly parsed signature");
1948 // Now get the compiled-Java layout as input arguments
1949 int comp_args_on_stack;
1950 comp_args_on_stack = SharedRuntime::java_calling_convention(
1951 in_sig_bt, in_regs, total_args_passed, false);
1953 // Now figure out where the args must be stored and how much stack space
1954 // they require (neglecting out_preserve_stack_slots).
1956 int out_arg_slots;
1957 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1959 // Calculate the total number of stack slots we will need.
1961 // First count the abi requirement plus all of the outgoing args
1962 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1964 // Now space for the string(s) we must convert
1966 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
1967 for (i = 0; i < total_strings ; i++) {
1968 string_locs[i] = stack_slots;
1969 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
1970 }
1972 // + 2 for return address (which we own) and saved rbp,
1974 stack_slots += 2;
1976 // Ok The space we have allocated will look like:
1977 //
1978 //
1979 // FP-> | |
1980 // |---------------------|
1981 // | string[n] |
1982 // |---------------------| <- string_locs[n]
1983 // | string[n-1] |
1984 // |---------------------| <- string_locs[n-1]
1985 // | ... |
1986 // | ... |
1987 // |---------------------| <- string_locs[1]
1988 // | string[0] |
1989 // |---------------------| <- string_locs[0]
1990 // | outbound memory |
1991 // | based arguments |
1992 // | |
1993 // |---------------------|
1994 // | |
1995 // SP-> | out_preserved_slots |
1996 //
1997 //
1999 // Now compute actual number of stack words we need rounding to make
2000 // stack properly aligned.
2001 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2003 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2005 intptr_t start = (intptr_t)__ pc();
2007 // First thing make an ic check to see if we should even be here
2009 // We are free to use all registers as temps without saving them and
2010 // restoring them except rbp. rbp, is the only callee save register
2011 // as far as the interpreter and the compiler(s) are concerned.
2013 const Register ic_reg = rax;
2014 const Register receiver = rcx;
2015 Label hit;
2016 Label exception_pending;
2019 __ verify_oop(receiver);
2020 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2021 __ jcc(Assembler::equal, hit);
2023 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2025 // verified entry must be aligned for code patching.
2026 // and the first 5 bytes must be in the same cache line
2027 // if we align at 8 then we will be sure 5 bytes are in the same line
2028 __ align(8);
2030 __ bind(hit);
2032 int vep_offset = ((intptr_t)__ pc()) - start;
2035 // The instruction at the verified entry point must be 5 bytes or longer
2036 // because it can be patched on the fly by make_non_entrant. The stack bang
2037 // instruction fits that requirement.
2039 // Generate stack overflow check
2042 if (UseStackBanging) {
2043 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2044 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2045 } else {
2046 __ movl(rax, stack_size);
2047 __ bang_stack_size(rax, rbx);
2048 }
2049 } else {
2050 // need a 5 byte instruction to allow MT safe patching to non-entrant
2051 __ fat_nop();
2052 }
2054 assert(((int)__ pc() - start - vep_offset) >= 5,
2055 "valid size for make_non_entrant");
2057 // Generate a new frame for the wrapper.
2058 __ enter();
2060 // -2 because return address is already present and so is saved rbp,
2061 if (stack_size - 2*wordSize != 0) {
2062 __ subl(rsp, stack_size - 2*wordSize);
2063 }
2065 // Frame is now completed as far a size and linkage.
2067 int frame_complete = ((intptr_t)__ pc()) - start;
2069 // First thing we do store all the args as if we are doing the call.
2070 // Since the C calling convention is stack based that ensures that
2071 // all the Java register args are stored before we need to convert any
2072 // string we might have.
2074 int sid = 0;
2075 int c_arg, j_arg;
2076 int string_reg = 0;
2078 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2079 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2081 VMRegPair src = in_regs[j_arg];
2082 VMRegPair dst = out_regs[c_arg];
2083 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2084 "stack based abi assumed");
2086 switch (in_sig_bt[j_arg]) {
2088 case T_ARRAY:
2089 case T_OBJECT:
2090 if (out_sig_bt[c_arg] == T_ADDRESS) {
2091 // Any register based arg for a java string after the first
2092 // will be destroyed by the call to get_utf so we store
2093 // the original value in the location the utf string address
2094 // will eventually be stored.
2095 if (src.first()->is_reg()) {
2096 if (string_reg++ != 0) {
2097 simple_move32(masm, src, dst);
2098 }
2099 }
2100 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2101 // need to unbox a one-word value
2102 Register in_reg = rax;
2103 if ( src.first()->is_reg() ) {
2104 in_reg = src.first()->as_Register();
2105 } else {
2106 simple_move32(masm, src, in_reg->as_VMReg());
2107 }
2108 Label skipUnbox;
2109 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2110 if ( out_sig_bt[c_arg] == T_LONG ) {
2111 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2112 }
2113 __ testl(in_reg, in_reg);
2114 __ jcc(Assembler::zero, skipUnbox);
2115 assert(dst.first()->is_stack() &&
2116 (!dst.second()->is_valid() || dst.second()->is_stack()),
2117 "value(s) must go into stack slots");
2119 BasicType bt = out_sig_bt[c_arg];
2120 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2121 if ( bt == T_LONG ) {
2122 __ movl(rbx, Address(in_reg,
2123 box_offset + VMRegImpl::stack_slot_size));
2124 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2125 }
2126 __ movl(in_reg, Address(in_reg, box_offset));
2127 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2128 __ bind(skipUnbox);
2129 } else {
2130 // Convert the arg to NULL
2131 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2132 }
2133 if (out_sig_bt[c_arg] == T_LONG) {
2134 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2135 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2136 }
2137 break;
2139 case T_VOID:
2140 break;
2142 case T_FLOAT:
2143 float_move(masm, src, dst);
2144 break;
2146 case T_DOUBLE:
2147 assert( j_arg + 1 < total_args_passed &&
2148 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2149 double_move(masm, src, dst);
2150 break;
2152 case T_LONG :
2153 long_move(masm, src, dst);
2154 break;
2156 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2158 default:
2159 simple_move32(masm, src, dst);
2160 }
2161 }
2163 // Now we must convert any string we have to utf8
2164 //
2166 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2167 sid < total_strings ; j_arg++, c_arg++ ) {
2169 if (out_sig_bt[c_arg] == T_ADDRESS) {
2171 Address utf8_addr = Address(
2172 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2173 __ leal(rax, utf8_addr);
2175 // The first string we find might still be in the original java arg
2176 // register
2177 VMReg orig_loc = in_regs[j_arg].first();
2178 Register string_oop;
2180 // This is where the argument will eventually reside
2181 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2183 if (sid == 1 && orig_loc->is_reg()) {
2184 string_oop = orig_loc->as_Register();
2185 assert(string_oop != rax, "smashed arg");
2186 } else {
2188 if (orig_loc->is_reg()) {
2189 // Get the copy of the jls object
2190 __ movl(rcx, dest);
2191 } else {
2192 // arg is still in the original location
2193 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2194 }
2195 string_oop = rcx;
2197 }
2198 Label nullString;
2199 __ movl(dest, NULL_WORD);
2200 __ testl(string_oop, string_oop);
2201 __ jcc(Assembler::zero, nullString);
2203 // Now we can store the address of the utf string as the argument
2204 __ movl(dest, rax);
2206 // And do the conversion
2207 __ call_VM_leaf(CAST_FROM_FN_PTR(
2208 address, SharedRuntime::get_utf), string_oop, rax);
2209 __ bind(nullString);
2210 }
2212 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2213 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2214 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2215 }
2216 }
2219 // Ok now we are done. Need to place the nop that dtrace wants in order to
2220 // patch in the trap
2222 int patch_offset = ((intptr_t)__ pc()) - start;
2224 __ nop();
2227 // Return
2229 __ leave();
2230 __ ret(0);
2232 __ flush();
2234 nmethod *nm = nmethod::new_dtrace_nmethod(
2235 method, masm->code(), vep_offset, patch_offset, frame_complete,
2236 stack_slots / VMRegImpl::slots_per_word);
2237 return nm;
2239 }
2241 #endif // HAVE_DTRACE_H
2243 // this function returns the adjust size (in number of words) to a c2i adapter
2244 // activation for use during deoptimization
2245 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2246 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2247 }
2250 uint SharedRuntime::out_preserve_stack_slots() {
2251 return 0;
2252 }
2255 //------------------------------generate_deopt_blob----------------------------
2256 void SharedRuntime::generate_deopt_blob() {
2257 // allocate space for the code
2258 ResourceMark rm;
2259 // setup code generation tools
2260 CodeBuffer buffer("deopt_blob", 1024, 1024);
2261 MacroAssembler* masm = new MacroAssembler(&buffer);
2262 int frame_size_in_words;
2263 OopMap* map = NULL;
2264 // Account for the extra args we place on the stack
2265 // by the time we call fetch_unroll_info
2266 const int additional_words = 2; // deopt kind, thread
2268 OopMapSet *oop_maps = new OopMapSet();
2270 // -------------
2271 // This code enters when returning to a de-optimized nmethod. A return
2272 // address has been pushed on the the stack, and return values are in
2273 // registers.
2274 // If we are doing a normal deopt then we were called from the patched
2275 // nmethod from the point we returned to the nmethod. So the return
2276 // address on the stack is wrong by NativeCall::instruction_size
2277 // We will adjust the value to it looks like we have the original return
2278 // address on the stack (like when we eagerly deoptimized).
2279 // In the case of an exception pending with deoptimized then we enter
2280 // with a return address on the stack that points after the call we patched
2281 // into the exception handler. We have the following register state:
2282 // rax,: exception
2283 // rbx,: exception handler
2284 // rdx: throwing pc
2285 // So in this case we simply jam rdx into the useless return address and
2286 // the stack looks just like we want.
2287 //
2288 // At this point we need to de-opt. We save the argument return
2289 // registers. We call the first C routine, fetch_unroll_info(). This
2290 // routine captures the return values and returns a structure which
2291 // describes the current frame size and the sizes of all replacement frames.
2292 // The current frame is compiled code and may contain many inlined
2293 // functions, each with their own JVM state. We pop the current frame, then
2294 // push all the new frames. Then we call the C routine unpack_frames() to
2295 // populate these frames. Finally unpack_frames() returns us the new target
2296 // address. Notice that callee-save registers are BLOWN here; they have
2297 // already been captured in the vframeArray at the time the return PC was
2298 // patched.
2299 address start = __ pc();
2300 Label cont;
2302 // Prolog for non exception case!
2304 // Save everything in sight.
2306 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2307 // Normal deoptimization
2308 __ push(Deoptimization::Unpack_deopt);
2309 __ jmp(cont);
2311 int reexecute_offset = __ pc() - start;
2313 // Reexecute case
2314 // return address is the pc describes what bci to do re-execute at
2316 // No need to update map as each call to save_live_registers will produce identical oopmap
2317 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2319 __ push(Deoptimization::Unpack_reexecute);
2320 __ jmp(cont);
2322 int exception_offset = __ pc() - start;
2324 // Prolog for exception case
2326 // all registers are dead at this entry point, except for rax, and
2327 // rdx which contain the exception oop and exception pc
2328 // respectively. Set them in TLS and fall thru to the
2329 // unpack_with_exception_in_tls entry point.
2331 __ get_thread(rdi);
2332 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2333 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2335 int exception_in_tls_offset = __ pc() - start;
2337 // new implementation because exception oop is now passed in JavaThread
2339 // Prolog for exception case
2340 // All registers must be preserved because they might be used by LinearScan
2341 // Exceptiop oop and throwing PC are passed in JavaThread
2342 // tos: stack at point of call to method that threw the exception (i.e. only
2343 // args are on the stack, no return address)
2345 // make room on stack for the return address
2346 // It will be patched later with the throwing pc. The correct value is not
2347 // available now because loading it from memory would destroy registers.
2348 __ push(0);
2350 // Save everything in sight.
2352 // No need to update map as each call to save_live_registers will produce identical oopmap
2353 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2355 // Now it is safe to overwrite any register
2357 // store the correct deoptimization type
2358 __ push(Deoptimization::Unpack_exception);
2360 // load throwing pc from JavaThread and patch it as the return address
2361 // of the current frame. Then clear the field in JavaThread
2362 __ get_thread(rdi);
2363 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2364 __ movptr(Address(rbp, wordSize), rdx);
2365 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2367 #ifdef ASSERT
2368 // verify that there is really an exception oop in JavaThread
2369 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2370 __ verify_oop(rax);
2372 // verify that there is no pending exception
2373 Label no_pending_exception;
2374 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2375 __ testptr(rax, rax);
2376 __ jcc(Assembler::zero, no_pending_exception);
2377 __ stop("must not have pending exception here");
2378 __ bind(no_pending_exception);
2379 #endif
2381 __ bind(cont);
2383 // Compiled code leaves the floating point stack dirty, empty it.
2384 __ empty_FPU_stack();
2387 // Call C code. Need thread and this frame, but NOT official VM entry
2388 // crud. We cannot block on this call, no GC can happen.
2389 __ get_thread(rcx);
2390 __ push(rcx);
2391 // fetch_unroll_info needs to call last_java_frame()
2392 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2394 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2396 // Need to have an oopmap that tells fetch_unroll_info where to
2397 // find any register it might need.
2399 oop_maps->add_gc_map( __ pc()-start, map);
2401 // Discard arg to fetch_unroll_info
2402 __ pop(rcx);
2404 __ get_thread(rcx);
2405 __ reset_last_Java_frame(rcx, false, false);
2407 // Load UnrollBlock into EDI
2408 __ mov(rdi, rax);
2410 // Move the unpack kind to a safe place in the UnrollBlock because
2411 // we are very short of registers
2413 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2414 // retrieve the deopt kind from where we left it.
2415 __ pop(rax);
2416 __ movl(unpack_kind, rax); // save the unpack_kind value
2418 Label noException;
2419 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2420 __ jcc(Assembler::notEqual, noException);
2421 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2422 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2423 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2424 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2426 __ verify_oop(rax);
2428 // Overwrite the result registers with the exception results.
2429 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2430 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2432 __ bind(noException);
2434 // Stack is back to only having register save data on the stack.
2435 // Now restore the result registers. Everything else is either dead or captured
2436 // in the vframeArray.
2438 RegisterSaver::restore_result_registers(masm);
2440 // Non standard control word may be leaked out through a safepoint blob, and we can
2441 // deopt at a poll point with the non standard control word. However, we should make
2442 // sure the control word is correct after restore_result_registers.
2443 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2445 // All of the register save area has been popped of the stack. Only the
2446 // return address remains.
2448 // Pop all the frames we must move/replace.
2449 //
2450 // Frame picture (youngest to oldest)
2451 // 1: self-frame (no frame link)
2452 // 2: deopting frame (no frame link)
2453 // 3: caller of deopting frame (could be compiled/interpreted).
2454 //
2455 // Note: by leaving the return address of self-frame on the stack
2456 // and using the size of frame 2 to adjust the stack
2457 // when we are done the return to frame 3 will still be on the stack.
2459 // Pop deoptimized frame
2460 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2462 // sp should be pointing at the return address to the caller (3)
2464 // Stack bang to make sure there's enough room for these interpreter frames.
2465 if (UseStackBanging) {
2466 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2467 __ bang_stack_size(rbx, rcx);
2468 }
2470 // Load array of frame pcs into ECX
2471 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2473 __ pop(rsi); // trash the old pc
2475 // Load array of frame sizes into ESI
2476 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2478 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2480 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2481 __ movl(counter, rbx);
2483 // Pick up the initial fp we should save
2484 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2486 // Now adjust the caller's stack to make up for the extra locals
2487 // but record the original sp so that we can save it in the skeletal interpreter
2488 // frame and the stack walking of interpreter_sender will get the unextended sp
2489 // value and not the "real" sp value.
2491 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2492 __ movptr(sp_temp, rsp);
2493 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2494 __ subptr(rsp, rbx);
2496 // Push interpreter frames in a loop
2497 Label loop;
2498 __ bind(loop);
2499 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2500 #ifdef CC_INTERP
2501 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2502 #ifdef ASSERT
2503 __ push(0xDEADDEAD); // Make a recognizable pattern
2504 __ push(0xDEADDEAD);
2505 #else /* ASSERT */
2506 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2507 #endif /* ASSERT */
2508 #else /* CC_INTERP */
2509 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2510 #endif /* CC_INTERP */
2511 __ pushptr(Address(rcx, 0)); // save return address
2512 __ enter(); // save old & set new rbp,
2513 __ subptr(rsp, rbx); // Prolog!
2514 __ movptr(rbx, sp_temp); // sender's sp
2515 #ifdef CC_INTERP
2516 __ movptr(Address(rbp,
2517 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2518 rbx); // Make it walkable
2519 #else /* CC_INTERP */
2520 // This value is corrected by layout_activation_impl
2521 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2522 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2523 #endif /* CC_INTERP */
2524 __ movptr(sp_temp, rsp); // pass to next frame
2525 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2526 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2527 __ decrementl(counter); // decrement counter
2528 __ jcc(Assembler::notZero, loop);
2529 __ pushptr(Address(rcx, 0)); // save final return address
2531 // Re-push self-frame
2532 __ enter(); // save old & set new rbp,
2534 // Return address and rbp, are in place
2535 // We'll push additional args later. Just allocate a full sized
2536 // register save area
2537 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2539 // Restore frame locals after moving the frame
2540 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2541 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2542 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2543 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2544 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2546 // Set up the args to unpack_frame
2548 __ pushl(unpack_kind); // get the unpack_kind value
2549 __ get_thread(rcx);
2550 __ push(rcx);
2552 // set last_Java_sp, last_Java_fp
2553 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2555 // Call C code. Need thread but NOT official VM entry
2556 // crud. We cannot block on this call, no GC can happen. Call should
2557 // restore return values to their stack-slots with the new SP.
2558 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2559 // Set an oopmap for the call site
2560 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2562 // rax, contains the return result type
2563 __ push(rax);
2565 __ get_thread(rcx);
2566 __ reset_last_Java_frame(rcx, false, false);
2568 // Collect return values
2569 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2570 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2572 // Clear floating point stack before returning to interpreter
2573 __ empty_FPU_stack();
2575 // Check if we should push the float or double return value.
2576 Label results_done, yes_double_value;
2577 __ cmpl(Address(rsp, 0), T_DOUBLE);
2578 __ jcc (Assembler::zero, yes_double_value);
2579 __ cmpl(Address(rsp, 0), T_FLOAT);
2580 __ jcc (Assembler::notZero, results_done);
2582 // return float value as expected by interpreter
2583 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2584 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2585 __ jmp(results_done);
2587 // return double value as expected by interpreter
2588 __ bind(yes_double_value);
2589 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2590 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2592 __ bind(results_done);
2594 // Pop self-frame.
2595 __ leave(); // Epilog!
2597 // Jump to interpreter
2598 __ ret(0);
2600 // -------------
2601 // make sure all code is generated
2602 masm->flush();
2604 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2605 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2606 }
2609 #ifdef COMPILER2
2610 //------------------------------generate_uncommon_trap_blob--------------------
2611 void SharedRuntime::generate_uncommon_trap_blob() {
2612 // allocate space for the code
2613 ResourceMark rm;
2614 // setup code generation tools
2615 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2616 MacroAssembler* masm = new MacroAssembler(&buffer);
2618 enum frame_layout {
2619 arg0_off, // thread sp + 0 // Arg location for
2620 arg1_off, // unloaded_class_index sp + 1 // calling C
2621 // The frame sender code expects that rbp will be in the "natural" place and
2622 // will override any oopMap setting for it. We must therefore force the layout
2623 // so that it agrees with the frame sender code.
2624 rbp_off, // callee saved register sp + 2
2625 return_off, // slot for return address sp + 3
2626 framesize
2627 };
2629 address start = __ pc();
2630 // Push self-frame.
2631 __ subptr(rsp, return_off*wordSize); // Epilog!
2633 // rbp, is an implicitly saved callee saved register (i.e. the calling
2634 // convention will save restore it in prolog/epilog) Other than that
2635 // there are no callee save registers no that adapter frames are gone.
2636 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2638 // Clear the floating point exception stack
2639 __ empty_FPU_stack();
2641 // set last_Java_sp
2642 __ get_thread(rdx);
2643 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2645 // Call C code. Need thread but NOT official VM entry
2646 // crud. We cannot block on this call, no GC can happen. Call should
2647 // capture callee-saved registers as well as return values.
2648 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2649 // argument already in ECX
2650 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2651 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2653 // Set an oopmap for the call site
2654 OopMapSet *oop_maps = new OopMapSet();
2655 OopMap* map = new OopMap( framesize, 0 );
2656 // No oopMap for rbp, it is known implicitly
2658 oop_maps->add_gc_map( __ pc()-start, map);
2660 __ get_thread(rcx);
2662 __ reset_last_Java_frame(rcx, false, false);
2664 // Load UnrollBlock into EDI
2665 __ movptr(rdi, rax);
2667 // Pop all the frames we must move/replace.
2668 //
2669 // Frame picture (youngest to oldest)
2670 // 1: self-frame (no frame link)
2671 // 2: deopting frame (no frame link)
2672 // 3: caller of deopting frame (could be compiled/interpreted).
2674 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2675 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2677 // Pop deoptimized frame
2678 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2679 __ addptr(rsp, rcx);
2681 // sp should be pointing at the return address to the caller (3)
2683 // Stack bang to make sure there's enough room for these interpreter frames.
2684 if (UseStackBanging) {
2685 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2686 __ bang_stack_size(rbx, rcx);
2687 }
2690 // Load array of frame pcs into ECX
2691 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2693 __ pop(rsi); // trash the pc
2695 // Load array of frame sizes into ESI
2696 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2698 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2700 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2701 __ movl(counter, rbx);
2703 // Pick up the initial fp we should save
2704 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2706 // Now adjust the caller's stack to make up for the extra locals
2707 // but record the original sp so that we can save it in the skeletal interpreter
2708 // frame and the stack walking of interpreter_sender will get the unextended sp
2709 // value and not the "real" sp value.
2711 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2712 __ movptr(sp_temp, rsp);
2713 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2714 __ subptr(rsp, rbx);
2716 // Push interpreter frames in a loop
2717 Label loop;
2718 __ bind(loop);
2719 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2720 #ifdef CC_INTERP
2721 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2722 #ifdef ASSERT
2723 __ push(0xDEADDEAD); // Make a recognizable pattern
2724 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
2725 #else /* ASSERT */
2726 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2727 #endif /* ASSERT */
2728 #else /* CC_INTERP */
2729 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2730 #endif /* CC_INTERP */
2731 __ pushptr(Address(rcx, 0)); // save return address
2732 __ enter(); // save old & set new rbp,
2733 __ subptr(rsp, rbx); // Prolog!
2734 __ movptr(rbx, sp_temp); // sender's sp
2735 #ifdef CC_INTERP
2736 __ movptr(Address(rbp,
2737 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2738 rbx); // Make it walkable
2739 #else /* CC_INTERP */
2740 // This value is corrected by layout_activation_impl
2741 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2742 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2743 #endif /* CC_INTERP */
2744 __ movptr(sp_temp, rsp); // pass to next frame
2745 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2746 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2747 __ decrementl(counter); // decrement counter
2748 __ jcc(Assembler::notZero, loop);
2749 __ pushptr(Address(rcx, 0)); // save final return address
2751 // Re-push self-frame
2752 __ enter(); // save old & set new rbp,
2753 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2756 // set last_Java_sp, last_Java_fp
2757 __ get_thread(rdi);
2758 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2760 // Call C code. Need thread but NOT official VM entry
2761 // crud. We cannot block on this call, no GC can happen. Call should
2762 // restore return values to their stack-slots with the new SP.
2763 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2764 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2765 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2766 // Set an oopmap for the call site
2767 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2769 __ get_thread(rdi);
2770 __ reset_last_Java_frame(rdi, true, false);
2772 // Pop self-frame.
2773 __ leave(); // Epilog!
2775 // Jump to interpreter
2776 __ ret(0);
2778 // -------------
2779 // make sure all code is generated
2780 masm->flush();
2782 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2783 }
2784 #endif // COMPILER2
2786 //------------------------------generate_handler_blob------
2787 //
2788 // Generate a special Compile2Runtime blob that saves all registers,
2789 // setup oopmap, and calls safepoint code to stop the compiled code for
2790 // a safepoint.
2791 //
2792 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
2794 // Account for thread arg in our frame
2795 const int additional_words = 1;
2796 int frame_size_in_words;
2798 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2800 ResourceMark rm;
2801 OopMapSet *oop_maps = new OopMapSet();
2802 OopMap* map;
2804 // allocate space for the code
2805 // setup code generation tools
2806 CodeBuffer buffer("handler_blob", 1024, 512);
2807 MacroAssembler* masm = new MacroAssembler(&buffer);
2809 const Register java_thread = rdi; // callee-saved for VC++
2810 address start = __ pc();
2811 address call_pc = NULL;
2813 // If cause_return is true we are at a poll_return and there is
2814 // the return address on the stack to the caller on the nmethod
2815 // that is safepoint. We can leave this return on the stack and
2816 // effectively complete the return and safepoint in the caller.
2817 // Otherwise we push space for a return address that the safepoint
2818 // handler will install later to make the stack walking sensible.
2819 if( !cause_return )
2820 __ push(rbx); // Make room for return address (or push it again)
2822 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2824 // The following is basically a call_VM. However, we need the precise
2825 // address of the call in order to generate an oopmap. Hence, we do all the
2826 // work ourselves.
2828 // Push thread argument and setup last_Java_sp
2829 __ get_thread(java_thread);
2830 __ push(java_thread);
2831 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2833 // if this was not a poll_return then we need to correct the return address now.
2834 if( !cause_return ) {
2835 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2836 __ movptr(Address(rbp, wordSize), rax);
2837 }
2839 // do the call
2840 __ call(RuntimeAddress(call_ptr));
2842 // Set an oopmap for the call site. This oopmap will map all
2843 // oop-registers and debug-info registers as callee-saved. This
2844 // will allow deoptimization at this safepoint to find all possible
2845 // debug-info recordings, as well as let GC find all oops.
2847 oop_maps->add_gc_map( __ pc() - start, map);
2849 // Discard arg
2850 __ pop(rcx);
2852 Label noException;
2854 // Clear last_Java_sp again
2855 __ get_thread(java_thread);
2856 __ reset_last_Java_frame(java_thread, false, false);
2858 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2859 __ jcc(Assembler::equal, noException);
2861 // Exception pending
2863 RegisterSaver::restore_live_registers(masm);
2865 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2867 __ bind(noException);
2869 // Normal exit, register restoring and exit
2870 RegisterSaver::restore_live_registers(masm);
2872 __ ret(0);
2874 // make sure all code is generated
2875 masm->flush();
2877 // Fill-out other meta info
2878 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2879 }
2881 //
2882 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2883 //
2884 // Generate a stub that calls into vm to find out the proper destination
2885 // of a java call. All the argument registers are live at this point
2886 // but since this is generic code we don't know what they are and the caller
2887 // must do any gc of the args.
2888 //
2889 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
2890 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2892 // allocate space for the code
2893 ResourceMark rm;
2895 CodeBuffer buffer(name, 1000, 512);
2896 MacroAssembler* masm = new MacroAssembler(&buffer);
2898 int frame_size_words;
2899 enum frame_layout {
2900 thread_off,
2901 extra_words };
2903 OopMapSet *oop_maps = new OopMapSet();
2904 OopMap* map = NULL;
2906 int start = __ offset();
2908 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2910 int frame_complete = __ offset();
2912 const Register thread = rdi;
2913 __ get_thread(rdi);
2915 __ push(thread);
2916 __ set_last_Java_frame(thread, noreg, rbp, NULL);
2918 __ call(RuntimeAddress(destination));
2921 // Set an oopmap for the call site.
2922 // We need this not only for callee-saved registers, but also for volatile
2923 // registers that the compiler might be keeping live across a safepoint.
2925 oop_maps->add_gc_map( __ offset() - start, map);
2927 // rax, contains the address we are going to jump to assuming no exception got installed
2929 __ addptr(rsp, wordSize);
2931 // clear last_Java_sp
2932 __ reset_last_Java_frame(thread, true, false);
2933 // check for pending exceptions
2934 Label pending;
2935 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2936 __ jcc(Assembler::notEqual, pending);
2938 // get the returned methodOop
2939 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
2940 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2942 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2944 RegisterSaver::restore_live_registers(masm);
2946 // We are back the the original state on entry and ready to go.
2948 __ jmp(rax);
2950 // Pending exception after the safepoint
2952 __ bind(pending);
2954 RegisterSaver::restore_live_registers(masm);
2956 // exception pending => remove activation and forward to exception handler
2958 __ get_thread(thread);
2959 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2960 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2961 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2963 // -------------
2964 // make sure all code is generated
2965 masm->flush();
2967 // return the blob
2968 // frame_size_words or bytes??
2969 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2970 }
2972 void SharedRuntime::generate_stubs() {
2974 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
2975 "wrong_method_stub");
2977 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
2978 "ic_miss_stub");
2980 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
2981 "resolve_opt_virtual_call");
2983 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
2984 "resolve_virtual_call");
2986 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
2987 "resolve_static_call");
2989 _polling_page_safepoint_handler_blob =
2990 generate_handler_blob(CAST_FROM_FN_PTR(address,
2991 SafepointSynchronize::handle_polling_page_exception), false);
2993 _polling_page_return_handler_blob =
2994 generate_handler_blob(CAST_FROM_FN_PTR(address,
2995 SafepointSynchronize::handle_polling_page_exception), true);
2997 generate_deopt_blob();
2998 #ifdef COMPILER2
2999 generate_uncommon_trap_blob();
3000 #endif // COMPILER2
3001 }