src/cpu/mips/vm/interpreter_mips.hpp

Thu, 07 Sep 2017 09:12:16 +0800

author
aoqi
date
Thu, 07 Sep 2017 09:12:16 +0800
changeset 6880
52ea28d233d2
parent 1
2d8a650513c2
child 9459
814e9e335067
permissions
-rw-r--r--

#5745 [Code Reorganization] code cleanup and code style fix
This is a huge patch, but only code cleanup, code style fix and useless code deletion are included, for example:
tab -> two spaces, deleted spacees at the end of a line, delete useless comments.

This patch also included:
Declaration and definition of class MacroAssembler is moved from assembler_mips.h/cpp to macroAssembler_mips.h/cpp

     1 /*
     2  * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     8  * published by the Free Software Foundation.
     9  *
    10  * This code is distributed in the hope that it will be useful, but WITHOUT
    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    13  * version 2 for more details (a copy is included in the LICENSE file that
    14  * accompanied this code).
    15  *
    16  * You should have received a copy of the GNU General Public License version
    17  * 2 along with this work; if not, write to the Free Software Foundation,
    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    19  *
    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    23  *
    24  */
    26 #ifndef CPU_MIPS_VM_INTERPRETER_MIPS_HPP
    27 #define CPU_MIPS_VM_INTERPRETER_MIPS_HPP
    29  public:
    31   // Sentinel placed in the code for interpreter returns so
    32   // that i2c adapters and osr code can recognize an interpreter
    33   // return address and convert the return to a specialized
    34   // block of code to handle compiedl return values and cleaning
    35   // the fpu stack.
    36   static const int return_sentinel;
    38   static Address::ScaleFactor stackElementScale() {
    39     return NOT_LP64(Address::times_4) LP64_ONLY(Address::times_8);
    40   }
    42   // Offset from rsp (which points to the last stack element)
    43   static int expr_offset_in_bytes(int i) { return stackElementSize * i; }
    44   // Size of interpreter code.  Increase if too small.  Interpreter will
    45   // fail with a guarantee ("not enough space for interpreter generation");
    46   // if too small.
    47   // Run with +PrintInterpreterSize to get the VM to print out the size.
    48   // Max size with JVMTI and TaggedStackInterpreter
    49   const static int InterpreterCodeSize = 168 * 1024;
    50 #endif // CPU_MIPS_VM_INTERPRETER_MIPS_HPP

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