jdk8-mips64-public/hotspot: src/cpu/x86/vm/templateTable_x86

8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose, phh

     1 /*

     2  * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    20  * or visit www.oracle.com if you need additional information or have any

    21  * questions.

    22  *

    23  */

    25 #ifndef CPU_X86_VM_TEMPLATETABLE_X86_64_HPP

    26 #define CPU_X86_VM_TEMPLATETABLE_X86_64_HPP

    28   static void prepare_invoke(int byte_no,

    29                              Register method,         // linked method (or i-klass)

    30                              Register index = noreg,  // itable index, MethodType, etc.

    31                              Register recv  = noreg,  // if caller wants to see it

    32                              Register flags = noreg   // if caller wants to test it

    33                              );

    34   static void invokevirtual_helper(Register index, Register recv,

    35                                    Register flags);

    36   static void volatile_barrier(Assembler::Membar_mask_bits order_constraint);

    38   // Helpers

    39   static void index_check(Register array, Register index);

    40   static void index_check_without_pop(Register array, Register index);

    42 #endif // CPU_X86_VM_TEMPLATETABLE_X86_64_HPP

src/cpu/x86/vm/templateTable_x86_64.hpp@44ef77ad417c