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src/cpu/sparc/vm/c1_Runtime1_sparc.cpp@44ef77ad417c
src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
Wed, 17 Jun 2015 17:48:25 -0700
- author
- ascarpino
- date
- Wed, 17 Jun 2015 17:48:25 -0700
- changeset 9788
- 44ef77ad417c
- parent 6198
- 55fb97c4c58d
- child 6876
- 710a3c8b516e
- permissions
- -rw-r--r--
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose, phh
1 /*
2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "c1/c1_Defs.hpp"
27 #include "c1/c1_MacroAssembler.hpp"
28 #include "c1/c1_Runtime1.hpp"
29 #include "interpreter/interpreter.hpp"
30 #include "nativeInst_sparc.hpp"
31 #include "oops/compiledICHolder.hpp"
32 #include "oops/oop.inline.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "register_sparc.hpp"
35 #include "runtime/sharedRuntime.hpp"
36 #include "runtime/signature.hpp"
37 #include "runtime/vframeArray.hpp"
38 #include "utilities/macros.hpp"
39 #include "vmreg_sparc.inline.hpp"
40 #if INCLUDE_ALL_GCS
41 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
42 #endif
44 // Implementation of StubAssembler
46 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
47 // for sparc changing the number of arguments doesn't change
48 // anything about the frame size so we'll always lie and claim that
49 // we are only passing 1 argument.
50 set_num_rt_args(1);
52 assert_not_delayed();
53 // bang stack before going to runtime
54 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
55 st(G0, SP, G3_scratch);
57 // debugging support
58 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
60 set_last_Java_frame(SP, noreg);
61 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
62 save_thread(L7_thread_cache);
63 // do the call
64 call(entry_point, relocInfo::runtime_call_type);
65 if (!VerifyThread) {
66 delayed()->mov(G2_thread, O0); // pass thread as first argument
67 } else {
68 delayed()->nop(); // (thread already passed)
69 }
70 int call_offset = offset(); // offset of return address
71 restore_thread(L7_thread_cache);
72 reset_last_Java_frame();
74 // check for pending exceptions
75 { Label L;
76 Address exception_addr(G2_thread, Thread::pending_exception_offset());
77 ld_ptr(exception_addr, Gtemp);
78 br_null_short(Gtemp, pt, L);
79 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
80 st_ptr(G0, vm_result_addr);
81 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
82 st_ptr(G0, vm_result_addr_2);
84 if (frame_size() == no_frame_size) {
85 // we use O7 linkage so that forward_exception_entry has the issuing PC
86 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
87 delayed()->restore();
88 } else if (_stub_id == Runtime1::forward_exception_id) {
89 should_not_reach_here();
90 } else {
91 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
92 jump_to(exc, G4);
93 delayed()->nop();
94 }
95 bind(L);
96 }
98 // get oop result if there is one and reset the value in the thread
99 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
100 get_vm_result (oop_result1);
101 } else {
102 // be a little paranoid and clear the result
103 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
104 st_ptr(G0, vm_result_addr);
105 }
107 // get second result if there is one and reset the value in the thread
108 if (metadata_result->is_valid()) {
109 get_vm_result_2 (metadata_result);
110 } else {
111 // be a little paranoid and clear the result
112 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
113 st_ptr(G0, vm_result_addr_2);
114 }
116 return call_offset;
117 }
120 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
121 // O0 is reserved for the thread
122 mov(arg1, O1);
123 return call_RT(oop_result1, metadata_result, entry, 1);
124 }
127 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
128 // O0 is reserved for the thread
129 mov(arg1, O1);
130 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
131 return call_RT(oop_result1, metadata_result, entry, 2);
132 }
135 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
136 // O0 is reserved for the thread
137 mov(arg1, O1);
138 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
139 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
140 return call_RT(oop_result1, metadata_result, entry, 3);
141 }
144 // Implementation of Runtime1
146 #define __ sasm->
148 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
149 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
150 static int reg_save_size_in_words;
151 static int frame_size_in_bytes = -1;
153 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
154 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
155 "mismatch in calculation");
156 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
157 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
158 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
160 int i;
161 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
162 Register r = as_Register(i);
163 if (r == G1 || r == G3 || r == G4 || r == G5) {
164 int sp_offset = cpu_reg_save_offsets[i];
165 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
166 r->as_VMReg());
167 }
168 }
170 if (save_fpu_registers) {
171 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
172 FloatRegister r = as_FloatRegister(i);
173 int sp_offset = fpu_reg_save_offsets[i];
174 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
175 r->as_VMReg());
176 }
177 }
178 return oop_map;
179 }
181 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
182 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
183 "mismatch in calculation");
184 __ save_frame_c1(frame_size_in_bytes);
186 // Record volatile registers as callee-save values in an OopMap so their save locations will be
187 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
188 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
189 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
190 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
191 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
193 int i;
194 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
195 Register r = as_Register(i);
196 if (r == G1 || r == G3 || r == G4 || r == G5) {
197 int sp_offset = cpu_reg_save_offsets[i];
198 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
199 }
200 }
202 if (save_fpu_registers) {
203 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
204 FloatRegister r = as_FloatRegister(i);
205 int sp_offset = fpu_reg_save_offsets[i];
206 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
207 }
208 }
210 return generate_oop_map(sasm, save_fpu_registers);
211 }
213 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
214 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
215 Register r = as_Register(i);
216 if (r == G1 || r == G3 || r == G4 || r == G5) {
217 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
218 }
219 }
221 if (restore_fpu_registers) {
222 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
223 FloatRegister r = as_FloatRegister(i);
224 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
225 }
226 }
227 }
230 void Runtime1::initialize_pd() {
231 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
232 //
233 // A stub routine will have a frame that is at least large enough to hold
234 // a register window save area (obviously) and the volatile g registers
235 // and floating registers. A user of save_live_registers can have a frame
236 // that has more scratch area in it (although typically they will use L-regs).
237 // in that case the frame will look like this (stack growing down)
238 //
239 // FP -> | |
240 // | scratch mem |
241 // | " " |
242 // --------------
243 // | float regs |
244 // | " " |
245 // ---------------
246 // | G regs |
247 // | " " |
248 // ---------------
249 // | abi reg. |
250 // | window save |
251 // | area |
252 // SP -> ---------------
253 //
254 int i;
255 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
257 // only G int registers are saved explicitly; others are found in register windows
258 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
259 Register r = as_Register(i);
260 if (r == G1 || r == G3 || r == G4 || r == G5) {
261 cpu_reg_save_offsets[i] = sp_offset;
262 sp_offset++;
263 }
264 }
266 // all float registers are saved explicitly
267 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
268 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
269 fpu_reg_save_offsets[i] = sp_offset;
270 sp_offset++;
271 }
272 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
273 // this should match assembler::total_frame_size_in_bytes, which
274 // isn't callable from this context. It's checked by an assert when
275 // it's used though.
276 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
277 }
280 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
281 // make a frame and preserve the caller's caller-save registers
282 OopMap* oop_map = save_live_registers(sasm);
283 int call_offset;
284 if (!has_argument) {
285 call_offset = __ call_RT(noreg, noreg, target);
286 } else {
287 call_offset = __ call_RT(noreg, noreg, target, G4);
288 }
289 OopMapSet* oop_maps = new OopMapSet();
290 oop_maps->add_gc_map(call_offset, oop_map);
292 __ should_not_reach_here();
293 return oop_maps;
294 }
297 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
298 Register arg1, Register arg2, Register arg3) {
299 // make a frame and preserve the caller's caller-save registers
300 OopMap* oop_map = save_live_registers(sasm);
302 int call_offset;
303 if (arg1 == noreg) {
304 call_offset = __ call_RT(result, noreg, target);
305 } else if (arg2 == noreg) {
306 call_offset = __ call_RT(result, noreg, target, arg1);
307 } else if (arg3 == noreg) {
308 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
309 } else {
310 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
311 }
312 OopMapSet* oop_maps = NULL;
314 oop_maps = new OopMapSet();
315 oop_maps->add_gc_map(call_offset, oop_map);
316 restore_live_registers(sasm);
318 __ ret();
319 __ delayed()->restore();
321 return oop_maps;
322 }
325 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
326 // make a frame and preserve the caller's caller-save registers
327 OopMap* oop_map = save_live_registers(sasm);
329 // call the runtime patching routine, returns non-zero if nmethod got deopted.
330 int call_offset = __ call_RT(noreg, noreg, target);
331 OopMapSet* oop_maps = new OopMapSet();
332 oop_maps->add_gc_map(call_offset, oop_map);
334 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
335 // deoptimization handler entry that will cause re-execution of the current bytecode
336 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
337 assert(deopt_blob != NULL, "deoptimization blob must have been created");
339 Label no_deopt;
340 __ br_null_short(O0, Assembler::pt, no_deopt);
342 // return to the deoptimization handler entry for unpacking and rexecute
343 // if we simply returned the we'd deopt as if any call we patched had just
344 // returned.
346 restore_live_registers(sasm);
348 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
349 __ jump_to(dest, O0);
350 __ delayed()->restore();
352 __ bind(no_deopt);
353 restore_live_registers(sasm);
354 __ ret();
355 __ delayed()->restore();
357 return oop_maps;
358 }
360 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
362 OopMapSet* oop_maps = NULL;
363 // for better readability
364 const bool must_gc_arguments = true;
365 const bool dont_gc_arguments = false;
367 // stub code & info for the different stubs
368 switch (id) {
369 case forward_exception_id:
370 {
371 oop_maps = generate_handle_exception(id, sasm);
372 }
373 break;
375 case new_instance_id:
376 case fast_new_instance_id:
377 case fast_new_instance_init_check_id:
378 {
379 Register G5_klass = G5; // Incoming
380 Register O0_obj = O0; // Outgoing
382 if (id == new_instance_id) {
383 __ set_info("new_instance", dont_gc_arguments);
384 } else if (id == fast_new_instance_id) {
385 __ set_info("fast new_instance", dont_gc_arguments);
386 } else {
387 assert(id == fast_new_instance_init_check_id, "bad StubID");
388 __ set_info("fast new_instance init check", dont_gc_arguments);
389 }
391 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
392 UseTLAB && FastTLABRefill) {
393 Label slow_path;
394 Register G1_obj_size = G1;
395 Register G3_t1 = G3;
396 Register G4_t2 = G4;
397 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
399 // Push a frame since we may do dtrace notification for the
400 // allocation which requires calling out and we don't want
401 // to stomp the real return address.
402 __ save_frame(0);
404 if (id == fast_new_instance_init_check_id) {
405 // make sure the klass is initialized
406 __ ldub(G5_klass, in_bytes(InstanceKlass::init_state_offset()), G3_t1);
407 __ cmp(G3_t1, InstanceKlass::fully_initialized);
408 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
409 __ delayed()->nop();
410 }
411 #ifdef ASSERT
412 // assert object can be fast path allocated
413 {
414 Label ok, not_ok;
415 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
416 // make sure it's an instance (LH > 0)
417 __ cmp_and_br_short(G1_obj_size, 0, Assembler::lessEqual, Assembler::pn, not_ok);
418 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
419 __ br(Assembler::zero, false, Assembler::pn, ok);
420 __ delayed()->nop();
421 __ bind(not_ok);
422 __ stop("assert(can be fast path allocated)");
423 __ should_not_reach_here();
424 __ bind(ok);
425 }
426 #endif // ASSERT
427 // if we got here then the TLAB allocation failed, so try
428 // refilling the TLAB or allocating directly from eden.
429 Label retry_tlab, try_eden;
430 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
432 __ bind(retry_tlab);
434 // get the instance size
435 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
437 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
439 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
440 __ verify_oop(O0_obj);
441 __ mov(O0, I0);
442 __ ret();
443 __ delayed()->restore();
445 __ bind(try_eden);
446 // get the instance size
447 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
448 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
449 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
451 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
452 __ verify_oop(O0_obj);
453 __ mov(O0, I0);
454 __ ret();
455 __ delayed()->restore();
457 __ bind(slow_path);
459 // pop this frame so generate_stub_call can push it's own
460 __ restore();
461 }
463 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
464 // I0->O0: new instance
465 }
467 break;
469 case counter_overflow_id:
470 // G4 contains bci, G5 contains method
471 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
472 break;
474 case new_type_array_id:
475 case new_object_array_id:
476 {
477 Register G5_klass = G5; // Incoming
478 Register G4_length = G4; // Incoming
479 Register O0_obj = O0; // Outgoing
481 Address klass_lh(G5_klass, Klass::layout_helper_offset());
482 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
483 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
484 // Use this offset to pick out an individual byte of the layout_helper:
485 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
486 - Klass::_lh_header_size_shift / BitsPerByte);
488 if (id == new_type_array_id) {
489 __ set_info("new_type_array", dont_gc_arguments);
490 } else {
491 __ set_info("new_object_array", dont_gc_arguments);
492 }
494 #ifdef ASSERT
495 // assert object type is really an array of the proper kind
496 {
497 Label ok;
498 Register G3_t1 = G3;
499 __ ld(klass_lh, G3_t1);
500 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
501 int tag = ((id == new_type_array_id)
502 ? Klass::_lh_array_tag_type_value
503 : Klass::_lh_array_tag_obj_value);
504 __ cmp_and_brx_short(G3_t1, tag, Assembler::equal, Assembler::pt, ok);
505 __ stop("assert(is an array klass)");
506 __ should_not_reach_here();
507 __ bind(ok);
508 }
509 #endif // ASSERT
511 if (UseTLAB && FastTLABRefill) {
512 Label slow_path;
513 Register G1_arr_size = G1;
514 Register G3_t1 = G3;
515 Register O1_t2 = O1;
516 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
518 // check that array length is small enough for fast path
519 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
520 __ cmp(G4_length, G3_t1);
521 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
522 __ delayed()->nop();
524 // if we got here then the TLAB allocation failed, so try
525 // refilling the TLAB or allocating directly from eden.
526 Label retry_tlab, try_eden;
527 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
529 __ bind(retry_tlab);
531 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
532 __ ld(klass_lh, G3_t1);
533 __ sll(G4_length, G3_t1, G1_arr_size);
534 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
535 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
536 __ add(G1_arr_size, G3_t1, G1_arr_size);
537 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
538 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
540 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
542 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
543 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
544 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
545 __ add(O0_obj, G3_t1, G3_t1); // body start
546 __ initialize_body(G3_t1, O1_t2);
547 __ verify_oop(O0_obj);
548 __ retl();
549 __ delayed()->nop();
551 __ bind(try_eden);
552 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
553 __ ld(klass_lh, G3_t1);
554 __ sll(G4_length, G3_t1, G1_arr_size);
555 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
556 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
557 __ add(G1_arr_size, G3_t1, G1_arr_size);
558 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
559 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
561 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
562 __ incr_allocated_bytes(G1_arr_size, G3_t1, O1_t2);
564 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
565 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
566 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
567 __ add(O0_obj, G3_t1, G3_t1); // body start
568 __ initialize_body(G3_t1, O1_t2);
569 __ verify_oop(O0_obj);
570 __ retl();
571 __ delayed()->nop();
573 __ bind(slow_path);
574 }
576 if (id == new_type_array_id) {
577 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
578 } else {
579 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
580 }
581 // I0 -> O0: new array
582 }
583 break;
585 case new_multi_array_id:
586 { // O0: klass
587 // O1: rank
588 // O2: address of 1st dimension
589 __ set_info("new_multi_array", dont_gc_arguments);
590 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
591 // I0 -> O0: new multi array
592 }
593 break;
595 case register_finalizer_id:
596 {
597 __ set_info("register_finalizer", dont_gc_arguments);
599 // load the klass and check the has finalizer flag
600 Label register_finalizer;
601 Register t = O1;
602 __ load_klass(O0, t);
603 __ ld(t, in_bytes(Klass::access_flags_offset()), t);
604 __ set(JVM_ACC_HAS_FINALIZER, G3);
605 __ andcc(G3, t, G0);
606 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
607 __ delayed()->nop();
609 // do a leaf return
610 __ retl();
611 __ delayed()->nop();
613 __ bind(register_finalizer);
614 OopMap* oop_map = save_live_registers(sasm);
615 int call_offset = __ call_RT(noreg, noreg,
616 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
617 oop_maps = new OopMapSet();
618 oop_maps->add_gc_map(call_offset, oop_map);
620 // Now restore all the live registers
621 restore_live_registers(sasm);
623 __ ret();
624 __ delayed()->restore();
625 }
626 break;
628 case throw_range_check_failed_id:
629 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
630 // G4: index
631 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
632 }
633 break;
635 case throw_index_exception_id:
636 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
637 // G4: index
638 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
639 }
640 break;
642 case throw_div0_exception_id:
643 { __ set_info("throw_div0_exception", dont_gc_arguments);
644 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
645 }
646 break;
648 case throw_null_pointer_exception_id:
649 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
650 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
651 }
652 break;
654 case handle_exception_id:
655 { __ set_info("handle_exception", dont_gc_arguments);
656 oop_maps = generate_handle_exception(id, sasm);
657 }
658 break;
660 case handle_exception_from_callee_id:
661 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
662 oop_maps = generate_handle_exception(id, sasm);
663 }
664 break;
666 case unwind_exception_id:
667 {
668 // O0: exception
669 // I7: address of call to this method
671 __ set_info("unwind_exception", dont_gc_arguments);
672 __ mov(Oexception, Oexception->after_save());
673 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
675 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
676 G2_thread, Oissuing_pc->after_save());
677 __ verify_not_null_oop(Oexception->after_save());
679 // Restore SP from L7 if the exception PC is a method handle call site.
680 __ mov(O0, G5); // Save the target address.
681 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
682 __ tst(L0); // Condition codes are preserved over the restore.
683 __ restore();
685 __ jmp(G5, 0);
686 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
687 }
688 break;
690 case throw_array_store_exception_id:
691 {
692 __ set_info("throw_array_store_exception", dont_gc_arguments);
693 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
694 }
695 break;
697 case throw_class_cast_exception_id:
698 {
699 // G4: object
700 __ set_info("throw_class_cast_exception", dont_gc_arguments);
701 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
702 }
703 break;
705 case throw_incompatible_class_change_error_id:
706 {
707 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
708 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
709 }
710 break;
712 case slow_subtype_check_id:
713 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
714 // Arguments :
715 //
716 // ret : G3
717 // sub : G3, argument, destroyed
718 // super: G1, argument, not changed
719 // raddr: O7, blown by call
720 Label miss;
722 __ save_frame(0); // Blow no registers!
724 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
726 __ mov(1, G3);
727 __ ret(); // Result in G5 is 'true'
728 __ delayed()->restore(); // free copy or add can go here
730 __ bind(miss);
731 __ mov(0, G3);
732 __ ret(); // Result in G5 is 'false'
733 __ delayed()->restore(); // free copy or add can go here
734 }
736 case monitorenter_nofpu_id:
737 case monitorenter_id:
738 { // G4: object
739 // G5: lock address
740 __ set_info("monitorenter", dont_gc_arguments);
742 int save_fpu_registers = (id == monitorenter_id);
743 // make a frame and preserve the caller's caller-save registers
744 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
746 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
748 oop_maps = new OopMapSet();
749 oop_maps->add_gc_map(call_offset, oop_map);
750 restore_live_registers(sasm, save_fpu_registers);
752 __ ret();
753 __ delayed()->restore();
754 }
755 break;
757 case monitorexit_nofpu_id:
758 case monitorexit_id:
759 { // G4: lock address
760 // note: really a leaf routine but must setup last java sp
761 // => use call_RT for now (speed can be improved by
762 // doing last java sp setup manually)
763 __ set_info("monitorexit", dont_gc_arguments);
765 int save_fpu_registers = (id == monitorexit_id);
766 // make a frame and preserve the caller's caller-save registers
767 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
769 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
771 oop_maps = new OopMapSet();
772 oop_maps->add_gc_map(call_offset, oop_map);
773 restore_live_registers(sasm, save_fpu_registers);
775 __ ret();
776 __ delayed()->restore();
777 }
778 break;
780 case deoptimize_id:
781 {
782 __ set_info("deoptimize", dont_gc_arguments);
783 OopMap* oop_map = save_live_registers(sasm);
784 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
785 oop_maps = new OopMapSet();
786 oop_maps->add_gc_map(call_offset, oop_map);
787 restore_live_registers(sasm);
788 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
789 assert(deopt_blob != NULL, "deoptimization blob must have been created");
790 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
791 __ jump_to(dest, O0);
792 __ delayed()->restore();
793 }
794 break;
796 case access_field_patching_id:
797 { __ set_info("access_field_patching", dont_gc_arguments);
798 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
799 }
800 break;
802 case load_klass_patching_id:
803 { __ set_info("load_klass_patching", dont_gc_arguments);
804 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
805 }
806 break;
808 case load_mirror_patching_id:
809 { __ set_info("load_mirror_patching", dont_gc_arguments);
810 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
811 }
812 break;
814 case load_appendix_patching_id:
815 { __ set_info("load_appendix_patching", dont_gc_arguments);
816 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
817 }
818 break;
820 case dtrace_object_alloc_id:
821 { // O0: object
822 __ set_info("dtrace_object_alloc", dont_gc_arguments);
823 // we can't gc here so skip the oopmap but make sure that all
824 // the live registers get saved.
825 save_live_registers(sasm);
827 __ save_thread(L7_thread_cache);
828 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
829 relocInfo::runtime_call_type);
830 __ delayed()->mov(I0, O0);
831 __ restore_thread(L7_thread_cache);
833 restore_live_registers(sasm);
834 __ ret();
835 __ delayed()->restore();
836 }
837 break;
839 #if INCLUDE_ALL_GCS
840 case g1_pre_barrier_slow_id:
841 { // G4: previous value of memory
842 BarrierSet* bs = Universe::heap()->barrier_set();
843 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
844 __ save_frame(0);
845 __ set((int)id, O1);
846 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
847 __ should_not_reach_here();
848 break;
849 }
851 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
853 Register pre_val = G4;
854 Register tmp = G1_scratch;
855 Register tmp2 = G3_scratch;
857 Label refill, restart;
858 bool with_frame = false; // I don't know if we can do with-frame.
859 int satb_q_index_byte_offset =
860 in_bytes(JavaThread::satb_mark_queue_offset() +
861 PtrQueue::byte_offset_of_index());
862 int satb_q_buf_byte_offset =
863 in_bytes(JavaThread::satb_mark_queue_offset() +
864 PtrQueue::byte_offset_of_buf());
866 __ bind(restart);
867 // Load the index into the SATB buffer. PtrQueue::_index is a
868 // size_t so ld_ptr is appropriate
869 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
871 // index == 0?
872 __ cmp_and_brx_short(tmp, G0, Assembler::equal, Assembler::pn, refill);
874 __ ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
875 __ sub(tmp, oopSize, tmp);
877 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
878 // Use return-from-leaf
879 __ retl();
880 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
882 __ bind(refill);
883 __ save_frame(0);
885 __ mov(pre_val, L0);
886 __ mov(tmp, L1);
887 __ mov(tmp2, L2);
889 __ call_VM_leaf(L7_thread_cache,
890 CAST_FROM_FN_PTR(address,
891 SATBMarkQueueSet::handle_zero_index_for_thread),
892 G2_thread);
894 __ mov(L0, pre_val);
895 __ mov(L1, tmp);
896 __ mov(L2, tmp2);
898 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
899 __ delayed()->restore();
900 }
901 break;
903 case g1_post_barrier_slow_id:
904 {
905 BarrierSet* bs = Universe::heap()->barrier_set();
906 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
907 __ save_frame(0);
908 __ set((int)id, O1);
909 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
910 __ should_not_reach_here();
911 break;
912 }
914 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
916 Register addr = G4;
917 Register cardtable = G5;
918 Register tmp = G1_scratch;
919 Register tmp2 = G3_scratch;
920 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
922 Label not_already_dirty, restart, refill, young_card;
924 #ifdef _LP64
925 __ srlx(addr, CardTableModRefBS::card_shift, addr);
926 #else
927 __ srl(addr, CardTableModRefBS::card_shift, addr);
928 #endif
930 AddressLiteral rs(byte_map_base);
931 __ set(rs, cardtable); // cardtable := <card table base>
932 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
934 __ cmp_and_br_short(tmp, G1SATBCardTableModRefBS::g1_young_card_val(), Assembler::equal, Assembler::pt, young_card);
936 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
937 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
939 assert(CardTableModRefBS::dirty_card_val() == 0, "otherwise check this code");
940 __ cmp_and_br_short(tmp, G0, Assembler::notEqual, Assembler::pt, not_already_dirty);
942 __ bind(young_card);
943 // We didn't take the branch, so we're already dirty: return.
944 // Use return-from-leaf
945 __ retl();
946 __ delayed()->nop();
948 // Not dirty.
949 __ bind(not_already_dirty);
951 // Get cardtable + tmp into a reg by itself
952 __ add(addr, cardtable, tmp2);
954 // First, dirty it.
955 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
957 Register tmp3 = cardtable;
958 Register tmp4 = tmp;
960 // these registers are now dead
961 addr = cardtable = tmp = noreg;
963 int dirty_card_q_index_byte_offset =
964 in_bytes(JavaThread::dirty_card_queue_offset() +
965 PtrQueue::byte_offset_of_index());
966 int dirty_card_q_buf_byte_offset =
967 in_bytes(JavaThread::dirty_card_queue_offset() +
968 PtrQueue::byte_offset_of_buf());
970 __ bind(restart);
972 // Get the index into the update buffer. PtrQueue::_index is
973 // a size_t so ld_ptr is appropriate here.
974 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
976 // index == 0?
977 __ cmp_and_brx_short(tmp3, G0, Assembler::equal, Assembler::pn, refill);
979 __ ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
980 __ sub(tmp3, oopSize, tmp3);
982 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
983 // Use return-from-leaf
984 __ retl();
985 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
987 __ bind(refill);
988 __ save_frame(0);
990 __ mov(tmp2, L0);
991 __ mov(tmp3, L1);
992 __ mov(tmp4, L2);
994 __ call_VM_leaf(L7_thread_cache,
995 CAST_FROM_FN_PTR(address,
996 DirtyCardQueueSet::handle_zero_index_for_thread),
997 G2_thread);
999 __ mov(L0, tmp2);
1000 __ mov(L1, tmp3);
1001 __ mov(L2, tmp4);
1003 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
1004 __ delayed()->restore();
1005 }
1006 break;
1007 #endif // INCLUDE_ALL_GCS
1009 case predicate_failed_trap_id:
1010 {
1011 __ set_info("predicate_failed_trap", dont_gc_arguments);
1012 OopMap* oop_map = save_live_registers(sasm);
1014 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1016 oop_maps = new OopMapSet();
1017 oop_maps->add_gc_map(call_offset, oop_map);
1019 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1020 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1021 restore_live_registers(sasm);
1023 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
1024 __ jump_to(dest, O0);
1025 __ delayed()->restore();
1026 }
1027 break;
1029 default:
1030 { __ set_info("unimplemented entry", dont_gc_arguments);
1031 __ save_frame(0);
1032 __ set((int)id, O1);
1033 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
1034 __ should_not_reach_here();
1035 }
1036 break;
1037 }
1038 return oop_maps;
1039 }
1042 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
1043 __ block_comment("generate_handle_exception");
1045 // Save registers, if required.
1046 OopMapSet* oop_maps = new OopMapSet();
1047 OopMap* oop_map = NULL;
1048 switch (id) {
1049 case forward_exception_id:
1050 // We're handling an exception in the context of a compiled frame.
1051 // The registers have been saved in the standard places. Perform
1052 // an exception lookup in the caller and dispatch to the handler
1053 // if found. Otherwise unwind and dispatch to the callers
1054 // exception handler.
1055 oop_map = generate_oop_map(sasm, true);
1057 // transfer the pending exception to the exception_oop
1058 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
1059 __ ld_ptr(Oexception, 0, G0);
1060 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
1061 __ add(I7, frame::pc_return_offset, Oissuing_pc);
1062 break;
1063 case handle_exception_id:
1064 // At this point all registers MAY be live.
1065 oop_map = save_live_registers(sasm);
1066 __ mov(Oexception->after_save(), Oexception);
1067 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1068 break;
1069 case handle_exception_from_callee_id:
1070 // At this point all registers except exception oop (Oexception)
1071 // and exception pc (Oissuing_pc) are dead.
1072 oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
1073 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
1074 __ save_frame_c1(frame_size_in_bytes);
1075 __ mov(Oexception->after_save(), Oexception);
1076 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1077 break;
1078 default: ShouldNotReachHere();
1079 }
1081 __ verify_not_null_oop(Oexception);
1083 #ifdef ASSERT
1084 // check that fields in JavaThread for exception oop and issuing pc are
1085 // empty before writing to them
1086 Label oop_empty;
1087 Register scratch = I7; // We can use I7 here because it's overwritten later anyway.
1088 __ ld_ptr(Address(G2_thread, JavaThread::exception_oop_offset()), scratch);
1089 __ br_null(scratch, false, Assembler::pt, oop_empty);
1090 __ delayed()->nop();
1091 __ stop("exception oop already set");
1092 __ bind(oop_empty);
1094 Label pc_empty;
1095 __ ld_ptr(Address(G2_thread, JavaThread::exception_pc_offset()), scratch);
1096 __ br_null(scratch, false, Assembler::pt, pc_empty);
1097 __ delayed()->nop();
1098 __ stop("exception pc already set");
1099 __ bind(pc_empty);
1100 #endif
1102 // save the exception and issuing pc in the thread
1103 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
1104 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
1106 // use the throwing pc as the return address to lookup (has bci & oop map)
1107 __ mov(Oissuing_pc, I7);
1108 __ sub(I7, frame::pc_return_offset, I7);
1109 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1110 oop_maps->add_gc_map(call_offset, oop_map);
1112 // Note: if nmethod has been deoptimized then regardless of
1113 // whether it had a handler or not we will deoptimize
1114 // by entering the deopt blob with a pending exception.
1116 // Restore the registers that were saved at the beginning, remove
1117 // the frame and jump to the exception handler.
1118 switch (id) {
1119 case forward_exception_id:
1120 case handle_exception_id:
1121 restore_live_registers(sasm);
1122 __ jmp(O0, 0);
1123 __ delayed()->restore();
1124 break;
1125 case handle_exception_from_callee_id:
1126 // Restore SP from L7 if the exception PC is a method handle call site.
1127 __ mov(O0, G5); // Save the target address.
1128 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
1129 __ tst(L0); // Condition codes are preserved over the restore.
1130 __ restore();
1132 __ jmp(G5, 0); // jump to the exception handler
1133 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
1134 break;
1135 default: ShouldNotReachHere();
1136 }
1138 return oop_maps;
1139 }
1142 #undef __
1144 const char *Runtime1::pd_name_for_address(address entry) {
1145 return "<unknown function>";
1146 }
