src/cpu/ppc/vm/icBuffer_ppc.cpp

Wed, 27 Nov 2013 16:16:21 -0800

author
goetz
date
Wed, 27 Nov 2013 16:16:21 -0800
changeset 6490
41b780b43b74
parent 0
f90c822e73f8
permissions
-rw-r--r--

8029015: PPC64 (part 216): opto: trap based null and range checks
Summary: On PPC64 use tdi instruction that does a compare and raises SIGTRAP for NULL and range checks.
Reviewed-by: kvn

     1 /*
     2  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright 2012, 2013 SAP AG. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     8  * published by the Free Software Foundation.
     9  *
    10  * This code is distributed in the hope that it will be useful, but WITHOUT
    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    13  * version 2 for more details (a copy is included in the LICENSE file that
    14  * accompanied this code).
    15  *
    16  * You should have received a copy of the GNU General Public License version
    17  * 2 along with this work; if not, write to the Free Software Foundation,
    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    19  *
    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    23  *
    24  */
    26 #include "precompiled.hpp"
    27 #include "asm/assembler.hpp"
    28 #include "assembler_ppc.inline.hpp"
    29 #include "code/icBuffer.hpp"
    30 #include "gc_interface/collectedHeap.inline.hpp"
    31 #include "interpreter/bytecodes.hpp"
    32 #include "memory/resourceArea.hpp"
    33 #include "nativeInst_ppc.hpp"
    34 #include "oops/oop.inline.hpp"
    35 #include "oops/oop.inline2.hpp"
    37 #define __ masm.
    39 int InlineCacheBuffer::ic_stub_code_size() {
    40   return MacroAssembler::load_const_size + MacroAssembler::b64_patchable_size;
    41 }
    43 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
    44   ResourceMark rm;
    45   CodeBuffer code(code_begin, ic_stub_code_size());
    46   MacroAssembler masm(&code);
    47   // Note: even though the code contains an embedded metadata, we do not need reloc info
    48   // because
    49   // (1) the metadata is old (i.e., doesn't matter for scavenges)
    50   // (2) these ICStubs are removed *before* a GC happens, so the roots disappear.
    52   // Load the oop ...
    53   __ load_const(R19_method, (address) cached_value, R0);
    54   // ... and jump to entry point.
    55   __ b64_patchable((address) entry_point, relocInfo::none);
    57   __ flush();
    58 }
    60 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
    61   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
    62   NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    63   return jump->jump_destination();
    64 }
    66 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
    67   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
    68   void* o = (void*)move->data();
    69   return o;
    70 }

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