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src/cpu/sparc/vm/c1_Runtime1_sparc.cpp@3dc12ef8735e
src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
Thu, 07 Oct 2010 15:12:57 -0400
- author
- bobv
- date
- Thu, 07 Oct 2010 15:12:57 -0400
- changeset 2223
- 3dc12ef8735e
- parent 2138
- d5d065957597
- child 2314
- f95d63e2154a
- permissions
- -rw-r--r--
6989297: Integrate additional portability improvements
Reviewed-by: vladidan, dholmes
1 /*
2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "incls/_precompiled.incl"
26 #include "incls/_c1_Runtime1_sparc.cpp.incl"
28 // Implementation of StubAssembler
30 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry_point, int number_of_arguments) {
31 // for sparc changing the number of arguments doesn't change
32 // anything about the frame size so we'll always lie and claim that
33 // we are only passing 1 argument.
34 set_num_rt_args(1);
36 assert_not_delayed();
37 // bang stack before going to runtime
38 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
39 st(G0, SP, G3_scratch);
41 // debugging support
42 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
44 set_last_Java_frame(SP, noreg);
45 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
46 save_thread(L7_thread_cache);
47 // do the call
48 call(entry_point, relocInfo::runtime_call_type);
49 if (!VerifyThread) {
50 delayed()->mov(G2_thread, O0); // pass thread as first argument
51 } else {
52 delayed()->nop(); // (thread already passed)
53 }
54 int call_offset = offset(); // offset of return address
55 restore_thread(L7_thread_cache);
56 reset_last_Java_frame();
58 // check for pending exceptions
59 { Label L;
60 Address exception_addr(G2_thread, Thread::pending_exception_offset());
61 ld_ptr(exception_addr, Gtemp);
62 br_null(Gtemp, false, pt, L);
63 delayed()->nop();
64 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
65 st_ptr(G0, vm_result_addr);
66 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
67 st_ptr(G0, vm_result_addr_2);
69 if (frame_size() == no_frame_size) {
70 // we use O7 linkage so that forward_exception_entry has the issuing PC
71 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
72 delayed()->restore();
73 } else if (_stub_id == Runtime1::forward_exception_id) {
74 should_not_reach_here();
75 } else {
76 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
77 jump_to(exc, G4);
78 delayed()->nop();
79 }
80 bind(L);
81 }
83 // get oop result if there is one and reset the value in the thread
84 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
85 get_vm_result (oop_result1);
86 } else {
87 // be a little paranoid and clear the result
88 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
89 st_ptr(G0, vm_result_addr);
90 }
92 if (oop_result2->is_valid()) {
93 get_vm_result_2(oop_result2);
94 } else {
95 // be a little paranoid and clear the result
96 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
97 st_ptr(G0, vm_result_addr_2);
98 }
100 return call_offset;
101 }
104 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
105 // O0 is reserved for the thread
106 mov(arg1, O1);
107 return call_RT(oop_result1, oop_result2, entry, 1);
108 }
111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
112 // O0 is reserved for the thread
113 mov(arg1, O1);
114 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
115 return call_RT(oop_result1, oop_result2, entry, 2);
116 }
119 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
120 // O0 is reserved for the thread
121 mov(arg1, O1);
122 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
123 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
124 return call_RT(oop_result1, oop_result2, entry, 3);
125 }
128 // Implementation of Runtime1
130 #define __ sasm->
132 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
133 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
134 static int reg_save_size_in_words;
135 static int frame_size_in_bytes = -1;
137 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
138 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
139 " mismatch in calculation");
140 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
141 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
142 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
144 int i;
145 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
146 Register r = as_Register(i);
147 if (r == G1 || r == G3 || r == G4 || r == G5) {
148 int sp_offset = cpu_reg_save_offsets[i];
149 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
150 r->as_VMReg());
151 }
152 }
154 if (save_fpu_registers) {
155 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
156 FloatRegister r = as_FloatRegister(i);
157 int sp_offset = fpu_reg_save_offsets[i];
158 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
159 r->as_VMReg());
160 }
161 }
162 return oop_map;
163 }
165 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
166 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
167 " mismatch in calculation");
168 __ save_frame_c1(frame_size_in_bytes);
169 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
171 // Record volatile registers as callee-save values in an OopMap so their save locations will be
172 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
173 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
174 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
175 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
176 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
178 int i;
179 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
180 Register r = as_Register(i);
181 if (r == G1 || r == G3 || r == G4 || r == G5) {
182 int sp_offset = cpu_reg_save_offsets[i];
183 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
184 }
185 }
187 if (save_fpu_registers) {
188 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
189 FloatRegister r = as_FloatRegister(i);
190 int sp_offset = fpu_reg_save_offsets[i];
191 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
192 }
193 }
195 return generate_oop_map(sasm, save_fpu_registers);
196 }
198 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
199 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
200 Register r = as_Register(i);
201 if (r == G1 || r == G3 || r == G4 || r == G5) {
202 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
203 }
204 }
206 if (restore_fpu_registers) {
207 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
208 FloatRegister r = as_FloatRegister(i);
209 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
210 }
211 }
212 }
215 void Runtime1::initialize_pd() {
216 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
217 //
218 // A stub routine will have a frame that is at least large enough to hold
219 // a register window save area (obviously) and the volatile g registers
220 // and floating registers. A user of save_live_registers can have a frame
221 // that has more scratch area in it (although typically they will use L-regs).
222 // in that case the frame will look like this (stack growing down)
223 //
224 // FP -> | |
225 // | scratch mem |
226 // | " " |
227 // --------------
228 // | float regs |
229 // | " " |
230 // ---------------
231 // | G regs |
232 // | " " |
233 // ---------------
234 // | abi reg. |
235 // | window save |
236 // | area |
237 // SP -> ---------------
238 //
239 int i;
240 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
242 // only G int registers are saved explicitly; others are found in register windows
243 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
244 Register r = as_Register(i);
245 if (r == G1 || r == G3 || r == G4 || r == G5) {
246 cpu_reg_save_offsets[i] = sp_offset;
247 sp_offset++;
248 }
249 }
251 // all float registers are saved explicitly
252 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
253 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
254 fpu_reg_save_offsets[i] = sp_offset;
255 sp_offset++;
256 }
257 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
258 // this should match assembler::total_frame_size_in_bytes, which
259 // isn't callable from this context. It's checked by an assert when
260 // it's used though.
261 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
262 }
265 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
266 // make a frame and preserve the caller's caller-save registers
267 OopMap* oop_map = save_live_registers(sasm);
268 int call_offset;
269 if (!has_argument) {
270 call_offset = __ call_RT(noreg, noreg, target);
271 } else {
272 call_offset = __ call_RT(noreg, noreg, target, G4);
273 }
274 OopMapSet* oop_maps = new OopMapSet();
275 oop_maps->add_gc_map(call_offset, oop_map);
277 __ should_not_reach_here();
278 return oop_maps;
279 }
282 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
283 Register arg1, Register arg2, Register arg3) {
284 // make a frame and preserve the caller's caller-save registers
285 OopMap* oop_map = save_live_registers(sasm);
287 int call_offset;
288 if (arg1 == noreg) {
289 call_offset = __ call_RT(result, noreg, target);
290 } else if (arg2 == noreg) {
291 call_offset = __ call_RT(result, noreg, target, arg1);
292 } else if (arg3 == noreg) {
293 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
294 } else {
295 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
296 }
297 OopMapSet* oop_maps = NULL;
299 oop_maps = new OopMapSet();
300 oop_maps->add_gc_map(call_offset, oop_map);
301 restore_live_registers(sasm);
303 __ ret();
304 __ delayed()->restore();
306 return oop_maps;
307 }
310 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
311 // make a frame and preserve the caller's caller-save registers
312 OopMap* oop_map = save_live_registers(sasm);
314 // call the runtime patching routine, returns non-zero if nmethod got deopted.
315 int call_offset = __ call_RT(noreg, noreg, target);
316 OopMapSet* oop_maps = new OopMapSet();
317 oop_maps->add_gc_map(call_offset, oop_map);
319 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
320 // deoptimization handler entry that will cause re-execution of the current bytecode
321 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
322 assert(deopt_blob != NULL, "deoptimization blob must have been created");
324 Label no_deopt;
325 __ tst(O0);
326 __ brx(Assembler::equal, false, Assembler::pt, no_deopt);
327 __ delayed()->nop();
329 // return to the deoptimization handler entry for unpacking and rexecute
330 // if we simply returned the we'd deopt as if any call we patched had just
331 // returned.
333 restore_live_registers(sasm);
334 __ restore();
335 __ br(Assembler::always, false, Assembler::pt, deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
336 __ delayed()->nop();
338 __ bind(no_deopt);
339 restore_live_registers(sasm);
340 __ ret();
341 __ delayed()->restore();
343 return oop_maps;
344 }
346 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
348 OopMapSet* oop_maps = NULL;
349 // for better readability
350 const bool must_gc_arguments = true;
351 const bool dont_gc_arguments = false;
353 // stub code & info for the different stubs
354 switch (id) {
355 case forward_exception_id:
356 {
357 // we're handling an exception in the context of a compiled
358 // frame. The registers have been saved in the standard
359 // places. Perform an exception lookup in the caller and
360 // dispatch to the handler if found. Otherwise unwind and
361 // dispatch to the callers exception handler.
363 oop_maps = new OopMapSet();
364 OopMap* oop_map = generate_oop_map(sasm, true);
366 // transfer the pending exception to the exception_oop
367 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
368 __ ld_ptr(Oexception, 0, G0);
369 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
370 __ add(I7, frame::pc_return_offset, Oissuing_pc);
372 generate_handle_exception(sasm, oop_maps, oop_map);
373 __ should_not_reach_here();
374 }
375 break;
377 case new_instance_id:
378 case fast_new_instance_id:
379 case fast_new_instance_init_check_id:
380 {
381 Register G5_klass = G5; // Incoming
382 Register O0_obj = O0; // Outgoing
384 if (id == new_instance_id) {
385 __ set_info("new_instance", dont_gc_arguments);
386 } else if (id == fast_new_instance_id) {
387 __ set_info("fast new_instance", dont_gc_arguments);
388 } else {
389 assert(id == fast_new_instance_init_check_id, "bad StubID");
390 __ set_info("fast new_instance init check", dont_gc_arguments);
391 }
393 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
394 UseTLAB && FastTLABRefill) {
395 Label slow_path;
396 Register G1_obj_size = G1;
397 Register G3_t1 = G3;
398 Register G4_t2 = G4;
399 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
401 // Push a frame since we may do dtrace notification for the
402 // allocation which requires calling out and we don't want
403 // to stomp the real return address.
404 __ save_frame(0);
406 if (id == fast_new_instance_init_check_id) {
407 // make sure the klass is initialized
408 __ ld(G5_klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc), G3_t1);
409 __ cmp(G3_t1, instanceKlass::fully_initialized);
410 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
411 __ delayed()->nop();
412 }
413 #ifdef ASSERT
414 // assert object can be fast path allocated
415 {
416 Label ok, not_ok;
417 __ ld(G5_klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc), G1_obj_size);
418 __ cmp(G1_obj_size, 0); // make sure it's an instance (LH > 0)
419 __ br(Assembler::lessEqual, false, Assembler::pn, not_ok);
420 __ delayed()->nop();
421 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
422 __ br(Assembler::zero, false, Assembler::pn, ok);
423 __ delayed()->nop();
424 __ bind(not_ok);
425 __ stop("assert(can be fast path allocated)");
426 __ should_not_reach_here();
427 __ bind(ok);
428 }
429 #endif // ASSERT
430 // if we got here then the TLAB allocation failed, so try
431 // refilling the TLAB or allocating directly from eden.
432 Label retry_tlab, try_eden;
433 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
435 __ bind(retry_tlab);
437 // get the instance size
438 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
439 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
440 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
441 __ verify_oop(O0_obj);
442 __ mov(O0, I0);
443 __ ret();
444 __ delayed()->restore();
446 __ bind(try_eden);
447 // get the instance size
448 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
449 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
450 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
451 __ verify_oop(O0_obj);
452 __ mov(O0, I0);
453 __ ret();
454 __ delayed()->restore();
456 __ bind(slow_path);
458 // pop this frame so generate_stub_call can push it's own
459 __ restore();
460 }
462 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
463 // I0->O0: new instance
464 }
466 break;
468 case counter_overflow_id:
469 // G4 contains bci, G5 contains method
470 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
471 break;
473 case new_type_array_id:
474 case new_object_array_id:
475 {
476 Register G5_klass = G5; // Incoming
477 Register G4_length = G4; // Incoming
478 Register O0_obj = O0; // Outgoing
480 Address klass_lh(G5_klass, ((klassOopDesc::header_size() * HeapWordSize)
481 + Klass::layout_helper_offset_in_bytes()));
482 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
483 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
484 // Use this offset to pick out an individual byte of the layout_helper:
485 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
486 - Klass::_lh_header_size_shift / BitsPerByte);
488 if (id == new_type_array_id) {
489 __ set_info("new_type_array", dont_gc_arguments);
490 } else {
491 __ set_info("new_object_array", dont_gc_arguments);
492 }
494 #ifdef ASSERT
495 // assert object type is really an array of the proper kind
496 {
497 Label ok;
498 Register G3_t1 = G3;
499 __ ld(klass_lh, G3_t1);
500 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
501 int tag = ((id == new_type_array_id)
502 ? Klass::_lh_array_tag_type_value
503 : Klass::_lh_array_tag_obj_value);
504 __ cmp(G3_t1, tag);
505 __ brx(Assembler::equal, false, Assembler::pt, ok);
506 __ delayed()->nop();
507 __ stop("assert(is an array klass)");
508 __ should_not_reach_here();
509 __ bind(ok);
510 }
511 #endif // ASSERT
513 if (UseTLAB && FastTLABRefill) {
514 Label slow_path;
515 Register G1_arr_size = G1;
516 Register G3_t1 = G3;
517 Register O1_t2 = O1;
518 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
520 // check that array length is small enough for fast path
521 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
522 __ cmp(G4_length, G3_t1);
523 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
524 __ delayed()->nop();
526 // if we got here then the TLAB allocation failed, so try
527 // refilling the TLAB or allocating directly from eden.
528 Label retry_tlab, try_eden;
529 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
531 __ bind(retry_tlab);
533 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
534 __ ld(klass_lh, G3_t1);
535 __ sll(G4_length, G3_t1, G1_arr_size);
536 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
537 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
538 __ add(G1_arr_size, G3_t1, G1_arr_size);
539 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
540 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
542 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
544 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
545 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
546 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
547 __ add(O0_obj, G3_t1, G3_t1); // body start
548 __ initialize_body(G3_t1, O1_t2);
549 __ verify_oop(O0_obj);
550 __ retl();
551 __ delayed()->nop();
553 __ bind(try_eden);
554 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
555 __ ld(klass_lh, G3_t1);
556 __ sll(G4_length, G3_t1, G1_arr_size);
557 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
558 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
559 __ add(G1_arr_size, G3_t1, G1_arr_size);
560 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
561 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
563 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
565 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
566 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
567 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
568 __ add(O0_obj, G3_t1, G3_t1); // body start
569 __ initialize_body(G3_t1, O1_t2);
570 __ verify_oop(O0_obj);
571 __ retl();
572 __ delayed()->nop();
574 __ bind(slow_path);
575 }
577 if (id == new_type_array_id) {
578 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
579 } else {
580 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
581 }
582 // I0 -> O0: new array
583 }
584 break;
586 case new_multi_array_id:
587 { // O0: klass
588 // O1: rank
589 // O2: address of 1st dimension
590 __ set_info("new_multi_array", dont_gc_arguments);
591 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
592 // I0 -> O0: new multi array
593 }
594 break;
596 case register_finalizer_id:
597 {
598 __ set_info("register_finalizer", dont_gc_arguments);
600 // load the klass and check the has finalizer flag
601 Label register_finalizer;
602 Register t = O1;
603 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), t);
604 __ ld(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc), t);
605 __ set(JVM_ACC_HAS_FINALIZER, G3);
606 __ andcc(G3, t, G0);
607 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
608 __ delayed()->nop();
610 // do a leaf return
611 __ retl();
612 __ delayed()->nop();
614 __ bind(register_finalizer);
615 OopMap* oop_map = save_live_registers(sasm);
616 int call_offset = __ call_RT(noreg, noreg,
617 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
618 oop_maps = new OopMapSet();
619 oop_maps->add_gc_map(call_offset, oop_map);
621 // Now restore all the live registers
622 restore_live_registers(sasm);
624 __ ret();
625 __ delayed()->restore();
626 }
627 break;
629 case throw_range_check_failed_id:
630 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
631 // G4: index
632 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
633 }
634 break;
636 case throw_index_exception_id:
637 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
638 // G4: index
639 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
640 }
641 break;
643 case throw_div0_exception_id:
644 { __ set_info("throw_div0_exception", dont_gc_arguments);
645 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
646 }
647 break;
649 case throw_null_pointer_exception_id:
650 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
651 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
652 }
653 break;
655 case handle_exception_id:
656 {
657 __ set_info("handle_exception", dont_gc_arguments);
658 // make a frame and preserve the caller's caller-save registers
660 oop_maps = new OopMapSet();
661 OopMap* oop_map = save_live_registers(sasm);
662 __ mov(Oexception->after_save(), Oexception);
663 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
664 generate_handle_exception(sasm, oop_maps, oop_map);
665 }
666 break;
668 case unwind_exception_id:
669 {
670 // O0: exception
671 // I7: address of call to this method
673 __ set_info("unwind_exception", dont_gc_arguments);
674 __ mov(Oexception, Oexception->after_save());
675 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
677 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
678 G2_thread, Oissuing_pc->after_save());
679 __ verify_not_null_oop(Oexception->after_save());
681 // Restore SP from L7 if the exception PC is a MethodHandle call site.
682 __ mov(O0, G5); // Save the target address.
683 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
684 __ tst(L0); // Condition codes are preserved over the restore.
685 __ restore();
687 __ jmp(G5, 0);
688 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
689 }
690 break;
692 case throw_array_store_exception_id:
693 {
694 __ set_info("throw_array_store_exception", dont_gc_arguments);
695 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false);
696 }
697 break;
699 case throw_class_cast_exception_id:
700 {
701 // G4: object
702 __ set_info("throw_class_cast_exception", dont_gc_arguments);
703 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
704 }
705 break;
707 case throw_incompatible_class_change_error_id:
708 {
709 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
710 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
711 }
712 break;
714 case slow_subtype_check_id:
715 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
716 // Arguments :
717 //
718 // ret : G3
719 // sub : G3, argument, destroyed
720 // super: G1, argument, not changed
721 // raddr: O7, blown by call
722 Label miss;
724 __ save_frame(0); // Blow no registers!
726 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
728 __ mov(1, G3);
729 __ ret(); // Result in G5 is 'true'
730 __ delayed()->restore(); // free copy or add can go here
732 __ bind(miss);
733 __ mov(0, G3);
734 __ ret(); // Result in G5 is 'false'
735 __ delayed()->restore(); // free copy or add can go here
736 }
738 case monitorenter_nofpu_id:
739 case monitorenter_id:
740 { // G4: object
741 // G5: lock address
742 __ set_info("monitorenter", dont_gc_arguments);
744 int save_fpu_registers = (id == monitorenter_id);
745 // make a frame and preserve the caller's caller-save registers
746 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
748 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
750 oop_maps = new OopMapSet();
751 oop_maps->add_gc_map(call_offset, oop_map);
752 restore_live_registers(sasm, save_fpu_registers);
754 __ ret();
755 __ delayed()->restore();
756 }
757 break;
759 case monitorexit_nofpu_id:
760 case monitorexit_id:
761 { // G4: lock address
762 // note: really a leaf routine but must setup last java sp
763 // => use call_RT for now (speed can be improved by
764 // doing last java sp setup manually)
765 __ set_info("monitorexit", dont_gc_arguments);
767 int save_fpu_registers = (id == monitorexit_id);
768 // make a frame and preserve the caller's caller-save registers
769 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
771 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
773 oop_maps = new OopMapSet();
774 oop_maps->add_gc_map(call_offset, oop_map);
775 restore_live_registers(sasm, save_fpu_registers);
777 __ ret();
778 __ delayed()->restore();
780 }
781 break;
783 case access_field_patching_id:
784 { __ set_info("access_field_patching", dont_gc_arguments);
785 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
786 }
787 break;
789 case load_klass_patching_id:
790 { __ set_info("load_klass_patching", dont_gc_arguments);
791 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
792 }
793 break;
795 case jvmti_exception_throw_id:
796 { // Oexception : exception
797 __ set_info("jvmti_exception_throw", dont_gc_arguments);
798 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), I0);
799 }
800 break;
802 case dtrace_object_alloc_id:
803 { // O0: object
804 __ set_info("dtrace_object_alloc", dont_gc_arguments);
805 // we can't gc here so skip the oopmap but make sure that all
806 // the live registers get saved.
807 save_live_registers(sasm);
809 __ save_thread(L7_thread_cache);
810 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
811 relocInfo::runtime_call_type);
812 __ delayed()->mov(I0, O0);
813 __ restore_thread(L7_thread_cache);
815 restore_live_registers(sasm);
816 __ ret();
817 __ delayed()->restore();
818 }
819 break;
821 #ifndef SERIALGC
822 case g1_pre_barrier_slow_id:
823 { // G4: previous value of memory
824 BarrierSet* bs = Universe::heap()->barrier_set();
825 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
826 __ save_frame(0);
827 __ set((int)id, O1);
828 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
829 __ should_not_reach_here();
830 break;
831 }
833 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
835 Register pre_val = G4;
836 Register tmp = G1_scratch;
837 Register tmp2 = G3_scratch;
839 Label refill, restart;
840 bool with_frame = false; // I don't know if we can do with-frame.
841 int satb_q_index_byte_offset =
842 in_bytes(JavaThread::satb_mark_queue_offset() +
843 PtrQueue::byte_offset_of_index());
844 int satb_q_buf_byte_offset =
845 in_bytes(JavaThread::satb_mark_queue_offset() +
846 PtrQueue::byte_offset_of_buf());
847 __ bind(restart);
848 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
850 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false,
851 Assembler::pn, tmp, refill);
853 // If the branch is taken, no harm in executing this in the delay slot.
854 __ delayed()->ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
855 __ sub(tmp, oopSize, tmp);
857 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
858 // Use return-from-leaf
859 __ retl();
860 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
862 __ bind(refill);
863 __ save_frame(0);
865 __ mov(pre_val, L0);
866 __ mov(tmp, L1);
867 __ mov(tmp2, L2);
869 __ call_VM_leaf(L7_thread_cache,
870 CAST_FROM_FN_PTR(address,
871 SATBMarkQueueSet::handle_zero_index_for_thread),
872 G2_thread);
874 __ mov(L0, pre_val);
875 __ mov(L1, tmp);
876 __ mov(L2, tmp2);
878 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
879 __ delayed()->restore();
880 }
881 break;
883 case g1_post_barrier_slow_id:
884 {
885 BarrierSet* bs = Universe::heap()->barrier_set();
886 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
887 __ save_frame(0);
888 __ set((int)id, O1);
889 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
890 __ should_not_reach_here();
891 break;
892 }
894 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
896 Register addr = G4;
897 Register cardtable = G5;
898 Register tmp = G1_scratch;
899 Register tmp2 = G3_scratch;
900 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
902 Label not_already_dirty, restart, refill;
904 #ifdef _LP64
905 __ srlx(addr, CardTableModRefBS::card_shift, addr);
906 #else
907 __ srl(addr, CardTableModRefBS::card_shift, addr);
908 #endif
910 AddressLiteral rs(byte_map_base);
911 __ set(rs, cardtable); // cardtable := <card table base>
912 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
914 __ br_on_reg_cond(Assembler::rc_nz, /*annul*/false, Assembler::pt,
915 tmp, not_already_dirty);
916 // Get cardtable + tmp into a reg by itself -- useful in the take-the-branch
917 // case, harmless if not.
918 __ delayed()->add(addr, cardtable, tmp2);
920 // We didn't take the branch, so we're already dirty: return.
921 // Use return-from-leaf
922 __ retl();
923 __ delayed()->nop();
925 // Not dirty.
926 __ bind(not_already_dirty);
927 // First, dirty it.
928 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
930 Register tmp3 = cardtable;
931 Register tmp4 = tmp;
933 // these registers are now dead
934 addr = cardtable = tmp = noreg;
936 int dirty_card_q_index_byte_offset =
937 in_bytes(JavaThread::dirty_card_queue_offset() +
938 PtrQueue::byte_offset_of_index());
939 int dirty_card_q_buf_byte_offset =
940 in_bytes(JavaThread::dirty_card_queue_offset() +
941 PtrQueue::byte_offset_of_buf());
942 __ bind(restart);
943 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
945 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pn,
946 tmp3, refill);
947 // If the branch is taken, no harm in executing this in the delay slot.
948 __ delayed()->ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
949 __ sub(tmp3, oopSize, tmp3);
951 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
952 // Use return-from-leaf
953 __ retl();
954 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
956 __ bind(refill);
957 __ save_frame(0);
959 __ mov(tmp2, L0);
960 __ mov(tmp3, L1);
961 __ mov(tmp4, L2);
963 __ call_VM_leaf(L7_thread_cache,
964 CAST_FROM_FN_PTR(address,
965 DirtyCardQueueSet::handle_zero_index_for_thread),
966 G2_thread);
968 __ mov(L0, tmp2);
969 __ mov(L1, tmp3);
970 __ mov(L2, tmp4);
972 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
973 __ delayed()->restore();
974 }
975 break;
976 #endif // !SERIALGC
978 default:
979 { __ set_info("unimplemented entry", dont_gc_arguments);
980 __ save_frame(0);
981 __ set((int)id, O1);
982 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
983 __ should_not_reach_here();
984 }
985 break;
986 }
987 return oop_maps;
988 }
991 void Runtime1::generate_handle_exception(StubAssembler* sasm, OopMapSet* oop_maps, OopMap* oop_map, bool) {
992 Label no_deopt;
994 __ verify_not_null_oop(Oexception);
996 // save the exception and issuing pc in the thread
997 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
998 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
1000 // save the real return address and use the throwing pc as the return address to lookup (has bci & oop map)
1001 __ mov(I7, L0);
1002 __ mov(Oissuing_pc, I7);
1003 __ sub(I7, frame::pc_return_offset, I7);
1004 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1006 // Note: if nmethod has been deoptimized then regardless of
1007 // whether it had a handler or not we will deoptimize
1008 // by entering the deopt blob with a pending exception.
1010 #ifdef ASSERT
1011 Label done;
1012 __ tst(O0);
1013 __ br(Assembler::notZero, false, Assembler::pn, done);
1014 __ delayed()->nop();
1015 __ stop("should have found address");
1016 __ bind(done);
1017 #endif
1019 // restore the registers that were saved at the beginning and jump to the exception handler.
1020 restore_live_registers(sasm);
1022 __ jmp(O0, 0);
1023 __ delayed()->restore();
1025 oop_maps->add_gc_map(call_offset, oop_map);
1026 }
1029 #undef __
1031 #define __ masm->
1033 const char *Runtime1::pd_name_for_address(address entry) {
1034 return "<unknown function>";
1035 }
