Mercurial > jdk8-mips64-public > hotspot / file revision
src/cpu/sparc/vm/c1_Runtime1_sparc.cpp@3d42f82cd811
src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
Thu, 21 Jul 2011 11:25:07 -0700
- author
- kvn
- date
- Thu, 21 Jul 2011 11:25:07 -0700
- changeset 3037
- 3d42f82cd811
- parent 2603
- 1b4e6a5d98e0
- child 3088
- 4fe626cbf0bf
- child 3099
- c124e2e7463e
- permissions
- -rw-r--r--
7063628: Use cbcond on T4
Summary: Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose
1 /*
2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "c1/c1_Defs.hpp"
27 #include "c1/c1_MacroAssembler.hpp"
28 #include "c1/c1_Runtime1.hpp"
29 #include "interpreter/interpreter.hpp"
30 #include "nativeInst_sparc.hpp"
31 #include "oops/compiledICHolderOop.hpp"
32 #include "oops/oop.inline.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "register_sparc.hpp"
35 #include "runtime/sharedRuntime.hpp"
36 #include "runtime/signature.hpp"
37 #include "runtime/vframeArray.hpp"
38 #include "vmreg_sparc.inline.hpp"
40 // Implementation of StubAssembler
42 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry_point, int number_of_arguments) {
43 // for sparc changing the number of arguments doesn't change
44 // anything about the frame size so we'll always lie and claim that
45 // we are only passing 1 argument.
46 set_num_rt_args(1);
48 assert_not_delayed();
49 // bang stack before going to runtime
50 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
51 st(G0, SP, G3_scratch);
53 // debugging support
54 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
56 set_last_Java_frame(SP, noreg);
57 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
58 save_thread(L7_thread_cache);
59 // do the call
60 call(entry_point, relocInfo::runtime_call_type);
61 if (!VerifyThread) {
62 delayed()->mov(G2_thread, O0); // pass thread as first argument
63 } else {
64 delayed()->nop(); // (thread already passed)
65 }
66 int call_offset = offset(); // offset of return address
67 restore_thread(L7_thread_cache);
68 reset_last_Java_frame();
70 // check for pending exceptions
71 { Label L;
72 Address exception_addr(G2_thread, Thread::pending_exception_offset());
73 ld_ptr(exception_addr, Gtemp);
74 br_null_short(Gtemp, pt, L);
75 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
76 st_ptr(G0, vm_result_addr);
77 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
78 st_ptr(G0, vm_result_addr_2);
80 if (frame_size() == no_frame_size) {
81 // we use O7 linkage so that forward_exception_entry has the issuing PC
82 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
83 delayed()->restore();
84 } else if (_stub_id == Runtime1::forward_exception_id) {
85 should_not_reach_here();
86 } else {
87 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
88 jump_to(exc, G4);
89 delayed()->nop();
90 }
91 bind(L);
92 }
94 // get oop result if there is one and reset the value in the thread
95 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
96 get_vm_result (oop_result1);
97 } else {
98 // be a little paranoid and clear the result
99 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
100 st_ptr(G0, vm_result_addr);
101 }
103 if (oop_result2->is_valid()) {
104 get_vm_result_2(oop_result2);
105 } else {
106 // be a little paranoid and clear the result
107 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
108 st_ptr(G0, vm_result_addr_2);
109 }
111 return call_offset;
112 }
115 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
116 // O0 is reserved for the thread
117 mov(arg1, O1);
118 return call_RT(oop_result1, oop_result2, entry, 1);
119 }
122 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
123 // O0 is reserved for the thread
124 mov(arg1, O1);
125 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
126 return call_RT(oop_result1, oop_result2, entry, 2);
127 }
130 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
131 // O0 is reserved for the thread
132 mov(arg1, O1);
133 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
134 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
135 return call_RT(oop_result1, oop_result2, entry, 3);
136 }
139 // Implementation of Runtime1
141 #define __ sasm->
143 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
144 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
145 static int reg_save_size_in_words;
146 static int frame_size_in_bytes = -1;
148 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
149 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
150 "mismatch in calculation");
151 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
152 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
153 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
155 int i;
156 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
157 Register r = as_Register(i);
158 if (r == G1 || r == G3 || r == G4 || r == G5) {
159 int sp_offset = cpu_reg_save_offsets[i];
160 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
161 r->as_VMReg());
162 }
163 }
165 if (save_fpu_registers) {
166 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
167 FloatRegister r = as_FloatRegister(i);
168 int sp_offset = fpu_reg_save_offsets[i];
169 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
170 r->as_VMReg());
171 }
172 }
173 return oop_map;
174 }
176 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
177 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
178 "mismatch in calculation");
179 __ save_frame_c1(frame_size_in_bytes);
181 // Record volatile registers as callee-save values in an OopMap so their save locations will be
182 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
183 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
184 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
185 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
186 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
188 int i;
189 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
190 Register r = as_Register(i);
191 if (r == G1 || r == G3 || r == G4 || r == G5) {
192 int sp_offset = cpu_reg_save_offsets[i];
193 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
194 }
195 }
197 if (save_fpu_registers) {
198 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
199 FloatRegister r = as_FloatRegister(i);
200 int sp_offset = fpu_reg_save_offsets[i];
201 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
202 }
203 }
205 return generate_oop_map(sasm, save_fpu_registers);
206 }
208 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
209 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
210 Register r = as_Register(i);
211 if (r == G1 || r == G3 || r == G4 || r == G5) {
212 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
213 }
214 }
216 if (restore_fpu_registers) {
217 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
218 FloatRegister r = as_FloatRegister(i);
219 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
220 }
221 }
222 }
225 void Runtime1::initialize_pd() {
226 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
227 //
228 // A stub routine will have a frame that is at least large enough to hold
229 // a register window save area (obviously) and the volatile g registers
230 // and floating registers. A user of save_live_registers can have a frame
231 // that has more scratch area in it (although typically they will use L-regs).
232 // in that case the frame will look like this (stack growing down)
233 //
234 // FP -> | |
235 // | scratch mem |
236 // | " " |
237 // --------------
238 // | float regs |
239 // | " " |
240 // ---------------
241 // | G regs |
242 // | " " |
243 // ---------------
244 // | abi reg. |
245 // | window save |
246 // | area |
247 // SP -> ---------------
248 //
249 int i;
250 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
252 // only G int registers are saved explicitly; others are found in register windows
253 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
254 Register r = as_Register(i);
255 if (r == G1 || r == G3 || r == G4 || r == G5) {
256 cpu_reg_save_offsets[i] = sp_offset;
257 sp_offset++;
258 }
259 }
261 // all float registers are saved explicitly
262 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
263 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
264 fpu_reg_save_offsets[i] = sp_offset;
265 sp_offset++;
266 }
267 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
268 // this should match assembler::total_frame_size_in_bytes, which
269 // isn't callable from this context. It's checked by an assert when
270 // it's used though.
271 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
272 }
275 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
276 // make a frame and preserve the caller's caller-save registers
277 OopMap* oop_map = save_live_registers(sasm);
278 int call_offset;
279 if (!has_argument) {
280 call_offset = __ call_RT(noreg, noreg, target);
281 } else {
282 call_offset = __ call_RT(noreg, noreg, target, G4);
283 }
284 OopMapSet* oop_maps = new OopMapSet();
285 oop_maps->add_gc_map(call_offset, oop_map);
287 __ should_not_reach_here();
288 return oop_maps;
289 }
292 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
293 Register arg1, Register arg2, Register arg3) {
294 // make a frame and preserve the caller's caller-save registers
295 OopMap* oop_map = save_live_registers(sasm);
297 int call_offset;
298 if (arg1 == noreg) {
299 call_offset = __ call_RT(result, noreg, target);
300 } else if (arg2 == noreg) {
301 call_offset = __ call_RT(result, noreg, target, arg1);
302 } else if (arg3 == noreg) {
303 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
304 } else {
305 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
306 }
307 OopMapSet* oop_maps = NULL;
309 oop_maps = new OopMapSet();
310 oop_maps->add_gc_map(call_offset, oop_map);
311 restore_live_registers(sasm);
313 __ ret();
314 __ delayed()->restore();
316 return oop_maps;
317 }
320 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
321 // make a frame and preserve the caller's caller-save registers
322 OopMap* oop_map = save_live_registers(sasm);
324 // call the runtime patching routine, returns non-zero if nmethod got deopted.
325 int call_offset = __ call_RT(noreg, noreg, target);
326 OopMapSet* oop_maps = new OopMapSet();
327 oop_maps->add_gc_map(call_offset, oop_map);
329 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
330 // deoptimization handler entry that will cause re-execution of the current bytecode
331 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
332 assert(deopt_blob != NULL, "deoptimization blob must have been created");
334 Label no_deopt;
335 __ br_null_short(O0, Assembler::pt, no_deopt);
337 // return to the deoptimization handler entry for unpacking and rexecute
338 // if we simply returned the we'd deopt as if any call we patched had just
339 // returned.
341 restore_live_registers(sasm);
343 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
344 __ jump_to(dest, O0);
345 __ delayed()->restore();
347 __ bind(no_deopt);
348 restore_live_registers(sasm);
349 __ ret();
350 __ delayed()->restore();
352 return oop_maps;
353 }
355 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
357 OopMapSet* oop_maps = NULL;
358 // for better readability
359 const bool must_gc_arguments = true;
360 const bool dont_gc_arguments = false;
362 // stub code & info for the different stubs
363 switch (id) {
364 case forward_exception_id:
365 {
366 oop_maps = generate_handle_exception(id, sasm);
367 }
368 break;
370 case new_instance_id:
371 case fast_new_instance_id:
372 case fast_new_instance_init_check_id:
373 {
374 Register G5_klass = G5; // Incoming
375 Register O0_obj = O0; // Outgoing
377 if (id == new_instance_id) {
378 __ set_info("new_instance", dont_gc_arguments);
379 } else if (id == fast_new_instance_id) {
380 __ set_info("fast new_instance", dont_gc_arguments);
381 } else {
382 assert(id == fast_new_instance_init_check_id, "bad StubID");
383 __ set_info("fast new_instance init check", dont_gc_arguments);
384 }
386 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
387 UseTLAB && FastTLABRefill) {
388 Label slow_path;
389 Register G1_obj_size = G1;
390 Register G3_t1 = G3;
391 Register G4_t2 = G4;
392 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
394 // Push a frame since we may do dtrace notification for the
395 // allocation which requires calling out and we don't want
396 // to stomp the real return address.
397 __ save_frame(0);
399 if (id == fast_new_instance_init_check_id) {
400 // make sure the klass is initialized
401 __ ld(G5_klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc), G3_t1);
402 __ cmp_and_br_short(G3_t1, instanceKlass::fully_initialized, Assembler::notEqual, Assembler::pn, slow_path);
403 }
404 #ifdef ASSERT
405 // assert object can be fast path allocated
406 {
407 Label ok, not_ok;
408 __ ld(G5_klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc), G1_obj_size);
409 // make sure it's an instance (LH > 0)
410 __ cmp_and_br_short(G1_obj_size, 0, Assembler::lessEqual, Assembler::pn, not_ok);
411 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
412 __ br(Assembler::zero, false, Assembler::pn, ok);
413 __ delayed()->nop();
414 __ bind(not_ok);
415 __ stop("assert(can be fast path allocated)");
416 __ should_not_reach_here();
417 __ bind(ok);
418 }
419 #endif // ASSERT
420 // if we got here then the TLAB allocation failed, so try
421 // refilling the TLAB or allocating directly from eden.
422 Label retry_tlab, try_eden;
423 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
425 __ bind(retry_tlab);
427 // get the instance size
428 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
430 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
432 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
433 __ verify_oop(O0_obj);
434 __ mov(O0, I0);
435 __ ret();
436 __ delayed()->restore();
438 __ bind(try_eden);
439 // get the instance size
440 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
441 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
442 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
444 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
445 __ verify_oop(O0_obj);
446 __ mov(O0, I0);
447 __ ret();
448 __ delayed()->restore();
450 __ bind(slow_path);
452 // pop this frame so generate_stub_call can push it's own
453 __ restore();
454 }
456 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
457 // I0->O0: new instance
458 }
460 break;
462 case counter_overflow_id:
463 // G4 contains bci, G5 contains method
464 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
465 break;
467 case new_type_array_id:
468 case new_object_array_id:
469 {
470 Register G5_klass = G5; // Incoming
471 Register G4_length = G4; // Incoming
472 Register O0_obj = O0; // Outgoing
474 Address klass_lh(G5_klass, ((klassOopDesc::header_size() * HeapWordSize)
475 + Klass::layout_helper_offset_in_bytes()));
476 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
477 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
478 // Use this offset to pick out an individual byte of the layout_helper:
479 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
480 - Klass::_lh_header_size_shift / BitsPerByte);
482 if (id == new_type_array_id) {
483 __ set_info("new_type_array", dont_gc_arguments);
484 } else {
485 __ set_info("new_object_array", dont_gc_arguments);
486 }
488 #ifdef ASSERT
489 // assert object type is really an array of the proper kind
490 {
491 Label ok;
492 Register G3_t1 = G3;
493 __ ld(klass_lh, G3_t1);
494 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
495 int tag = ((id == new_type_array_id)
496 ? Klass::_lh_array_tag_type_value
497 : Klass::_lh_array_tag_obj_value);
498 __ cmp_and_brx_short(G3_t1, tag, Assembler::equal, Assembler::pt, ok);
499 __ stop("assert(is an array klass)");
500 __ should_not_reach_here();
501 __ bind(ok);
502 }
503 #endif // ASSERT
505 if (UseTLAB && FastTLABRefill) {
506 Label slow_path;
507 Register G1_arr_size = G1;
508 Register G3_t1 = G3;
509 Register O1_t2 = O1;
510 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
512 // check that array length is small enough for fast path
513 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
514 __ cmp_and_br_short(G4_length, G3_t1, Assembler::greaterUnsigned, Assembler::pn, slow_path);
516 // if we got here then the TLAB allocation failed, so try
517 // refilling the TLAB or allocating directly from eden.
518 Label retry_tlab, try_eden;
519 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
521 __ bind(retry_tlab);
523 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
524 __ ld(klass_lh, G3_t1);
525 __ sll(G4_length, G3_t1, G1_arr_size);
526 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
527 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
528 __ add(G1_arr_size, G3_t1, G1_arr_size);
529 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
530 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
532 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
534 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
535 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
536 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
537 __ add(O0_obj, G3_t1, G3_t1); // body start
538 __ initialize_body(G3_t1, O1_t2);
539 __ verify_oop(O0_obj);
540 __ retl();
541 __ delayed()->nop();
543 __ bind(try_eden);
544 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
545 __ ld(klass_lh, G3_t1);
546 __ sll(G4_length, G3_t1, G1_arr_size);
547 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
548 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
549 __ add(G1_arr_size, G3_t1, G1_arr_size);
550 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
551 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
553 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
554 __ incr_allocated_bytes(G1_arr_size, G3_t1, O1_t2);
556 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
557 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
558 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
559 __ add(O0_obj, G3_t1, G3_t1); // body start
560 __ initialize_body(G3_t1, O1_t2);
561 __ verify_oop(O0_obj);
562 __ retl();
563 __ delayed()->nop();
565 __ bind(slow_path);
566 }
568 if (id == new_type_array_id) {
569 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
570 } else {
571 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
572 }
573 // I0 -> O0: new array
574 }
575 break;
577 case new_multi_array_id:
578 { // O0: klass
579 // O1: rank
580 // O2: address of 1st dimension
581 __ set_info("new_multi_array", dont_gc_arguments);
582 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
583 // I0 -> O0: new multi array
584 }
585 break;
587 case register_finalizer_id:
588 {
589 __ set_info("register_finalizer", dont_gc_arguments);
591 // load the klass and check the has finalizer flag
592 Label register_finalizer;
593 Register t = O1;
594 __ load_klass(O0, t);
595 __ ld(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc), t);
596 __ set(JVM_ACC_HAS_FINALIZER, G3);
597 __ andcc(G3, t, G0);
598 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
599 __ delayed()->nop();
601 // do a leaf return
602 __ retl();
603 __ delayed()->nop();
605 __ bind(register_finalizer);
606 OopMap* oop_map = save_live_registers(sasm);
607 int call_offset = __ call_RT(noreg, noreg,
608 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
609 oop_maps = new OopMapSet();
610 oop_maps->add_gc_map(call_offset, oop_map);
612 // Now restore all the live registers
613 restore_live_registers(sasm);
615 __ ret();
616 __ delayed()->restore();
617 }
618 break;
620 case throw_range_check_failed_id:
621 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
622 // G4: index
623 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
624 }
625 break;
627 case throw_index_exception_id:
628 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
629 // G4: index
630 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
631 }
632 break;
634 case throw_div0_exception_id:
635 { __ set_info("throw_div0_exception", dont_gc_arguments);
636 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
637 }
638 break;
640 case throw_null_pointer_exception_id:
641 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
642 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
643 }
644 break;
646 case handle_exception_id:
647 { __ set_info("handle_exception", dont_gc_arguments);
648 oop_maps = generate_handle_exception(id, sasm);
649 }
650 break;
652 case handle_exception_from_callee_id:
653 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
654 oop_maps = generate_handle_exception(id, sasm);
655 }
656 break;
658 case unwind_exception_id:
659 {
660 // O0: exception
661 // I7: address of call to this method
663 __ set_info("unwind_exception", dont_gc_arguments);
664 __ mov(Oexception, Oexception->after_save());
665 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
667 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
668 G2_thread, Oissuing_pc->after_save());
669 __ verify_not_null_oop(Oexception->after_save());
671 // Restore SP from L7 if the exception PC is a method handle call site.
672 __ mov(O0, G5); // Save the target address.
673 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
674 __ tst(L0); // Condition codes are preserved over the restore.
675 __ restore();
677 __ jmp(G5, 0);
678 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
679 }
680 break;
682 case throw_array_store_exception_id:
683 {
684 __ set_info("throw_array_store_exception", dont_gc_arguments);
685 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
686 }
687 break;
689 case throw_class_cast_exception_id:
690 {
691 // G4: object
692 __ set_info("throw_class_cast_exception", dont_gc_arguments);
693 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
694 }
695 break;
697 case throw_incompatible_class_change_error_id:
698 {
699 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
700 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
701 }
702 break;
704 case slow_subtype_check_id:
705 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
706 // Arguments :
707 //
708 // ret : G3
709 // sub : G3, argument, destroyed
710 // super: G1, argument, not changed
711 // raddr: O7, blown by call
712 Label miss;
714 __ save_frame(0); // Blow no registers!
716 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
718 __ mov(1, G3);
719 __ ret(); // Result in G5 is 'true'
720 __ delayed()->restore(); // free copy or add can go here
722 __ bind(miss);
723 __ mov(0, G3);
724 __ ret(); // Result in G5 is 'false'
725 __ delayed()->restore(); // free copy or add can go here
726 }
728 case monitorenter_nofpu_id:
729 case monitorenter_id:
730 { // G4: object
731 // G5: lock address
732 __ set_info("monitorenter", dont_gc_arguments);
734 int save_fpu_registers = (id == monitorenter_id);
735 // make a frame and preserve the caller's caller-save registers
736 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
738 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
740 oop_maps = new OopMapSet();
741 oop_maps->add_gc_map(call_offset, oop_map);
742 restore_live_registers(sasm, save_fpu_registers);
744 __ ret();
745 __ delayed()->restore();
746 }
747 break;
749 case monitorexit_nofpu_id:
750 case monitorexit_id:
751 { // G4: lock address
752 // note: really a leaf routine but must setup last java sp
753 // => use call_RT for now (speed can be improved by
754 // doing last java sp setup manually)
755 __ set_info("monitorexit", dont_gc_arguments);
757 int save_fpu_registers = (id == monitorexit_id);
758 // make a frame and preserve the caller's caller-save registers
759 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
761 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
763 oop_maps = new OopMapSet();
764 oop_maps->add_gc_map(call_offset, oop_map);
765 restore_live_registers(sasm, save_fpu_registers);
767 __ ret();
768 __ delayed()->restore();
770 }
771 break;
773 case access_field_patching_id:
774 { __ set_info("access_field_patching", dont_gc_arguments);
775 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
776 }
777 break;
779 case load_klass_patching_id:
780 { __ set_info("load_klass_patching", dont_gc_arguments);
781 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
782 }
783 break;
785 case jvmti_exception_throw_id:
786 { // Oexception : exception
787 __ set_info("jvmti_exception_throw", dont_gc_arguments);
788 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), I0);
789 }
790 break;
792 case dtrace_object_alloc_id:
793 { // O0: object
794 __ set_info("dtrace_object_alloc", dont_gc_arguments);
795 // we can't gc here so skip the oopmap but make sure that all
796 // the live registers get saved.
797 save_live_registers(sasm);
799 __ save_thread(L7_thread_cache);
800 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
801 relocInfo::runtime_call_type);
802 __ delayed()->mov(I0, O0);
803 __ restore_thread(L7_thread_cache);
805 restore_live_registers(sasm);
806 __ ret();
807 __ delayed()->restore();
808 }
809 break;
811 #ifndef SERIALGC
812 case g1_pre_barrier_slow_id:
813 { // G4: previous value of memory
814 BarrierSet* bs = Universe::heap()->barrier_set();
815 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
816 __ save_frame(0);
817 __ set((int)id, O1);
818 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
819 __ should_not_reach_here();
820 break;
821 }
823 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
825 Register pre_val = G4;
826 Register tmp = G1_scratch;
827 Register tmp2 = G3_scratch;
829 Label refill, restart;
830 bool with_frame = false; // I don't know if we can do with-frame.
831 int satb_q_index_byte_offset =
832 in_bytes(JavaThread::satb_mark_queue_offset() +
833 PtrQueue::byte_offset_of_index());
834 int satb_q_buf_byte_offset =
835 in_bytes(JavaThread::satb_mark_queue_offset() +
836 PtrQueue::byte_offset_of_buf());
837 __ bind(restart);
838 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
840 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false,
841 Assembler::pn, tmp, refill);
843 // If the branch is taken, no harm in executing this in the delay slot.
844 __ delayed()->ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
845 __ sub(tmp, oopSize, tmp);
847 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
848 // Use return-from-leaf
849 __ retl();
850 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
852 __ bind(refill);
853 __ save_frame(0);
855 __ mov(pre_val, L0);
856 __ mov(tmp, L1);
857 __ mov(tmp2, L2);
859 __ call_VM_leaf(L7_thread_cache,
860 CAST_FROM_FN_PTR(address,
861 SATBMarkQueueSet::handle_zero_index_for_thread),
862 G2_thread);
864 __ mov(L0, pre_val);
865 __ mov(L1, tmp);
866 __ mov(L2, tmp2);
868 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
869 __ delayed()->restore();
870 }
871 break;
873 case g1_post_barrier_slow_id:
874 {
875 BarrierSet* bs = Universe::heap()->barrier_set();
876 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
877 __ save_frame(0);
878 __ set((int)id, O1);
879 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
880 __ should_not_reach_here();
881 break;
882 }
884 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
886 Register addr = G4;
887 Register cardtable = G5;
888 Register tmp = G1_scratch;
889 Register tmp2 = G3_scratch;
890 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
892 Label not_already_dirty, restart, refill;
894 #ifdef _LP64
895 __ srlx(addr, CardTableModRefBS::card_shift, addr);
896 #else
897 __ srl(addr, CardTableModRefBS::card_shift, addr);
898 #endif
900 AddressLiteral rs(byte_map_base);
901 __ set(rs, cardtable); // cardtable := <card table base>
902 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
904 __ br_on_reg_cond(Assembler::rc_nz, /*annul*/false, Assembler::pt,
905 tmp, not_already_dirty);
906 // Get cardtable + tmp into a reg by itself -- useful in the take-the-branch
907 // case, harmless if not.
908 __ delayed()->add(addr, cardtable, tmp2);
910 // We didn't take the branch, so we're already dirty: return.
911 // Use return-from-leaf
912 __ retl();
913 __ delayed()->nop();
915 // Not dirty.
916 __ bind(not_already_dirty);
917 // First, dirty it.
918 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
920 Register tmp3 = cardtable;
921 Register tmp4 = tmp;
923 // these registers are now dead
924 addr = cardtable = tmp = noreg;
926 int dirty_card_q_index_byte_offset =
927 in_bytes(JavaThread::dirty_card_queue_offset() +
928 PtrQueue::byte_offset_of_index());
929 int dirty_card_q_buf_byte_offset =
930 in_bytes(JavaThread::dirty_card_queue_offset() +
931 PtrQueue::byte_offset_of_buf());
932 __ bind(restart);
933 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
935 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pn,
936 tmp3, refill);
937 // If the branch is taken, no harm in executing this in the delay slot.
938 __ delayed()->ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
939 __ sub(tmp3, oopSize, tmp3);
941 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
942 // Use return-from-leaf
943 __ retl();
944 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
946 __ bind(refill);
947 __ save_frame(0);
949 __ mov(tmp2, L0);
950 __ mov(tmp3, L1);
951 __ mov(tmp4, L2);
953 __ call_VM_leaf(L7_thread_cache,
954 CAST_FROM_FN_PTR(address,
955 DirtyCardQueueSet::handle_zero_index_for_thread),
956 G2_thread);
958 __ mov(L0, tmp2);
959 __ mov(L1, tmp3);
960 __ mov(L2, tmp4);
962 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
963 __ delayed()->restore();
964 }
965 break;
966 #endif // !SERIALGC
968 default:
969 { __ set_info("unimplemented entry", dont_gc_arguments);
970 __ save_frame(0);
971 __ set((int)id, O1);
972 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
973 __ should_not_reach_here();
974 }
975 break;
976 }
977 return oop_maps;
978 }
981 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
982 __ block_comment("generate_handle_exception");
984 // Save registers, if required.
985 OopMapSet* oop_maps = new OopMapSet();
986 OopMap* oop_map = NULL;
987 switch (id) {
988 case forward_exception_id:
989 // We're handling an exception in the context of a compiled frame.
990 // The registers have been saved in the standard places. Perform
991 // an exception lookup in the caller and dispatch to the handler
992 // if found. Otherwise unwind and dispatch to the callers
993 // exception handler.
994 oop_map = generate_oop_map(sasm, true);
996 // transfer the pending exception to the exception_oop
997 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
998 __ ld_ptr(Oexception, 0, G0);
999 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
1000 __ add(I7, frame::pc_return_offset, Oissuing_pc);
1001 break;
1002 case handle_exception_id:
1003 // At this point all registers MAY be live.
1004 oop_map = save_live_registers(sasm);
1005 __ mov(Oexception->after_save(), Oexception);
1006 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1007 break;
1008 case handle_exception_from_callee_id:
1009 // At this point all registers except exception oop (Oexception)
1010 // and exception pc (Oissuing_pc) are dead.
1011 oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
1012 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
1013 __ save_frame_c1(frame_size_in_bytes);
1014 __ mov(Oexception->after_save(), Oexception);
1015 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1016 break;
1017 default: ShouldNotReachHere();
1018 }
1020 __ verify_not_null_oop(Oexception);
1022 // save the exception and issuing pc in the thread
1023 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
1024 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
1026 // use the throwing pc as the return address to lookup (has bci & oop map)
1027 __ mov(Oissuing_pc, I7);
1028 __ sub(I7, frame::pc_return_offset, I7);
1029 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1030 oop_maps->add_gc_map(call_offset, oop_map);
1032 // Note: if nmethod has been deoptimized then regardless of
1033 // whether it had a handler or not we will deoptimize
1034 // by entering the deopt blob with a pending exception.
1036 // Restore the registers that were saved at the beginning, remove
1037 // the frame and jump to the exception handler.
1038 switch (id) {
1039 case forward_exception_id:
1040 case handle_exception_id:
1041 restore_live_registers(sasm);
1042 __ jmp(O0, 0);
1043 __ delayed()->restore();
1044 break;
1045 case handle_exception_from_callee_id:
1046 // Restore SP from L7 if the exception PC is a method handle call site.
1047 __ mov(O0, G5); // Save the target address.
1048 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
1049 __ tst(L0); // Condition codes are preserved over the restore.
1050 __ restore();
1052 __ jmp(G5, 0); // jump to the exception handler
1053 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
1054 break;
1055 default: ShouldNotReachHere();
1056 }
1058 return oop_maps;
1059 }
1062 #undef __
1064 const char *Runtime1::pd_name_for_address(address entry) {
1065 return "<unknown function>";
1066 }
