src/share/vm/opto/postaloc.cpp

Fri, 16 Oct 2009 02:05:46 -0700

author
ysr
date
Fri, 16 Oct 2009 02:05:46 -0700
changeset 1462
39b01ab7035a
parent 1358
a70508bb21c3
child 1383
89e0543e1737
permissions
-rw-r--r--

6888898: CMS: ReduceInitialCardMarks unsafe in the presence of cms precleaning
6889757: G1: enable card mark elision for initializing writes from compiled code (ReduceInitialCardMarks)
Summary: Defer the (compiler-elided) card-mark upon a slow-path allocation until after the store and before the next subsequent safepoint; G1 now answers yes to can_elide_tlab_write_barriers().
Reviewed-by: jcoomes, kvn, never

     1 /*
     2  * Copyright 1998-2008 Sun Microsystems, Inc.  All Rights Reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
    20  * CA 95054 USA or visit www.sun.com if you need additional information or
    21  * have any questions.
    22  *
    23  */
    25 #include "incls/_precompiled.incl"
    26 #include "incls/_postaloc.cpp.incl"
    28 // see if this register kind does not requires two registers
    29 static bool is_single_register(uint x) {
    30 #ifdef _LP64
    31   return (x != Op_RegD && x != Op_RegL && x != Op_RegP);
    32 #else
    33   return (x != Op_RegD && x != Op_RegL);
    34 #endif
    35 }
    37 //---------------------------may_be_copy_of_callee-----------------------------
    38 // Check to see if we can possibly be a copy of a callee-save value.
    39 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
    40   // Short circuit if there are no callee save registers
    41   if (_matcher.number_of_saved_registers() == 0) return false;
    43   // Expect only a spill-down and reload on exit for callee-save spills.
    44   // Chains of copies cannot be deep.
    45   // 5008997 - This is wishful thinking. Register allocator seems to
    46   // be splitting live ranges for callee save registers to such
    47   // an extent that in large methods the chains can be very long
    48   // (50+). The conservative answer is to return true if we don't
    49   // know as this prevents optimizations from occurring.
    51   const int limit = 60;
    52   int i;
    53   for( i=0; i < limit; i++ ) {
    54     if( def->is_Proj() && def->in(0)->is_Start() &&
    55         _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
    56       return true;              // Direct use of callee-save proj
    57     if( def->is_Copy() )        // Copies carry value through
    58       def = def->in(def->is_Copy());
    59     else if( def->is_Phi() )    // Phis can merge it from any direction
    60       def = def->in(1);
    61     else
    62       break;
    63     guarantee(def != NULL, "must not resurrect dead copy");
    64   }
    65   // If we reached the end and didn't find a callee save proj
    66   // then this may be a callee save proj so we return true
    67   // as the conservative answer. If we didn't reach then end
    68   // we must have discovered that it was not a callee save
    69   // else we would have returned.
    70   return i == limit;
    71 }
    75 //------------------------------yank_if_dead-----------------------------------
    76 // Removed an edge from 'old'.  Yank if dead.  Return adjustment counts to
    77 // iterators in the current block.
    78 int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
    79   int blk_adjust=0;
    80   while (old->outcnt() == 0 && old != C->top()) {
    81     Block *oldb = _cfg._bbs[old->_idx];
    82     oldb->find_remove(old);
    83     // Count 1 if deleting an instruction from the current block
    84     if( oldb == current_block ) blk_adjust++;
    85     _cfg._bbs.map(old->_idx,NULL);
    86     OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
    87     if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
    88       value->map(old_reg,NULL);  // Yank from value/regnd maps
    89       regnd->map(old_reg,NULL);  // This register's value is now unknown
    90     }
    91     assert(old->req() <= 2, "can't handle more inputs");
    92     Node *tmp = old->req() > 1 ? old->in(1) : NULL;
    93     old->disconnect_inputs(NULL);
    94     if( !tmp ) break;
    95     old = tmp;
    96   }
    97   return blk_adjust;
    98 }
   100 //------------------------------use_prior_register-----------------------------
   101 // Use the prior value instead of the current value, in an effort to make
   102 // the current value go dead.  Return block iterator adjustment, in case
   103 // we yank some instructions from this block.
   104 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd ) {
   105   // No effect?
   106   if( def == n->in(idx) ) return 0;
   107   // Def is currently dead and can be removed?  Do not resurrect
   108   if( def->outcnt() == 0 ) return 0;
   110   // Not every pair of physical registers are assignment compatible,
   111   // e.g. on sparc floating point registers are not assignable to integer
   112   // registers.
   113   const LRG &def_lrg = lrgs(n2lidx(def));
   114   OptoReg::Name def_reg = def_lrg.reg();
   115   const RegMask &use_mask = n->in_RegMask(idx);
   116   bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
   117                                                    : (use_mask.is_AllStack() != 0));
   118   // Check for a copy to or from a misaligned pair.
   119   can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair();
   121   if (!can_use)
   122     return 0;
   124   // Capture the old def in case it goes dead...
   125   Node *old = n->in(idx);
   127   // Save-on-call copies can only be elided if the entire copy chain can go
   128   // away, lest we get the same callee-save value alive in 2 locations at
   129   // once.  We check for the obvious trivial case here.  Although it can
   130   // sometimes be elided with cooperation outside our scope, here we will just
   131   // miss the opportunity.  :-(
   132   if( may_be_copy_of_callee(def) ) {
   133     if( old->outcnt() > 1 ) return 0; // We're the not last user
   134     int idx = old->is_Copy();
   135     assert( idx, "chain of copies being removed" );
   136     Node *old2 = old->in(idx);  // Chain of copies
   137     if( old2->outcnt() > 1 ) return 0; // old is not the last user
   138     int idx2 = old2->is_Copy();
   139     if( !idx2 ) return 0;       // Not a chain of 2 copies
   140     if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
   141   }
   143   // Use the new def
   144   n->set_req(idx,def);
   145   _post_alloc++;
   147   // Is old def now dead?  We successfully yanked a copy?
   148   return yank_if_dead(old,current_block,&value,&regnd);
   149 }
   152 //------------------------------skip_copies------------------------------------
   153 // Skip through any number of copies (that don't mod oop-i-ness)
   154 Node *PhaseChaitin::skip_copies( Node *c ) {
   155   int idx = c->is_Copy();
   156   uint is_oop = lrgs(n2lidx(c))._is_oop;
   157   while (idx != 0) {
   158     guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
   159     if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
   160       break;  // casting copy, not the same value
   161     c = c->in(idx);
   162     idx = c->is_Copy();
   163   }
   164   return c;
   165 }
   167 //------------------------------elide_copy-------------------------------------
   168 // Remove (bypass) copies along Node n, edge k.
   169 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs ) {
   170   int blk_adjust = 0;
   172   uint nk_idx = n2lidx(n->in(k));
   173   OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
   175   // Remove obvious same-register copies
   176   Node *x = n->in(k);
   177   int idx;
   178   while( (idx=x->is_Copy()) != 0 ) {
   179     Node *copy = x->in(idx);
   180     guarantee(copy != NULL, "must not resurrect dead copy");
   181     if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
   182     blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
   183     if( n->in(k) != copy ) break; // Failed for some cutout?
   184     x = copy;                   // Progress, try again
   185   }
   187   // Phis and 2-address instructions cannot change registers so easily - their
   188   // outputs must match their input.
   189   if( !can_change_regs )
   190     return blk_adjust;          // Only check stupid copies!
   192   // Loop backedges won't have a value-mapping yet
   193   if( &value == NULL ) return blk_adjust;
   195   // Skip through all copies to the _value_ being used.  Do not change from
   196   // int to pointer.  This attempts to jump through a chain of copies, where
   197   // intermediate copies might be illegal, i.e., value is stored down to stack
   198   // then reloaded BUT survives in a register the whole way.
   199   Node *val = skip_copies(n->in(k));
   201   if( val == x ) return blk_adjust; // No progress?
   203   bool single = is_single_register(val->ideal_reg());
   204   uint val_idx = n2lidx(val);
   205   OptoReg::Name val_reg = lrgs(val_idx).reg();
   207   // See if it happens to already be in the correct register!
   208   // (either Phi's direct register, or the common case of the name
   209   // never-clobbered original-def register)
   210   if( value[val_reg] == val &&
   211       // Doubles check both halves
   212       ( single || value[val_reg-1] == val ) ) {
   213     blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
   214     if( n->in(k) == regnd[val_reg] ) // Success!  Quit trying
   215       return blk_adjust;
   216   }
   218   // See if we can skip the copy by changing registers.  Don't change from
   219   // using a register to using the stack unless we know we can remove a
   220   // copy-load.  Otherwise we might end up making a pile of Intel cisc-spill
   221   // ops reading from memory instead of just loading once and using the
   222   // register.
   224   // Also handle duplicate copies here.
   225   const Type *t = val->is_Con() ? val->bottom_type() : NULL;
   227   // Scan all registers to see if this value is around already
   228   for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
   229     if (reg == (uint)nk_reg) {
   230       // Found ourselves so check if there is only one user of this
   231       // copy and keep on searching for a better copy if so.
   232       bool ignore_self = true;
   233       x = n->in(k);
   234       DUIterator_Fast imax, i = x->fast_outs(imax);
   235       Node* first = x->fast_out(i); i++;
   236       while (i < imax && ignore_self) {
   237         Node* use = x->fast_out(i); i++;
   238         if (use != first) ignore_self = false;
   239       }
   240       if (ignore_self) continue;
   241     }
   243     Node *vv = value[reg];
   244     if( !single ) {             // Doubles check for aligned-adjacent pair
   245       if( (reg&1)==0 ) continue;  // Wrong half of a pair
   246       if( vv != value[reg-1] ) continue; // Not a complete pair
   247     }
   248     if( vv == val ||            // Got a direct hit?
   249         (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
   250          vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
   251       assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
   252       if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
   253           OptoReg::is_reg(reg) || // turning into a register use OR
   254           regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
   255         blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
   256         if( n->in(k) == regnd[reg] ) // Success!  Quit trying
   257           return blk_adjust;
   258       } // End of if not degrading to a stack
   259     } // End of if found value in another register
   260   } // End of scan all machine registers
   261   return blk_adjust;
   262 }
   265 //
   266 // Check if nreg already contains the constant value val.  Normal copy
   267 // elimination doesn't doesn't work on constants because multiple
   268 // nodes can represent the same constant so the type and rule of the
   269 // MachNode must be checked to ensure equivalence.
   270 //
   271 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
   272                                               Block *current_block,
   273                                               Node_List& value, Node_List& regnd,
   274                                               OptoReg::Name nreg, OptoReg::Name nreg2) {
   275   if (value[nreg] != val && val->is_Con() &&
   276       value[nreg] != NULL && value[nreg]->is_Con() &&
   277       (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
   278       value[nreg]->bottom_type() == val->bottom_type() &&
   279       value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
   280     // This code assumes that two MachNodes representing constants
   281     // which have the same rule and the same bottom type will produce
   282     // identical effects into a register.  This seems like it must be
   283     // objectively true unless there are hidden inputs to the nodes
   284     // but if that were to change this code would need to updated.
   285     // Since they are equivalent the second one if redundant and can
   286     // be removed.
   287     //
   288     // n will be replaced with the old value but n might have
   289     // kills projections associated with it so remove them now so that
   290     // yank_if_dead will be able to eliminate the copy once the uses
   291     // have been transferred to the old[value].
   292     for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
   293       Node* use = n->fast_out(i);
   294       if (use->is_Proj() && use->outcnt() == 0) {
   295         // Kill projections have no users and one input
   296         use->set_req(0, C->top());
   297         yank_if_dead(use, current_block, &value, &regnd);
   298         --i; --imax;
   299       }
   300     }
   301     _post_alloc++;
   302     return true;
   303   }
   304   return false;
   305 }
   308 //------------------------------post_allocate_copy_removal---------------------
   309 // Post-Allocation peephole copy removal.  We do this in 1 pass over the
   310 // basic blocks.  We maintain a mapping of registers to Nodes (an  array of
   311 // Nodes indexed by machine register or stack slot number).  NULL means that a
   312 // register is not mapped to any Node.  We can (want to have!) have several
   313 // registers map to the same Node.  We walk forward over the instructions
   314 // updating the mapping as we go.  At merge points we force a NULL if we have
   315 // to merge 2 different Nodes into the same register.  Phi functions will give
   316 // us a new Node if there is a proper value merging.  Since the blocks are
   317 // arranged in some RPO, we will visit all parent blocks before visiting any
   318 // successor blocks (except at loops).
   319 //
   320 // If we find a Copy we look to see if the Copy's source register is a stack
   321 // slot and that value has already been loaded into some machine register; if
   322 // so we use machine register directly.  This turns a Load into a reg-reg
   323 // Move.  We also look for reloads of identical constants.
   324 //
   325 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
   326 // source directly and make the copy go dead.
   327 void PhaseChaitin::post_allocate_copy_removal() {
   328   NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
   329   ResourceMark rm;
   331   // Need a mapping from basic block Node_Lists.  We need a Node_List to
   332   // map from register number to value-producing Node.
   333   Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
   334   memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
   335   // Need a mapping from basic block Node_Lists.  We need a Node_List to
   336   // map from register number to register-defining Node.
   337   Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
   338   memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
   340   // We keep unused Node_Lists on a free_list to avoid wasting
   341   // memory.
   342   GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
   344   // For all blocks
   345   for( uint i = 0; i < _cfg._num_blocks; i++ ) {
   346     uint j;
   347     Block *b = _cfg._blocks[i];
   349     // Count of Phis in block
   350     uint phi_dex;
   351     for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
   352       Node *phi = b->_nodes[phi_dex];
   353       if( !phi->is_Phi() )
   354         break;
   355     }
   357     // If any predecessor has not been visited, we do not know the state
   358     // of registers at the start.  Check for this, while updating copies
   359     // along Phi input edges
   360     bool missing_some_inputs = false;
   361     Block *freed = NULL;
   362     for( j = 1; j < b->num_preds(); j++ ) {
   363       Block *pb = _cfg._bbs[b->pred(j)->_idx];
   364       // Remove copies along phi edges
   365       for( uint k=1; k<phi_dex; k++ )
   366         elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
   367       if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
   368         // See if this predecessor's mappings have been used by everybody
   369         // who wants them.  If so, free 'em.
   370         uint k;
   371         for( k=0; k<pb->_num_succs; k++ ) {
   372           Block *pbsucc = pb->_succs[k];
   373           if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
   374             break;              // Found a future user
   375         }
   376         if( k >= pb->_num_succs ) { // No more uses, free!
   377           freed = pb;           // Record last block freed
   378           free_list.push(blk2value[pb->_pre_order]);
   379           free_list.push(blk2regnd[pb->_pre_order]);
   380         }
   381       } else {                  // This block has unvisited (loopback) inputs
   382         missing_some_inputs = true;
   383       }
   384     }
   387     // Extract Node_List mappings.  If 'freed' is non-zero, we just popped
   388     // 'freed's blocks off the list
   389     Node_List &regnd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
   390     Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
   391     assert( !freed || blk2value[freed->_pre_order] == &value, "" );
   392     value.map(_max_reg,NULL);
   393     regnd.map(_max_reg,NULL);
   394     // Set mappings as OUR mappings
   395     blk2value[b->_pre_order] = &value;
   396     blk2regnd[b->_pre_order] = &regnd;
   398     // Initialize value & regnd for this block
   399     if( missing_some_inputs ) {
   400       // Some predecessor has not yet been visited; zap map to empty
   401       for( uint k = 0; k < (uint)_max_reg; k++ ) {
   402         value.map(k,NULL);
   403         regnd.map(k,NULL);
   404       }
   405     } else {
   406       if( !freed ) {            // Didn't get a freebie prior block
   407         // Must clone some data
   408         freed = _cfg._bbs[b->pred(1)->_idx];
   409         Node_List &f_value = *blk2value[freed->_pre_order];
   410         Node_List &f_regnd = *blk2regnd[freed->_pre_order];
   411         for( uint k = 0; k < (uint)_max_reg; k++ ) {
   412           value.map(k,f_value[k]);
   413           regnd.map(k,f_regnd[k]);
   414         }
   415       }
   416       // Merge all inputs together, setting to NULL any conflicts.
   417       for( j = 1; j < b->num_preds(); j++ ) {
   418         Block *pb = _cfg._bbs[b->pred(j)->_idx];
   419         if( pb == freed ) continue; // Did self already via freelist
   420         Node_List &p_regnd = *blk2regnd[pb->_pre_order];
   421         for( uint k = 0; k < (uint)_max_reg; k++ ) {
   422           if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
   423             value.map(k,NULL); // Then no value handy
   424             regnd.map(k,NULL);
   425           }
   426         }
   427       }
   428     }
   430     // For all Phi's
   431     for( j = 1; j < phi_dex; j++ ) {
   432       uint k;
   433       Node *phi = b->_nodes[j];
   434       uint pidx = n2lidx(phi);
   435       OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
   437       // Remove copies remaining on edges.  Check for junk phi.
   438       Node *u = NULL;
   439       for( k=1; k<phi->req(); k++ ) {
   440         Node *x = phi->in(k);
   441         if( phi != x && u != x ) // Found a different input
   442           u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
   443       }
   444       if( u != NodeSentinel ) {    // Junk Phi.  Remove
   445         b->_nodes.remove(j--); phi_dex--;
   446         _cfg._bbs.map(phi->_idx,NULL);
   447         phi->replace_by(u);
   448         phi->disconnect_inputs(NULL);
   449         continue;
   450       }
   451       // Note that if value[pidx] exists, then we merged no new values here
   452       // and the phi is useless.  This can happen even with the above phi
   453       // removal for complex flows.  I cannot keep the better known value here
   454       // because locally the phi appears to define a new merged value.  If I
   455       // keep the better value then a copy of the phi, being unable to use the
   456       // global flow analysis, can't "peek through" the phi to the original
   457       // reaching value and so will act like it's defining a new value.  This
   458       // can lead to situations where some uses are from the old and some from
   459       // the new values.  Not illegal by itself but throws the over-strong
   460       // assert in scheduling.
   461       if( pidx ) {
   462         value.map(preg,phi);
   463         regnd.map(preg,phi);
   464         OptoReg::Name preg_lo = OptoReg::add(preg,-1);
   465         if( !is_single_register(phi->ideal_reg()) ) {
   466           value.map(preg_lo,phi);
   467           regnd.map(preg_lo,phi);
   468         }
   469       }
   470     }
   472     // For all remaining instructions
   473     for( j = phi_dex; j < b->_nodes.size(); j++ ) {
   474       Node *n = b->_nodes[j];
   476       if( n->outcnt() == 0 &&   // Dead?
   477           n != C->top() &&      // (ignore TOP, it has no du info)
   478           !n->is_Proj() ) {     // fat-proj kills
   479         j -= yank_if_dead(n,b,&value,&regnd);
   480         continue;
   481       }
   483       // Improve reaching-def info.  Occasionally post-alloc's liveness gives
   484       // up (at loop backedges, because we aren't doing a full flow pass).
   485       // The presence of a live use essentially asserts that the use's def is
   486       // alive and well at the use (or else the allocator fubar'd).  Take
   487       // advantage of this info to set a reaching def for the use-reg.
   488       uint k;
   489       for( k = 1; k < n->req(); k++ ) {
   490         Node *def = n->in(k);   // n->in(k) is a USE; def is the DEF for this USE
   491         guarantee(def != NULL, "no disconnected nodes at this point");
   492         uint useidx = n2lidx(def); // useidx is the live range index for this USE
   494         if( useidx ) {
   495           OptoReg::Name ureg = lrgs(useidx).reg();
   496           if( !value[ureg] ) {
   497             int idx;            // Skip occasional useless copy
   498             while( (idx=def->is_Copy()) != 0 &&
   499                    def->in(idx) != NULL &&  // NULL should not happen
   500                    ureg == lrgs(n2lidx(def->in(idx))).reg() )
   501               def = def->in(idx);
   502             Node *valdef = skip_copies(def); // tighten up val through non-useless copies
   503             value.map(ureg,valdef); // record improved reaching-def info
   504             regnd.map(ureg,   def);
   505             // Record other half of doubles
   506             OptoReg::Name ureg_lo = OptoReg::add(ureg,-1);
   507             if( !is_single_register(def->ideal_reg()) &&
   508                 ( !RegMask::can_represent(ureg_lo) ||
   509                   lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent
   510                 !value[ureg_lo] ) {
   511               value.map(ureg_lo,valdef); // record improved reaching-def info
   512               regnd.map(ureg_lo,   def);
   513             }
   514           }
   515         }
   516       }
   518       const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
   520       // Remove copies along input edges
   521       for( k = 1; k < n->req(); k++ )
   522         j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
   524       // Unallocated Nodes define no registers
   525       uint lidx = n2lidx(n);
   526       if( !lidx ) continue;
   528       // Update the register defined by this instruction
   529       OptoReg::Name nreg = lrgs(lidx).reg();
   530       // Skip through all copies to the _value_ being defined.
   531       // Do not change from int to pointer
   532       Node *val = skip_copies(n);
   534       // Clear out a dead definition before starting so that the
   535       // elimination code doesn't have to guard against it.  The
   536       // definition could in fact be a kill projection with a count of
   537       // 0 which is safe but since those are uninteresting for copy
   538       // elimination just delete them as well.
   539       if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
   540         regnd.map(nreg, NULL);
   541         value.map(nreg, NULL);
   542       }
   544       uint n_ideal_reg = n->ideal_reg();
   545       if( is_single_register(n_ideal_reg) ) {
   546         // If Node 'n' does not change the value mapped by the register,
   547         // then 'n' is a useless copy.  Do not update the register->node
   548         // mapping so 'n' will go dead.
   549         if( value[nreg] != val ) {
   550           if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
   551             j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
   552           } else {
   553             // Update the mapping: record new Node defined by the register
   554             regnd.map(nreg,n);
   555             // Update mapping for defined *value*, which is the defined
   556             // Node after skipping all copies.
   557             value.map(nreg,val);
   558           }
   559         } else if( !may_be_copy_of_callee(n) ) {
   560           assert( n->is_Copy(), "" );
   561           j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
   562         }
   563       } else {
   564         // If the value occupies a register pair, record same info
   565         // in both registers.
   566         OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
   567         if( RegMask::can_represent(nreg_lo) &&     // Either a spill slot, or
   568             !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
   569           // Sparc occasionally has non-adjacent pairs.
   570           // Find the actual other value
   571           RegMask tmp = lrgs(lidx).mask();
   572           tmp.Remove(nreg);
   573           nreg_lo = tmp.find_first_elem();
   574         }
   575         if( value[nreg] != val || value[nreg_lo] != val ) {
   576           if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
   577             j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
   578           } else {
   579             regnd.map(nreg   , n );
   580             regnd.map(nreg_lo, n );
   581             value.map(nreg   ,val);
   582             value.map(nreg_lo,val);
   583           }
   584         } else if( !may_be_copy_of_callee(n) ) {
   585           assert( n->is_Copy(), "" );
   586           j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
   587         }
   588       }
   590       // Fat projections kill many registers
   591       if( n_ideal_reg == MachProjNode::fat_proj ) {
   592         RegMask rm = n->out_RegMask();
   593         // wow, what an expensive iterator...
   594         nreg = rm.find_first_elem();
   595         while( OptoReg::is_valid(nreg)) {
   596           rm.Remove(nreg);
   597           value.map(nreg,n);
   598           regnd.map(nreg,n);
   599           nreg = rm.find_first_elem();
   600         }
   601       }
   603     } // End of for all instructions in the block
   605   } // End for all blocks
   606 }

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