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src/share/vm/c1/c1_LIR.hpp@2d8a650513c2
src/share/vm/c1/c1_LIR.hpp
Fri, 29 Apr 2016 00:06:10 +0800
- author
- aoqi
- date
- Fri, 29 Apr 2016 00:06:10 +0800
- changeset 1
- 2d8a650513c2
- parent 0
- f90c822e73f8
- child 6876
- 710a3c8b516e
- permissions
- -rw-r--r--
Added MIPS 64-bit port.
1 /*
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 /*
26 * This file has been modified by Loongson Technology in 2015. These
27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
31 #ifndef SHARE_VM_C1_C1_LIR_HPP
32 #define SHARE_VM_C1_C1_LIR_HPP
34 #include "c1/c1_ValueType.hpp"
35 #include "oops/method.hpp"
37 class BlockBegin;
38 class BlockList;
39 class LIR_Assembler;
40 class CodeEmitInfo;
41 class CodeStub;
42 class CodeStubList;
43 class ArrayCopyStub;
44 class LIR_Op;
45 class ciType;
46 class ValueType;
47 class LIR_OpVisitState;
48 class FpuStackSim;
50 //---------------------------------------------------------------------
51 // LIR Operands
52 // LIR_OprDesc
53 // LIR_OprPtr
54 // LIR_Const
55 // LIR_Address
56 //---------------------------------------------------------------------
57 class LIR_OprDesc;
58 class LIR_OprPtr;
59 class LIR_Const;
60 class LIR_Address;
61 class LIR_OprVisitor;
64 typedef LIR_OprDesc* LIR_Opr;
65 typedef int RegNr;
67 define_array(LIR_OprArray, LIR_Opr)
68 define_stack(LIR_OprList, LIR_OprArray)
70 define_array(LIR_OprRefArray, LIR_Opr*)
71 define_stack(LIR_OprRefList, LIR_OprRefArray)
73 define_array(CodeEmitInfoArray, CodeEmitInfo*)
74 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
76 define_array(LIR_OpArray, LIR_Op*)
77 define_stack(LIR_OpList, LIR_OpArray)
79 // define LIR_OprPtr early so LIR_OprDesc can refer to it
80 class LIR_OprPtr: public CompilationResourceObj {
81 public:
82 bool is_oop_pointer() const { return (type() == T_OBJECT); }
83 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
85 virtual LIR_Const* as_constant() { return NULL; }
86 virtual LIR_Address* as_address() { return NULL; }
87 virtual BasicType type() const = 0;
88 virtual void print_value_on(outputStream* out) const = 0;
89 };
93 // LIR constants
94 class LIR_Const: public LIR_OprPtr {
95 private:
96 JavaValue _value;
98 void type_check(BasicType t) const { assert(type() == t, "type check"); }
99 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
100 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
102 public:
103 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
104 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
105 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
106 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
107 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
108 LIR_Const(void* p) {
109 #ifdef _LP64
110 assert(sizeof(jlong) >= sizeof(p), "too small");;
111 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
112 #else
113 assert(sizeof(jint) >= sizeof(p), "too small");;
114 _value.set_type(T_INT); _value.set_jint((jint)p);
115 #endif
116 }
117 LIR_Const(Metadata* m) {
118 _value.set_type(T_METADATA);
119 #ifdef _LP64
120 _value.set_jlong((jlong)m);
121 #else
122 _value.set_jint((jint)m);
123 #endif // _LP64
124 }
126 virtual BasicType type() const { return _value.get_type(); }
127 virtual LIR_Const* as_constant() { return this; }
129 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
130 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
131 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
132 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
133 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
134 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
135 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
137 #ifdef _LP64
138 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
139 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
140 #else
141 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
142 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
143 #endif
146 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
147 jint as_jint_lo_bits() const {
148 if (type() == T_DOUBLE) {
149 return low(jlong_cast(_value.get_jdouble()));
150 } else {
151 return as_jint_lo();
152 }
153 }
154 jint as_jint_hi_bits() const {
155 if (type() == T_DOUBLE) {
156 return high(jlong_cast(_value.get_jdouble()));
157 } else {
158 return as_jint_hi();
159 }
160 }
161 jlong as_jlong_bits() const {
162 if (type() == T_DOUBLE) {
163 return jlong_cast(_value.get_jdouble());
164 } else {
165 return as_jlong();
166 }
167 }
169 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
172 bool is_zero_float() {
173 jfloat f = as_jfloat();
174 jfloat ok = 0.0f;
175 return jint_cast(f) == jint_cast(ok);
176 }
178 bool is_one_float() {
179 jfloat f = as_jfloat();
180 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
181 }
183 bool is_zero_double() {
184 jdouble d = as_jdouble();
185 jdouble ok = 0.0;
186 return jlong_cast(d) == jlong_cast(ok);
187 }
189 bool is_one_double() {
190 jdouble d = as_jdouble();
191 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
192 }
193 };
196 //---------------------LIR Operand descriptor------------------------------------
197 //
198 // The class LIR_OprDesc represents a LIR instruction operand;
199 // it can be a register (ALU/FPU), stack location or a constant;
200 // Constants and addresses are represented as resource area allocated
201 // structures (see above).
202 // Registers and stack locations are inlined into the this pointer
203 // (see value function).
205 class LIR_OprDesc: public CompilationResourceObj {
206 public:
207 // value structure:
208 // data opr-type opr-kind
209 // +--------------+-------+-------+
210 // [max...........|7 6 5 4|3 2 1 0]
211 // ^
212 // is_pointer bit
213 //
214 // lowest bit cleared, means it is a structure pointer
215 // we need 4 bits to represent types
217 private:
218 friend class LIR_OprFact;
220 // Conversion
221 intptr_t value() const { return (intptr_t) this; }
223 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
224 return (value() & mask) == masked_value;
225 }
227 enum OprKind {
228 pointer_value = 0
229 , stack_value = 1
230 , cpu_register = 3
231 , fpu_register = 5
232 , illegal_value = 7
233 };
235 enum OprBits {
236 pointer_bits = 1
237 , kind_bits = 3
238 , type_bits = 4
239 , size_bits = 2
240 , destroys_bits = 1
241 , virtual_bits = 1
242 , is_xmm_bits = 1
243 , last_use_bits = 1
244 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
245 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
246 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
247 , data_bits = BitsPerInt - non_data_bits
248 , reg_bits = data_bits / 2 // for two registers in one value encoding
249 };
251 enum OprShift {
252 kind_shift = 0
253 , type_shift = kind_shift + kind_bits
254 , size_shift = type_shift + type_bits
255 , destroys_shift = size_shift + size_bits
256 , last_use_shift = destroys_shift + destroys_bits
257 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
258 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
259 , is_xmm_shift = virtual_shift + virtual_bits
260 , data_shift = is_xmm_shift + is_xmm_bits
261 , reg1_shift = data_shift
262 , reg2_shift = data_shift + reg_bits
264 };
266 enum OprSize {
267 single_size = 0 << size_shift
268 , double_size = 1 << size_shift
269 };
271 enum OprMask {
272 kind_mask = right_n_bits(kind_bits)
273 , type_mask = right_n_bits(type_bits) << type_shift
274 , size_mask = right_n_bits(size_bits) << size_shift
275 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
276 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
277 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
278 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
279 , pointer_mask = right_n_bits(pointer_bits)
280 , lower_reg_mask = right_n_bits(reg_bits)
281 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
282 };
284 uintptr_t data() const { return value() >> data_shift; }
285 int lo_reg_half() const { return data() & lower_reg_mask; }
286 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
287 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
288 OprSize size_field() const { return (OprSize)(value() & size_mask); }
290 static char type_char(BasicType t);
292 public:
293 enum {
294 vreg_base = ConcreteRegisterImpl::number_of_registers,
295 vreg_max = (1 << data_bits) - 1
296 };
298 static inline LIR_Opr illegalOpr();
300 enum OprType {
301 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
302 , int_type = 1 << type_shift
303 , long_type = 2 << type_shift
304 , object_type = 3 << type_shift
305 , address_type = 4 << type_shift
306 , float_type = 5 << type_shift
307 , double_type = 6 << type_shift
308 , metadata_type = 7 << type_shift
309 };
310 friend OprType as_OprType(BasicType t);
311 friend BasicType as_BasicType(OprType t);
313 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
314 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
316 static OprSize size_for(BasicType t) {
317 switch (t) {
318 case T_LONG:
319 case T_DOUBLE:
320 return double_size;
321 break;
323 case T_FLOAT:
324 case T_BOOLEAN:
325 case T_CHAR:
326 case T_BYTE:
327 case T_SHORT:
328 case T_INT:
329 case T_ADDRESS:
330 case T_OBJECT:
331 case T_ARRAY:
332 case T_METADATA:
333 return single_size;
334 break;
336 default:
337 ShouldNotReachHere();
338 return single_size;
339 }
340 }
343 void validate_type() const PRODUCT_RETURN;
345 BasicType type() const {
346 if (is_pointer()) {
347 return pointer()->type();
348 }
349 return as_BasicType(type_field());
350 }
353 ValueType* value_type() const { return as_ValueType(type()); }
355 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
357 bool is_equal(LIR_Opr opr) const { return this == opr; }
358 // checks whether types are same
359 bool is_same_type(LIR_Opr opr) const {
360 assert(type_field() != unknown_type &&
361 opr->type_field() != unknown_type, "shouldn't see unknown_type");
362 return type_field() == opr->type_field();
363 }
364 bool is_same_register(LIR_Opr opr) {
365 return (is_register() && opr->is_register() &&
366 kind_field() == opr->kind_field() &&
367 (value() & no_type_mask) == (opr->value() & no_type_mask));
368 }
370 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
371 bool is_illegal() const { return kind_field() == illegal_value; }
372 bool is_valid() const { return kind_field() != illegal_value; }
374 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
375 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
377 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
378 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
380 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
381 bool is_oop() const;
383 // semantic for fpu- and xmm-registers:
384 // * is_float and is_double return true for xmm_registers
385 // (so is_single_fpu and is_single_xmm are true)
386 // * So you must always check for is_???_xmm prior to is_???_fpu to
387 // distinguish between fpu- and xmm-registers
389 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
390 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
391 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
393 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
394 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
395 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
396 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
397 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
399 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
400 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
401 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
402 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
403 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
405 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
406 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
407 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
409 // fast accessor functions for special bits that do not work for pointers
410 // (in this functions, the check for is_pointer() is omitted)
411 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
412 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
413 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
414 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
415 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
417 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
418 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
419 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
420 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
423 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
424 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
425 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
426 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
427 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
428 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
429 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
430 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
431 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
432 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
433 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
434 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
436 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
437 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
438 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
440 Register as_register() const;
441 Register as_register_lo() const;
442 Register as_register_hi() const;
444 Register as_pointer_register() {
445 #ifdef _LP64
446 if (is_double_cpu()) {
447 assert(as_register_lo() == as_register_hi(), "should be a single register");
448 return as_register_lo();
449 }
450 #endif
451 return as_register();
452 }
454 #ifdef X86
455 XMMRegister as_xmm_float_reg() const;
456 XMMRegister as_xmm_double_reg() const;
457 // for compatibility with RInfo
458 int fpu () const { return lo_reg_half(); }
459 #endif // X86
460 #if defined(SPARC) || defined(ARM) || defined(PPC)
461 FloatRegister as_float_reg () const;
462 FloatRegister as_double_reg () const;
463 #endif
464 #ifdef MIPS64
465 FloatRegister as_float_reg () const;
466 FloatRegister as_double_reg () const;
468 FloatRegister as_fpu_lo () const;
469 FloatRegister as_fpu_hi () const;
471 #endif
473 jint as_jint() const { return as_constant_ptr()->as_jint(); }
474 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
475 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
476 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
477 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
479 void print() const PRODUCT_RETURN;
480 void print(outputStream* out) const PRODUCT_RETURN;
481 };
484 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
485 switch (type) {
486 case T_INT: return LIR_OprDesc::int_type;
487 case T_LONG: return LIR_OprDesc::long_type;
488 case T_FLOAT: return LIR_OprDesc::float_type;
489 case T_DOUBLE: return LIR_OprDesc::double_type;
490 case T_OBJECT:
491 case T_ARRAY: return LIR_OprDesc::object_type;
492 case T_ADDRESS: return LIR_OprDesc::address_type;
493 case T_METADATA: return LIR_OprDesc::metadata_type;
494 case T_ILLEGAL: // fall through
495 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
496 }
497 }
499 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
500 switch (t) {
501 case LIR_OprDesc::int_type: return T_INT;
502 case LIR_OprDesc::long_type: return T_LONG;
503 case LIR_OprDesc::float_type: return T_FLOAT;
504 case LIR_OprDesc::double_type: return T_DOUBLE;
505 case LIR_OprDesc::object_type: return T_OBJECT;
506 case LIR_OprDesc::address_type: return T_ADDRESS;
507 case LIR_OprDesc::metadata_type:return T_METADATA;
508 case LIR_OprDesc::unknown_type: // fall through
509 default: ShouldNotReachHere(); return T_ILLEGAL;
510 }
511 }
514 // LIR_Address
515 class LIR_Address: public LIR_OprPtr {
516 friend class LIR_OpVisitState;
518 public:
519 // NOTE: currently these must be the log2 of the scale factor (and
520 // must also be equivalent to the ScaleFactor enum in
521 // assembler_i486.hpp)
522 enum Scale {
523 times_1 = 0,
524 times_2 = 1,
525 times_4 = 2,
526 times_8 = 3
527 };
529 private:
530 LIR_Opr _base;
531 LIR_Opr _index;
532 Scale _scale;
533 intx _disp;
534 BasicType _type;
536 public:
537 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
538 _base(base)
539 , _index(index)
540 , _scale(times_1)
541 , _type(type)
542 , _disp(0) { verify(); }
544 #ifndef MIPS64
545 LIR_Address(LIR_Opr base, intx disp, BasicType type):
546 #else
547 LIR_Address(LIR_Opr base, int disp, BasicType type):
548 #endif
549 _base(base)
550 , _index(LIR_OprDesc::illegalOpr())
551 , _scale(times_1)
552 , _type(type)
553 , _disp(disp) { verify(); }
555 LIR_Address(LIR_Opr base, BasicType type):
556 _base(base)
557 , _index(LIR_OprDesc::illegalOpr())
558 , _scale(times_1)
559 , _type(type)
560 , _disp(0) { verify(); }
562 #if defined(X86) || defined(ARM)
563 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
564 _base(base)
565 , _index(index)
566 , _scale(scale)
567 , _type(type)
568 , _disp(disp) { verify(); }
569 #endif // X86 || ARM
571 LIR_Opr base() const { return _base; }
572 LIR_Opr index() const { return _index; }
573 Scale scale() const { return _scale; }
574 intx disp() const { return _disp; }
576 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
578 virtual LIR_Address* as_address() { return this; }
579 virtual BasicType type() const { return _type; }
580 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
582 void verify() const PRODUCT_RETURN;
584 static Scale scale(BasicType type);
585 };
588 // operand factory
589 class LIR_OprFact: public AllStatic {
590 public:
592 static LIR_Opr illegalOpr;
594 static LIR_Opr single_cpu(int reg) {
595 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
596 LIR_OprDesc::int_type |
597 LIR_OprDesc::cpu_register |
598 LIR_OprDesc::single_size);
599 }
600 static LIR_Opr single_cpu_oop(int reg) {
601 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
602 LIR_OprDesc::object_type |
603 LIR_OprDesc::cpu_register |
604 LIR_OprDesc::single_size);
605 }
606 static LIR_Opr single_cpu_address(int reg) {
607 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
608 LIR_OprDesc::address_type |
609 LIR_OprDesc::cpu_register |
610 LIR_OprDesc::single_size);
611 }
612 static LIR_Opr single_cpu_metadata(int reg) {
613 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
614 LIR_OprDesc::metadata_type |
615 LIR_OprDesc::cpu_register |
616 LIR_OprDesc::single_size);
617 }
618 static LIR_Opr double_cpu(int reg1, int reg2) {
619 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
620 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
621 (reg2 << LIR_OprDesc::reg2_shift) |
622 LIR_OprDesc::long_type |
623 LIR_OprDesc::cpu_register |
624 LIR_OprDesc::double_size);
625 }
627 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
628 LIR_OprDesc::float_type |
629 LIR_OprDesc::fpu_register |
630 LIR_OprDesc::single_size); }
631 #if defined(ARM)
632 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
633 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
634 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
635 #endif
636 #ifdef SPARC
637 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
638 (reg2 << LIR_OprDesc::reg2_shift) |
639 LIR_OprDesc::double_type |
640 LIR_OprDesc::fpu_register |
641 LIR_OprDesc::double_size); }
642 #endif
643 #ifdef MIPS64
644 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
645 (reg << LIR_OprDesc::reg2_shift) |
646 LIR_OprDesc::double_type |
647 LIR_OprDesc::fpu_register |
648 LIR_OprDesc::double_size); }
649 #endif
650 #ifdef X86
651 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
652 (reg << LIR_OprDesc::reg2_shift) |
653 LIR_OprDesc::double_type |
654 LIR_OprDesc::fpu_register |
655 LIR_OprDesc::double_size); }
657 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
658 LIR_OprDesc::float_type |
659 LIR_OprDesc::fpu_register |
660 LIR_OprDesc::single_size |
661 LIR_OprDesc::is_xmm_mask); }
662 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
663 (reg << LIR_OprDesc::reg2_shift) |
664 LIR_OprDesc::double_type |
665 LIR_OprDesc::fpu_register |
666 LIR_OprDesc::double_size |
667 LIR_OprDesc::is_xmm_mask); }
668 #endif // X86
669 #ifdef PPC
670 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
671 (reg << LIR_OprDesc::reg2_shift) |
672 LIR_OprDesc::double_type |
673 LIR_OprDesc::fpu_register |
674 LIR_OprDesc::double_size); }
675 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
676 LIR_OprDesc::float_type |
677 LIR_OprDesc::cpu_register |
678 LIR_OprDesc::single_size); }
679 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
680 (reg1 << LIR_OprDesc::reg2_shift) |
681 LIR_OprDesc::double_type |
682 LIR_OprDesc::cpu_register |
683 LIR_OprDesc::double_size); }
684 #endif // PPC
686 static LIR_Opr virtual_register(int index, BasicType type) {
687 LIR_Opr res;
688 switch (type) {
689 case T_OBJECT: // fall through
690 case T_ARRAY:
691 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
692 LIR_OprDesc::object_type |
693 LIR_OprDesc::cpu_register |
694 LIR_OprDesc::single_size |
695 LIR_OprDesc::virtual_mask);
696 break;
698 case T_METADATA:
699 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
700 LIR_OprDesc::metadata_type|
701 LIR_OprDesc::cpu_register |
702 LIR_OprDesc::single_size |
703 LIR_OprDesc::virtual_mask);
704 break;
706 case T_INT:
707 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
708 LIR_OprDesc::int_type |
709 LIR_OprDesc::cpu_register |
710 LIR_OprDesc::single_size |
711 LIR_OprDesc::virtual_mask);
712 break;
714 case T_ADDRESS:
715 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
716 LIR_OprDesc::address_type |
717 LIR_OprDesc::cpu_register |
718 LIR_OprDesc::single_size |
719 LIR_OprDesc::virtual_mask);
720 break;
722 case T_LONG:
723 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
724 LIR_OprDesc::long_type |
725 LIR_OprDesc::cpu_register |
726 LIR_OprDesc::double_size |
727 LIR_OprDesc::virtual_mask);
728 break;
730 #ifdef __SOFTFP__
731 case T_FLOAT:
732 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
733 LIR_OprDesc::float_type |
734 LIR_OprDesc::cpu_register |
735 LIR_OprDesc::single_size |
736 LIR_OprDesc::virtual_mask);
737 break;
738 case T_DOUBLE:
739 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
740 LIR_OprDesc::double_type |
741 LIR_OprDesc::cpu_register |
742 LIR_OprDesc::double_size |
743 LIR_OprDesc::virtual_mask);
744 break;
745 #else // __SOFTFP__
746 case T_FLOAT:
747 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
748 LIR_OprDesc::float_type |
749 LIR_OprDesc::fpu_register |
750 LIR_OprDesc::single_size |
751 LIR_OprDesc::virtual_mask);
752 break;
754 case
755 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
756 LIR_OprDesc::double_type |
757 LIR_OprDesc::fpu_register |
758 LIR_OprDesc::double_size |
759 LIR_OprDesc::virtual_mask);
760 break;
761 #endif // __SOFTFP__
762 default: ShouldNotReachHere(); res = illegalOpr;
763 }
765 #ifdef ASSERT
766 res->validate_type();
767 assert(res->vreg_number() == index, "conversion check");
768 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
769 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
771 // old-style calculation; check if old and new method are equal
772 LIR_OprDesc::OprType t = as_OprType(type);
773 #ifdef __SOFTFP__
774 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
775 t |
776 LIR_OprDesc::cpu_register |
777 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
778 #else // __SOFTFP__
779 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
780 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
781 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
782 assert(res == old_res, "old and new method not equal");
783 #endif // __SOFTFP__
784 #endif // ASSERT
786 return res;
787 }
789 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
790 // the index is platform independent; a double stack useing indeces 2 and 3 has always
791 // index 2.
792 static LIR_Opr stack(int index, BasicType type) {
793 LIR_Opr res;
794 switch (type) {
795 case T_OBJECT: // fall through
796 case T_ARRAY:
797 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
798 LIR_OprDesc::object_type |
799 LIR_OprDesc::stack_value |
800 LIR_OprDesc::single_size);
801 break;
803 case T_METADATA:
804 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
805 LIR_OprDesc::metadata_type |
806 LIR_OprDesc::stack_value |
807 LIR_OprDesc::single_size);
808 break;
809 case T_INT:
810 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
811 LIR_OprDesc::int_type |
812 LIR_OprDesc::stack_value |
813 LIR_OprDesc::single_size);
814 break;
816 case T_ADDRESS:
817 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
818 LIR_OprDesc::address_type |
819 LIR_OprDesc::stack_value |
820 LIR_OprDesc::single_size);
821 break;
823 case T_LONG:
824 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
825 LIR_OprDesc::long_type |
826 LIR_OprDesc::stack_value |
827 LIR_OprDesc::double_size);
828 break;
830 case T_FLOAT:
831 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
832 LIR_OprDesc::float_type |
833 LIR_OprDesc::stack_value |
834 LIR_OprDesc::single_size);
835 break;
836 case T_DOUBLE:
837 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
838 LIR_OprDesc::double_type |
839 LIR_OprDesc::stack_value |
840 LIR_OprDesc::double_size);
841 break;
843 default: ShouldNotReachHere(); res = illegalOpr;
844 }
846 #ifdef ASSERT
847 assert(index >= 0, "index must be positive");
848 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
850 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
851 LIR_OprDesc::stack_value |
852 as_OprType(type) |
853 LIR_OprDesc::size_for(type));
854 assert(res == old_res, "old and new method not equal");
855 #endif
857 return res;
858 }
860 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
861 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
862 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
863 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
864 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
865 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
866 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
867 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
868 static LIR_Opr illegal() { return (LIR_Opr)-1; }
869 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
870 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
872 static LIR_Opr value_type(ValueType* type);
873 static LIR_Opr dummy_value_type(ValueType* type);
874 };
877 //-------------------------------------------------------------------------------
878 // LIR Instructions
879 //-------------------------------------------------------------------------------
880 //
881 // Note:
882 // - every instruction has a result operand
883 // - every instruction has an CodeEmitInfo operand (can be revisited later)
884 // - every instruction has a LIR_OpCode operand
885 // - LIR_OpN, means an instruction that has N input operands
886 //
887 // class hierarchy:
888 //
889 class LIR_Op;
890 class LIR_Op0;
891 class LIR_OpLabel;
892 class LIR_Op1;
893 class LIR_OpBranch;
894 class LIR_OpConvert;
895 class LIR_OpAllocObj;
896 class LIR_OpRoundFP;
897 class LIR_Op2;
898 class LIR_OpDelay;
899 class LIR_Op3;
900 class LIR_OpAllocArray;
901 class LIR_OpCall;
902 class LIR_OpJavaCall;
903 class LIR_OpRTCall;
904 class LIR_OpArrayCopy;
905 class LIR_OpUpdateCRC32;
906 class LIR_OpLock;
907 class LIR_OpTypeCheck;
908 class LIR_OpCompareAndSwap;
909 class LIR_OpProfileCall;
910 class LIR_OpProfileType;
911 #ifdef ASSERT
912 class LIR_OpAssert;
913 #endif
915 // LIR operation codes
916 enum LIR_Code {
917 lir_none
918 , begin_op0
919 , lir_word_align
920 , lir_label
921 , lir_nop
922 , lir_backwardbranch_target
923 , lir_std_entry
924 , lir_osr_entry
925 , lir_build_frame
926 , lir_fpop_raw
927 , lir_24bit_FPU
928 , lir_reset_FPU
929 , lir_breakpoint
930 , lir_rtcall
931 , lir_membar
932 , lir_membar_acquire
933 , lir_membar_release
934 , lir_membar_loadload
935 , lir_membar_storestore
936 , lir_membar_loadstore
937 , lir_membar_storeload
938 , lir_get_thread
939 , end_op0
940 , begin_op1
941 , lir_fxch
942 , lir_fld
943 , lir_ffree
944 , lir_push
945 , lir_pop
946 , lir_null_check
947 , lir_return
948 , lir_leal
949 , lir_neg
950 #ifndef MIPS64
951 , lir_branch
952 , lir_cond_float_branch
953 #endif
954 , lir_move
955 , lir_prefetchr
956 , lir_prefetchw
957 , lir_convert
958 , lir_alloc_object
959 , lir_monaddr
960 , lir_roundfp
961 , lir_safepoint
962 , lir_pack64
963 , lir_unpack64
964 , lir_unwind
965 , end_op1
966 , begin_op2
967 #ifdef MIPS64
968 , lir_branch
969 , lir_cond_float_branch
970 , lir_null_check_for_branch
971 #else
972 , lir_cmp
973 #endif
974 , lir_cmp_l2i
975 , lir_ucmp_fd2i
976 , lir_cmp_fd2i
977 , lir_cmove
978 , lir_add
979 , lir_sub
980 , lir_mul
981 , lir_mul_strictfp
982 , lir_div
983 , lir_div_strictfp
984 , lir_rem
985 , lir_sqrt
986 , lir_abs
987 , lir_sin
988 , lir_cos
989 , lir_tan
990 , lir_log
991 , lir_log10
992 , lir_exp
993 , lir_pow
994 , lir_logic_and
995 , lir_logic_or
996 , lir_logic_xor
997 , lir_shl
998 , lir_shr
999 , lir_ushr
1000 , lir_alloc_array
1001 , lir_throw
1002 , lir_compare_to
1003 , lir_xadd
1004 , lir_xchg
1005 , end_op2
1006 , begin_op3
1007 #ifdef MIPS64
1008 , lir_frem
1009 #endif
1010 , lir_idiv
1011 , lir_irem
1012 , end_op3
1013 , begin_opJavaCall
1014 , lir_static_call
1015 , lir_optvirtual_call
1016 , lir_icvirtual_call
1017 , lir_virtual_call
1018 , lir_dynamic_call
1019 , end_opJavaCall
1020 , begin_opArrayCopy
1021 , lir_arraycopy
1022 , end_opArrayCopy
1023 , begin_opUpdateCRC32
1024 , lir_updatecrc32
1025 , end_opUpdateCRC32
1026 , begin_opLock
1027 , lir_lock
1028 , lir_unlock
1029 , end_opLock
1030 , begin_delay_slot
1031 , lir_delay_slot
1032 , end_delay_slot
1033 , begin_opTypeCheck
1034 , lir_instanceof
1035 , lir_checkcast
1036 , lir_store_check
1037 , end_opTypeCheck
1038 , begin_opCompareAndSwap
1039 , lir_cas_long
1040 , lir_cas_obj
1041 , lir_cas_int
1042 , end_opCompareAndSwap
1043 , begin_opMDOProfile
1044 , lir_profile_call
1045 , lir_profile_type
1046 , end_opMDOProfile
1047 , begin_opAssert
1048 , lir_assert
1049 , end_opAssert
1050 };
1053 enum LIR_Condition {
1054 lir_cond_equal
1055 , lir_cond_notEqual
1056 , lir_cond_less
1057 , lir_cond_lessEqual
1058 , lir_cond_greaterEqual
1059 , lir_cond_greater
1060 , lir_cond_belowEqual
1061 , lir_cond_aboveEqual
1062 , lir_cond_always
1063 , lir_cond_unknown = -1
1064 };
1067 enum LIR_PatchCode {
1068 lir_patch_none,
1069 lir_patch_low,
1070 lir_patch_high,
1071 lir_patch_normal
1072 };
1075 enum LIR_MoveKind {
1076 lir_move_normal,
1077 lir_move_volatile,
1078 lir_move_unaligned,
1079 lir_move_wide,
1080 lir_move_max_flag
1081 };
1084 // --------------------------------------------------
1085 // LIR_Op
1086 // --------------------------------------------------
1087 class LIR_Op: public CompilationResourceObj {
1088 friend class LIR_OpVisitState;
1090 #ifdef ASSERT
1091 private:
1092 const char * _file;
1093 int _line;
1094 #endif
1096 protected:
1097 LIR_Opr _result;
1098 unsigned short _code;
1099 unsigned short _flags;
1100 CodeEmitInfo* _info;
1101 int _id; // value id for register allocation
1102 int _fpu_pop_count;
1103 Instruction* _source; // for debugging
1105 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1107 protected:
1108 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1110 public:
1111 LIR_Op()
1112 : _result(LIR_OprFact::illegalOpr)
1113 , _code(lir_none)
1114 , _flags(0)
1115 , _info(NULL)
1116 #ifdef ASSERT
1117 , _file(NULL)
1118 , _line(0)
1119 #endif
1120 , _fpu_pop_count(0)
1121 , _source(NULL)
1122 , _id(-1) {}
1124 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1125 : _result(result)
1126 , _code(code)
1127 , _flags(0)
1128 , _info(info)
1129 #ifdef ASSERT
1130 , _file(NULL)
1131 , _line(0)
1132 #endif
1133 , _fpu_pop_count(0)
1134 , _source(NULL)
1135 , _id(-1) {}
1137 CodeEmitInfo* info() const { return _info; }
1138 LIR_Code code() const { return (LIR_Code)_code; }
1139 LIR_Opr result_opr() const { return _result; }
1140 void set_result_opr(LIR_Opr opr) { _result = opr; }
1142 #ifdef ASSERT
1143 void set_file_and_line(const char * file, int line) {
1144 _file = file;
1145 _line = line;
1146 }
1147 #endif
1149 virtual const char * name() const PRODUCT_RETURN0;
1151 int id() const { return _id; }
1152 void set_id(int id) { _id = id; }
1154 // FPU stack simulation helpers -- only used on Intel
1155 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1156 int fpu_pop_count() const { return _fpu_pop_count; }
1157 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1159 Instruction* source() const { return _source; }
1160 void set_source(Instruction* ins) { _source = ins; }
1162 virtual void emit_code(LIR_Assembler* masm) = 0;
1163 virtual void print_instr(outputStream* out) const = 0;
1164 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1166 virtual bool is_patching() { return false; }
1167 virtual LIR_OpCall* as_OpCall() { return NULL; }
1168 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1169 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1170 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1171 virtual LIR_OpLock* as_OpLock() { return NULL; }
1172 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1173 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1174 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1175 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1176 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1177 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1178 virtual LIR_Op0* as_Op0() { return NULL; }
1179 virtual LIR_Op1* as_Op1() { return NULL; }
1180 virtual LIR_Op2* as_Op2() { return NULL; }
1181 virtual LIR_Op3* as_Op3() { return NULL; }
1182 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1183 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1184 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1185 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1186 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1187 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1188 #ifdef ASSERT
1189 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1190 #endif
1192 virtual void verify() const {}
1193 };
1195 // for calls
1196 class LIR_OpCall: public LIR_Op {
1197 friend class LIR_OpVisitState;
1199 protected:
1200 address _addr;
1201 LIR_OprList* _arguments;
1202 protected:
1203 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1204 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1205 : LIR_Op(code, result, info)
1206 , _arguments(arguments)
1207 , _addr(addr) {}
1209 public:
1210 address addr() const { return _addr; }
1211 const LIR_OprList* arguments() const { return _arguments; }
1212 virtual LIR_OpCall* as_OpCall() { return this; }
1213 };
1216 // --------------------------------------------------
1217 // LIR_OpJavaCall
1218 // --------------------------------------------------
1219 class LIR_OpJavaCall: public LIR_OpCall {
1220 friend class LIR_OpVisitState;
1222 private:
1223 ciMethod* _method;
1224 LIR_Opr _receiver;
1225 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1227 public:
1228 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1229 LIR_Opr receiver, LIR_Opr result,
1230 address addr, LIR_OprList* arguments,
1231 CodeEmitInfo* info)
1232 : LIR_OpCall(code, addr, result, arguments, info)
1233 , _receiver(receiver)
1234 , _method(method)
1235 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1236 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1238 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1239 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1240 LIR_OprList* arguments, CodeEmitInfo* info)
1241 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1242 , _receiver(receiver)
1243 , _method(method)
1244 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1245 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1247 LIR_Opr receiver() const { return _receiver; }
1248 ciMethod* method() const { return _method; }
1250 // JSR 292 support.
1251 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1252 bool is_method_handle_invoke() const {
1253 return
1254 method()->is_compiled_lambda_form() // Java-generated adapter
1255 ||
1256 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1257 }
1259 intptr_t vtable_offset() const {
1260 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1261 return (intptr_t) addr();
1262 }
1264 virtual void emit_code(LIR_Assembler* masm);
1265 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1266 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1267 };
1269 // --------------------------------------------------
1270 // LIR_OpLabel
1271 // --------------------------------------------------
1272 // Location where a branch can continue
1273 class LIR_OpLabel: public LIR_Op {
1274 friend class LIR_OpVisitState;
1276 private:
1277 Label* _label;
1278 public:
1279 LIR_OpLabel(Label* lbl)
1280 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1281 , _label(lbl) {}
1282 Label* label() const { return _label; }
1284 virtual void emit_code(LIR_Assembler* masm);
1285 virtual LIR_OpLabel* as_OpLabel() { return this; }
1286 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1287 };
1289 // LIR_OpArrayCopy
1290 class LIR_OpArrayCopy: public LIR_Op {
1291 friend class LIR_OpVisitState;
1293 private:
1294 ArrayCopyStub* _stub;
1295 LIR_Opr _src;
1296 LIR_Opr _src_pos;
1297 LIR_Opr _dst;
1298 LIR_Opr _dst_pos;
1299 LIR_Opr _length;
1300 LIR_Opr _tmp;
1301 ciArrayKlass* _expected_type;
1302 int _flags;
1304 public:
1305 enum Flags {
1306 src_null_check = 1 << 0,
1307 dst_null_check = 1 << 1,
1308 src_pos_positive_check = 1 << 2,
1309 dst_pos_positive_check = 1 << 3,
1310 length_positive_check = 1 << 4,
1311 src_range_check = 1 << 5,
1312 dst_range_check = 1 << 6,
1313 type_check = 1 << 7,
1314 overlapping = 1 << 8,
1315 unaligned = 1 << 9,
1316 src_objarray = 1 << 10,
1317 dst_objarray = 1 << 11,
1318 all_flags = (1 << 12) - 1
1319 };
1321 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1322 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1324 LIR_Opr src() const { return _src; }
1325 LIR_Opr src_pos() const { return _src_pos; }
1326 LIR_Opr dst() const { return _dst; }
1327 LIR_Opr dst_pos() const { return _dst_pos; }
1328 LIR_Opr length() const { return _length; }
1329 LIR_Opr tmp() const { return _tmp; }
1330 int flags() const { return _flags; }
1331 ciArrayKlass* expected_type() const { return _expected_type; }
1332 ArrayCopyStub* stub() const { return _stub; }
1334 virtual void emit_code(LIR_Assembler* masm);
1335 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1336 void print_instr(outputStream* out) const PRODUCT_RETURN;
1337 };
1339 // LIR_OpUpdateCRC32
1340 class LIR_OpUpdateCRC32: public LIR_Op {
1341 friend class LIR_OpVisitState;
1343 private:
1344 LIR_Opr _crc;
1345 LIR_Opr _val;
1347 public:
1349 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1351 LIR_Opr crc() const { return _crc; }
1352 LIR_Opr val() const { return _val; }
1354 virtual void emit_code(LIR_Assembler* masm);
1355 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1356 void print_instr(outputStream* out) const PRODUCT_RETURN;
1357 };
1359 // --------------------------------------------------
1360 // LIR_Op0
1361 // --------------------------------------------------
1362 class LIR_Op0: public LIR_Op {
1363 friend class LIR_OpVisitState;
1365 public:
1366 LIR_Op0(LIR_Code code)
1367 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1368 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1369 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1371 virtual void emit_code(LIR_Assembler* masm);
1372 virtual LIR_Op0* as_Op0() { return this; }
1373 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1374 };
1377 // --------------------------------------------------
1378 // LIR_Op1
1379 // --------------------------------------------------
1381 class LIR_Op1: public LIR_Op {
1382 friend class LIR_OpVisitState;
1384 protected:
1385 LIR_Opr _opr; // input operand
1386 BasicType _type; // Operand types
1387 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1389 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1391 void set_kind(LIR_MoveKind kind) {
1392 assert(code() == lir_move, "must be");
1393 _flags = kind;
1394 }
1396 public:
1397 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1398 : LIR_Op(code, result, info)
1399 , _opr(opr)
1400 , _patch(patch)
1401 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1403 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1404 : LIR_Op(code, result, info)
1405 , _opr(opr)
1406 , _patch(patch)
1407 , _type(type) {
1408 assert(code == lir_move, "must be");
1409 set_kind(kind);
1410 }
1412 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1413 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1414 , _opr(opr)
1415 , _patch(lir_patch_none)
1416 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1418 LIR_Opr in_opr() const { return _opr; }
1419 LIR_PatchCode patch_code() const { return _patch; }
1420 BasicType type() const { return _type; }
1422 LIR_MoveKind move_kind() const {
1423 assert(code() == lir_move, "must be");
1424 return (LIR_MoveKind)_flags;
1425 }
1427 virtual bool is_patching() { return _patch != lir_patch_none; }
1428 virtual void emit_code(LIR_Assembler* masm);
1429 virtual LIR_Op1* as_Op1() { return this; }
1430 virtual const char * name() const PRODUCT_RETURN0;
1432 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1434 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1435 virtual void verify() const;
1436 };
1439 // for runtime calls
1440 class LIR_OpRTCall: public LIR_OpCall {
1441 friend class LIR_OpVisitState;
1443 private:
1444 LIR_Opr _tmp;
1445 public:
1446 LIR_OpRTCall(address addr, LIR_Opr tmp,
1447 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1448 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1449 , _tmp(tmp) {}
1451 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1452 virtual void emit_code(LIR_Assembler* masm);
1453 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1455 LIR_Opr tmp() const { return _tmp; }
1457 virtual void verify() const;
1458 };
1460 #ifndef MIPS64
1461 class LIR_OpBranch: public LIR_Op {
1462 friend class LIR_OpVisitState;
1464 private:
1465 LIR_Condition _cond;
1466 BasicType _type;
1467 Label* _label;
1468 BlockBegin* _block; // if this is a branch to a block, this is the block
1469 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1470 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1472 public:
1473 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1474 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1475 , _cond(cond)
1476 , _type(type)
1477 , _label(lbl)
1478 , _block(NULL)
1479 , _ublock(NULL)
1480 , _stub(NULL) { }
1482 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1483 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1485 // for unordered comparisons
1486 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1488 LIR_Condition cond() const { return _cond; }
1489 BasicType type() const { return _type; }
1490 Label* label() const { return _label; }
1491 BlockBegin* block() const { return _block; }
1492 BlockBegin* ublock() const { return _ublock; }
1493 CodeStub* stub() const { return _stub; }
1495 void change_block(BlockBegin* b);
1496 void change_ublock(BlockBegin* b);
1497 void negate_cond();
1499 virtual void emit_code(LIR_Assembler* masm);
1500 virtual LIR_OpBranch* as_OpBranch() { return this; }
1501 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1502 };
1503 #endif
1505 class ConversionStub;
1507 class LIR_OpConvert: public LIR_Op1 {
1508 friend class LIR_OpVisitState;
1510 private:
1511 Bytecodes::Code _bytecode;
1512 ConversionStub* _stub;
1513 #ifdef PPC
1514 LIR_Opr _tmp1;
1515 LIR_Opr _tmp2;
1516 #endif
1518 public:
1519 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1520 : LIR_Op1(lir_convert, opr, result)
1521 , _stub(stub)
1522 #ifdef PPC
1523 , _tmp1(LIR_OprDesc::illegalOpr())
1524 , _tmp2(LIR_OprDesc::illegalOpr())
1525 #endif
1526 , _bytecode(code) {}
1528 #ifdef PPC
1529 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1530 ,LIR_Opr tmp1, LIR_Opr tmp2)
1531 : LIR_Op1(lir_convert, opr, result)
1532 , _stub(stub)
1533 , _tmp1(tmp1)
1534 , _tmp2(tmp2)
1535 , _bytecode(code) {}
1536 #endif
1538 Bytecodes::Code bytecode() const { return _bytecode; }
1539 ConversionStub* stub() const { return _stub; }
1540 #ifdef PPC
1541 LIR_Opr tmp1() const { return _tmp1; }
1542 LIR_Opr tmp2() const { return _tmp2; }
1543 #endif
1545 virtual void emit_code(LIR_Assembler* masm);
1546 virtual LIR_OpConvert* as_OpConvert() { return this; }
1547 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1549 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1550 };
1552 #ifndef MIPS64
1553 // LIR_OpAllocObj
1554 class LIR_OpAllocObj : public LIR_Op1 {
1555 friend class LIR_OpVisitState;
1557 private:
1558 LIR_Opr _tmp1;
1559 LIR_Opr _tmp2;
1560 LIR_Opr _tmp3;
1561 LIR_Opr _tmp4;
1562 int _hdr_size;
1563 int _obj_size;
1564 CodeStub* _stub;
1565 bool _init_check;
1567 public:
1568 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1569 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1570 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1571 : LIR_Op1(lir_alloc_object, klass, result)
1572 , _tmp1(t1)
1573 , _tmp2(t2)
1574 , _tmp3(t3)
1575 , _tmp4(t4)
1576 , _hdr_size(hdr_size)
1577 , _obj_size(obj_size)
1578 , _init_check(init_check)
1579 , _stub(stub) { }
1581 LIR_Opr klass() const { return in_opr(); }
1582 LIR_Opr obj() const { return result_opr(); }
1583 LIR_Opr tmp1() const { return _tmp1; }
1584 LIR_Opr tmp2() const { return _tmp2; }
1585 LIR_Opr tmp3() const { return _tmp3; }
1586 LIR_Opr tmp4() const { return _tmp4; }
1587 int header_size() const { return _hdr_size; }
1588 int object_size() const { return _obj_size; }
1589 bool init_check() const { return _init_check; }
1590 CodeStub* stub() const { return _stub; }
1592 virtual void emit_code(LIR_Assembler* masm);
1593 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1594 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1595 };
1596 #else
1597 class LIR_OpAllocObj : public LIR_Op1 {
1598 friend class LIR_OpVisitState;
1600 private:
1601 LIR_Opr _tmp1;
1602 LIR_Opr _tmp2;
1603 LIR_Opr _tmp3;
1604 LIR_Opr _tmp4;
1605 LIR_Opr _tmp5;
1606 LIR_Opr _tmp6;
1607 int _hdr_size;
1608 int _obj_size;
1609 CodeStub* _stub;
1610 bool _init_check;
1612 public:
1613 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1614 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1615 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1616 : LIR_Op1(lir_alloc_object, klass, result)
1617 , _tmp1(t1)
1618 , _tmp2(t2)
1619 , _tmp3(t3)
1620 , _tmp4(t4)
1621 , _tmp5(t5)
1622 , _tmp6(t6)
1623 , _hdr_size(hdr_size)
1624 , _obj_size(obj_size)
1625 , _init_check(init_check)
1626 , _stub(stub) { }
1628 LIR_Opr klass() const { return in_opr(); }
1629 LIR_Opr obj() const { return result_opr(); }
1630 LIR_Opr tmp1() const { return _tmp1; }
1631 LIR_Opr tmp2() const { return _tmp2; }
1632 LIR_Opr tmp3() const { return _tmp3; }
1633 LIR_Opr tmp4() const { return _tmp4; }
1634 LIR_Opr tmp5() const { return _tmp5; }
1635 LIR_Opr tmp6() const { return _tmp6; }
1636 int header_size() const { return _hdr_size; }
1637 int object_size() const { return _obj_size; }
1638 bool init_check() const { return _init_check; }
1639 CodeStub* stub() const { return _stub; }
1641 virtual void emit_code(LIR_Assembler* masm);
1642 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1643 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1644 };
1645 #endif
1647 // LIR_OpRoundFP
1648 class LIR_OpRoundFP : public LIR_Op1 {
1649 friend class LIR_OpVisitState;
1651 private:
1652 LIR_Opr _tmp;
1654 public:
1655 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1656 : LIR_Op1(lir_roundfp, reg, result)
1657 , _tmp(stack_loc_temp) {}
1659 LIR_Opr tmp() const { return _tmp; }
1660 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1661 void print_instr(outputStream* out) const PRODUCT_RETURN;
1662 };
1664 // LIR_OpTypeCheck
1665 class LIR_OpTypeCheck: public LIR_Op {
1666 friend class LIR_OpVisitState;
1668 private:
1669 LIR_Opr _object;
1670 LIR_Opr _array;
1671 ciKlass* _klass;
1672 LIR_Opr _tmp1;
1673 LIR_Opr _tmp2;
1674 LIR_Opr _tmp3;
1675 bool _fast_check;
1676 CodeEmitInfo* _info_for_patch;
1677 CodeEmitInfo* _info_for_exception;
1678 CodeStub* _stub;
1679 ciMethod* _profiled_method;
1680 int _profiled_bci;
1681 bool _should_profile;
1683 public:
1684 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1685 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1686 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1687 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1688 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1690 LIR_Opr object() const { return _object; }
1691 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1692 LIR_Opr tmp1() const { return _tmp1; }
1693 LIR_Opr tmp2() const { return _tmp2; }
1694 LIR_Opr tmp3() const { return _tmp3; }
1695 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1696 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1697 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1698 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1699 CodeStub* stub() const { return _stub; }
1701 // MethodData* profiling
1702 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1703 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1704 void set_should_profile(bool b) { _should_profile = b; }
1705 ciMethod* profiled_method() const { return _profiled_method; }
1706 int profiled_bci() const { return _profiled_bci; }
1707 bool should_profile() const { return _should_profile; }
1709 virtual bool is_patching() { return _info_for_patch != NULL; }
1710 virtual void emit_code(LIR_Assembler* masm);
1711 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1712 void print_instr(outputStream* out) const PRODUCT_RETURN;
1713 };
1714 #ifndef MIPS64
1715 // LIR_Op2
1716 class LIR_Op2: public LIR_Op {
1717 friend class LIR_OpVisitState;
1719 int _fpu_stack_size; // for sin/cos implementation on Intel
1721 protected:
1722 LIR_Opr _opr1;
1723 LIR_Opr _opr2;
1724 BasicType _type;
1725 LIR_Opr _tmp1;
1726 LIR_Opr _tmp2;
1727 LIR_Opr _tmp3;
1728 LIR_Opr _tmp4;
1729 LIR_Opr _tmp5;
1730 LIR_Condition _condition;
1732 void verify() const;
1734 public:
1735 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1736 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1737 , _opr1(opr1)
1738 , _opr2(opr2)
1739 , _type(T_ILLEGAL)
1740 , _condition(condition)
1741 , _fpu_stack_size(0)
1742 , _tmp1(LIR_OprFact::illegalOpr)
1743 , _tmp2(LIR_OprFact::illegalOpr)
1744 , _tmp3(LIR_OprFact::illegalOpr)
1745 , _tmp4(LIR_OprFact::illegalOpr)
1746 , _tmp5(LIR_OprFact::illegalOpr) {
1747 assert(code == lir_cmp || code == lir_assert, "code check");
1748 }
1750 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1751 : LIR_Op(code, result, NULL)
1752 , _opr1(opr1)
1753 , _opr2(opr2)
1754 , _type(type)
1755 , _condition(condition)
1756 , _fpu_stack_size(0)
1757 , _tmp1(LIR_OprFact::illegalOpr)
1758 , _tmp2(LIR_OprFact::illegalOpr)
1759 , _tmp3(LIR_OprFact::illegalOpr)
1760 , _tmp4(LIR_OprFact::illegalOpr)
1761 , _tmp5(LIR_OprFact::illegalOpr) {
1762 assert(code == lir_cmove, "code check");
1763 assert(type != T_ILLEGAL, "cmove should have type");
1764 }
1766 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1767 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1768 : LIR_Op(code, result, info)
1769 , _opr1(opr1)
1770 , _opr2(opr2)
1771 , _type(type)
1772 , _condition(lir_cond_unknown)
1773 , _fpu_stack_size(0)
1774 , _tmp1(LIR_OprFact::illegalOpr)
1775 , _tmp2(LIR_OprFact::illegalOpr)
1776 , _tmp3(LIR_OprFact::illegalOpr)
1777 , _tmp4(LIR_OprFact::illegalOpr)
1778 , _tmp5(LIR_OprFact::illegalOpr) {
1779 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1780 }
1782 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1783 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1784 : LIR_Op(code, result, NULL)
1785 , _opr1(opr1)
1786 , _opr2(opr2)
1787 , _type(T_ILLEGAL)
1788 , _condition(lir_cond_unknown)
1789 , _fpu_stack_size(0)
1790 , _tmp1(tmp1)
1791 , _tmp2(tmp2)
1792 , _tmp3(tmp3)
1793 , _tmp4(tmp4)
1794 , _tmp5(tmp5) {
1795 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1796 }
1798 LIR_Opr in_opr1() const { return _opr1; }
1799 LIR_Opr in_opr2() const { return _opr2; }
1800 BasicType type() const { return _type; }
1801 LIR_Opr tmp1_opr() const { return _tmp1; }
1802 LIR_Opr tmp2_opr() const { return _tmp2; }
1803 LIR_Opr tmp3_opr() const { return _tmp3; }
1804 LIR_Opr tmp4_opr() const { return _tmp4; }
1805 LIR_Opr tmp5_opr() const { return _tmp5; }
1806 LIR_Condition condition() const {
1807 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1808 }
1809 void set_condition(LIR_Condition condition) {
1810 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1811 }
1813 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1814 int fpu_stack_size() const { return _fpu_stack_size; }
1816 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1817 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1819 virtual void emit_code(LIR_Assembler* masm);
1820 virtual LIR_Op2* as_Op2() { return this; }
1821 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1822 };
1823 #else
1824 class LIR_Op2: public LIR_Op {
1825 //friend class LIR_Optimizer;
1826 friend class LIR_OpVisitState;
1827 protected:
1828 LIR_Opr _opr1;
1829 LIR_Opr _opr2;
1830 BasicType _type;
1831 LIR_Opr _tmp1;
1832 LIR_Opr _tmp2;
1833 LIR_Opr _tmp3;
1834 LIR_Opr _tmp4;
1835 LIR_Opr _tmp5;
1837 virtual void verify() const;
1838 public:
1839 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1840 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1841 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1842 _opr1(opr1), _opr2(opr2),
1843 _type(type),
1844 _tmp1(LIR_OprFact::illegalOpr),
1845 _tmp2(LIR_OprFact::illegalOpr),
1846 _tmp3(LIR_OprFact::illegalOpr),
1847 _tmp4(LIR_OprFact::illegalOpr),
1848 _tmp5(LIR_OprFact::illegalOpr) {
1849 }
1851 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1852 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1853 : LIR_Op(code, result, info),
1854 _opr1(opr1), _opr2(opr2),
1855 _type(type),
1856 _tmp1(LIR_OprFact::illegalOpr),
1857 _tmp2(LIR_OprFact::illegalOpr),
1858 _tmp3(LIR_OprFact::illegalOpr),
1859 _tmp4(LIR_OprFact::illegalOpr),
1860 _tmp5(LIR_OprFact::illegalOpr) {
1862 assert(is_in_range(code, begin_op2, end_op2), "code check");
1863 }
1866 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1867 : LIR_Op(code, result, NULL),
1868 _opr1(opr1), _opr2(opr2),
1869 _type(T_ILLEGAL),
1870 _tmp1(tmp1),
1871 _tmp2(tmp2),
1872 _tmp3(tmp3),
1873 _tmp4(tmp4),
1874 _tmp5(tmp5) {
1875 assert(is_in_range(code, begin_op2, end_op2), "code check");
1876 }
1878 LIR_Opr in_opr1() const { return _opr1; }
1879 LIR_Opr in_opr2() const { return _opr2; }
1880 BasicType type() const { return _type; }
1881 LIR_Opr tmp1_opr() const { return _tmp1; }
1882 LIR_Opr tmp2_opr() const { return _tmp2; }
1883 LIR_Opr tmp3_opr() const { return _tmp3; }
1884 LIR_Opr tmp4_opr() const { return _tmp4; }
1885 LIR_Opr tmp5_opr() const { return _tmp5; }
1888 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1889 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1890 // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome
1891 //virtual void emit_code(LIR_AbstractAssembler* masm);
1892 virtual void emit_code(LIR_Assembler* masm);
1893 virtual LIR_Op2* as_Op2() { return this; }
1895 // virtual void print_instr() const PRODUCT_RETURN;
1896 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1897 };
1900 class LIR_OpBranch: public LIR_Op2 {
1901 friend class LIR_OpVisitState;
1902 public:
1904 private:
1905 LIR_Condition _cond;
1906 BasicType _type;
1907 Label* _label;
1908 BlockBegin* _block; // if this is a branch to a block, this is the block
1909 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1910 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1912 public:
1913 // these are temporary constructors until we start using the conditional register
1914 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1915 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1916 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1917 {
1918 }
1920 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1922 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1924 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1926 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1927 BlockBegin *block,BlockBegin *ublock);
1929 LIR_Condition cond() const { return _cond; }
1930 BasicType type() const { return _type; }
1931 LIR_Opr left() const { return in_opr1(); }
1932 LIR_Opr right() const { return in_opr2(); }
1933 Label* label() const { return _label; }
1934 BlockBegin* block() const { return _block; }
1935 BlockBegin* ublock() const { return _ublock; }
1936 CodeStub* stub() const { return _stub; }
1939 void change_block(BlockBegin* b);
1940 void change_ublock(BlockBegin* b);
1941 void negate_cond();
1944 // 12/21,06,jerome
1945 //virtual void emit_code(LIR_AbstractAssembler* masm);
1946 virtual void emit_code(LIR_Assembler* masm);
1947 virtual LIR_OpBranch* as_OpBranch() { return this; }
1948 //virtual void print_instr() const PRODUCT_RETURN;
1949 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1951 };
1952 #endif
1954 #ifndef MIPS64
1956 class LIR_OpAllocArray : public LIR_Op {
1957 friend class LIR_OpVisitState;
1959 private:
1960 LIR_Opr _klass;
1961 LIR_Opr _len;
1962 LIR_Opr _tmp1;
1963 LIR_Opr _tmp2;
1964 LIR_Opr _tmp3;
1965 LIR_Opr _tmp4;
1966 BasicType _type;
1967 CodeStub* _stub;
1969 public:
1970 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1971 : LIR_Op(lir_alloc_array, result, NULL)
1972 , _klass(klass)
1973 , _len(len)
1974 , _tmp1(t1)
1975 , _tmp2(t2)
1976 , _tmp3(t3)
1977 , _tmp4(t4)
1978 , _type(type)
1979 , _stub(stub) {}
1981 LIR_Opr klass() const { return _klass; }
1982 LIR_Opr len() const { return _len; }
1983 LIR_Opr obj() const { return result_opr(); }
1984 LIR_Opr tmp1() const { return _tmp1; }
1985 LIR_Opr tmp2() const { return _tmp2; }
1986 LIR_Opr tmp3() const { return _tmp3; }
1987 LIR_Opr tmp4() const { return _tmp4; }
1988 BasicType type() const { return _type; }
1989 CodeStub* stub() const { return _stub; }
1991 virtual void emit_code(LIR_Assembler* masm);
1992 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1993 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1994 };
1995 #else
1996 class LIR_OpAllocArray : public LIR_Op {
1997 friend class LIR_OpVisitState;
1999 private:
2000 LIR_Opr _klass;
2001 LIR_Opr _len;
2002 LIR_Opr _tmp1;
2003 LIR_Opr _tmp2;
2004 LIR_Opr _tmp3;
2005 LIR_Opr _tmp4;
2006 LIR_Opr _tmp5;
2007 BasicType _type;
2008 CodeStub* _stub;
2010 public:
2011 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2012 : LIR_Op(lir_alloc_array, result, NULL)
2013 , _klass(klass)
2014 , _len(len)
2015 , _tmp1(t1)
2016 , _tmp2(t2)
2017 , _tmp3(t3)
2018 , _tmp4(t4)
2019 , _tmp5(t5)
2020 , _type(type)
2021 , _stub(stub) {}
2023 LIR_Opr klass() const { return _klass; }
2024 LIR_Opr len() const { return _len; }
2025 LIR_Opr obj() const { return result_opr(); }
2026 LIR_Opr tmp1() const { return _tmp1; }
2027 LIR_Opr tmp2() const { return _tmp2; }
2028 LIR_Opr tmp3() const { return _tmp3; }
2029 LIR_Opr tmp4() const { return _tmp4; }
2030 LIR_Opr tmp5() const { return _tmp5; }
2031 BasicType type() const { return _type; }
2032 CodeStub* stub() const { return _stub; }
2034 virtual void emit_code(LIR_Assembler* masm);
2035 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2036 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2037 };
2038 #endif
2041 class LIR_Op3: public LIR_Op {
2042 friend class LIR_OpVisitState;
2044 private:
2045 LIR_Opr _opr1;
2046 LIR_Opr _opr2;
2047 LIR_Opr _opr3;
2048 public:
2049 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
2050 : LIR_Op(code, result, info)
2051 , _opr1(opr1)
2052 , _opr2(opr2)
2053 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
2054 LIR_Opr in_opr1() const { return _opr1; }
2055 LIR_Opr in_opr2() const { return _opr2; }
2056 LIR_Opr in_opr3() const { return _opr3; }
2058 virtual void emit_code(LIR_Assembler* masm);
2059 virtual LIR_Op3* as_Op3() { return this; }
2060 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2061 };
2064 //--------------------------------
2065 class LabelObj: public CompilationResourceObj {
2066 private:
2067 Label _label;
2068 public:
2069 LabelObj() {}
2070 Label* label() { return &_label; }
2071 };
2074 class LIR_OpLock: public LIR_Op {
2075 friend class LIR_OpVisitState;
2077 private:
2078 LIR_Opr _hdr;
2079 LIR_Opr _obj;
2080 LIR_Opr _lock;
2081 LIR_Opr _scratch;
2082 CodeStub* _stub;
2083 public:
2084 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
2085 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
2086 , _hdr(hdr)
2087 , _obj(obj)
2088 , _lock(lock)
2089 , _scratch(scratch)
2090 , _stub(stub) {}
2092 LIR_Opr hdr_opr() const { return _hdr; }
2093 LIR_Opr obj_opr() const { return _obj; }
2094 LIR_Opr lock_opr() const { return _lock; }
2095 LIR_Opr scratch_opr() const { return _scratch; }
2096 CodeStub* stub() const { return _stub; }
2098 virtual void emit_code(LIR_Assembler* masm);
2099 virtual LIR_OpLock* as_OpLock() { return this; }
2100 void print_instr(outputStream* out) const PRODUCT_RETURN;
2101 };
2104 class LIR_OpDelay: public LIR_Op {
2105 friend class LIR_OpVisitState;
2107 private:
2108 LIR_Op* _op;
2110 public:
2111 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
2112 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
2113 _op(op) {
2114 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
2115 }
2116 virtual void emit_code(LIR_Assembler* masm);
2117 virtual LIR_OpDelay* as_OpDelay() { return this; }
2118 void print_instr(outputStream* out) const PRODUCT_RETURN;
2119 LIR_Op* delay_op() const { return _op; }
2120 CodeEmitInfo* call_info() const { return info(); }
2121 };
2123 #ifdef ASSERT
2124 // LIR_OpAssert
2125 class LIR_OpAssert : public LIR_Op2 {
2126 friend class LIR_OpVisitState;
2128 private:
2129 const char* _msg;
2130 bool _halt;
2132 public:
2133 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
2134 : LIR_Op2(lir_assert, condition, opr1, opr2)
2135 , _halt(halt)
2136 , _msg(msg) {
2137 }
2139 const char* msg() const { return _msg; }
2140 bool halt() const { return _halt; }
2142 virtual void emit_code(LIR_Assembler* masm);
2143 virtual LIR_OpAssert* as_OpAssert() { return this; }
2144 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2145 };
2146 #endif
2148 // LIR_OpCompareAndSwap
2149 class LIR_OpCompareAndSwap : public LIR_Op {
2150 friend class LIR_OpVisitState;
2152 private:
2153 LIR_Opr _addr;
2154 LIR_Opr _cmp_value;
2155 LIR_Opr _new_value;
2156 LIR_Opr _tmp1;
2157 LIR_Opr _tmp2;
2159 public:
2160 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2161 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
2162 : LIR_Op(code, result, NULL) // no result, no info
2163 , _addr(addr)
2164 , _cmp_value(cmp_value)
2165 , _new_value(new_value)
2166 , _tmp1(t1)
2167 , _tmp2(t2) { }
2169 LIR_Opr addr() const { return _addr; }
2170 LIR_Opr cmp_value() const { return _cmp_value; }
2171 LIR_Opr new_value() const { return _new_value; }
2172 LIR_Opr tmp1() const { return _tmp1; }
2173 LIR_Opr tmp2() const { return _tmp2; }
2175 virtual void emit_code(LIR_Assembler* masm);
2176 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
2177 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2178 };
2180 // LIR_OpProfileCall
2181 class LIR_OpProfileCall : public LIR_Op {
2182 friend class LIR_OpVisitState;
2184 private:
2185 ciMethod* _profiled_method;
2186 int _profiled_bci;
2187 ciMethod* _profiled_callee;
2188 LIR_Opr _mdo;
2189 LIR_Opr _recv;
2190 LIR_Opr _tmp1;
2191 ciKlass* _known_holder;
2193 public:
2194 // Destroys recv
2195 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2196 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2197 , _profiled_method(profiled_method)
2198 , _profiled_bci(profiled_bci)
2199 , _profiled_callee(profiled_callee)
2200 , _mdo(mdo)
2201 , _recv(recv)
2202 , _tmp1(t1)
2203 , _known_holder(known_holder) { }
2205 ciMethod* profiled_method() const { return _profiled_method; }
2206 int profiled_bci() const { return _profiled_bci; }
2207 ciMethod* profiled_callee() const { return _profiled_callee; }
2208 LIR_Opr mdo() const { return _mdo; }
2209 LIR_Opr recv() const { return _recv; }
2210 LIR_Opr tmp1() const { return _tmp1; }
2211 ciKlass* known_holder() const { return _known_holder; }
2213 virtual void emit_code(LIR_Assembler* masm);
2214 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2215 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2216 };
2218 // LIR_OpProfileType
2219 class LIR_OpProfileType : public LIR_Op {
2220 friend class LIR_OpVisitState;
2222 private:
2223 LIR_Opr _mdp;
2224 LIR_Opr _obj;
2225 LIR_Opr _tmp;
2226 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2227 intptr_t _current_klass; // what the profiling currently reports
2228 bool _not_null; // true if we know statically that _obj cannot be null
2229 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2230 // _exact_klass it the only possible type for this parameter in any context.
2232 public:
2233 // Destroys recv
2234 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2235 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2236 , _mdp(mdp)
2237 , _obj(obj)
2238 , _exact_klass(exact_klass)
2239 , _current_klass(current_klass)
2240 , _tmp(tmp)
2241 , _not_null(not_null)
2242 , _no_conflict(no_conflict) { }
2244 LIR_Opr mdp() const { return _mdp; }
2245 LIR_Opr obj() const { return _obj; }
2246 LIR_Opr tmp() const { return _tmp; }
2247 ciKlass* exact_klass() const { return _exact_klass; }
2248 intptr_t current_klass() const { return _current_klass; }
2249 bool not_null() const { return _not_null; }
2250 bool no_conflict() const { return _no_conflict; }
2252 virtual void emit_code(LIR_Assembler* masm);
2253 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2254 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2255 };
2257 class LIR_InsertionBuffer;
2259 //--------------------------------LIR_List---------------------------------------------------
2260 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2261 // The LIR instructions are appended by the LIR_List class itself;
2262 //
2263 // Notes:
2264 // - all offsets are(should be) in bytes
2265 // - local positions are specified with an offset, with offset 0 being local 0
2267 class LIR_List: public CompilationResourceObj {
2268 private:
2269 LIR_OpList _operations;
2271 Compilation* _compilation;
2272 #ifndef PRODUCT
2273 BlockBegin* _block;
2274 #endif
2275 #ifdef ASSERT
2276 const char * _file;
2277 int _line;
2278 #endif
2280 void append(LIR_Op* op) {
2281 if (op->source() == NULL)
2282 op->set_source(_compilation->current_instruction());
2283 #ifndef PRODUCT
2284 if (PrintIRWithLIR) {
2285 _compilation->maybe_print_current_instruction();
2286 op->print(); tty->cr();
2287 }
2288 #endif // PRODUCT
2290 _operations.append(op);
2292 #ifdef ASSERT
2293 op->verify();
2294 op->set_file_and_line(_file, _line);
2295 _file = NULL;
2296 _line = 0;
2297 #endif
2298 }
2300 public:
2301 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2303 #ifdef ASSERT
2304 void set_file_and_line(const char * file, int line);
2305 #endif
2307 //---------- accessors ---------------
2308 LIR_OpList* instructions_list() { return &_operations; }
2309 int length() const { return _operations.length(); }
2310 LIR_Op* at(int i) const { return _operations.at(i); }
2312 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2314 // insert LIR_Ops in buffer to right places in LIR_List
2315 void append(LIR_InsertionBuffer* buffer);
2317 //---------- mutators ---------------
2318 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2319 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2320 void remove_at(int i) { _operations.remove_at(i); }
2322 //---------- printing -------------
2323 void print_instructions() PRODUCT_RETURN;
2326 //---------- instructions -------------
2327 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2328 address dest, LIR_OprList* arguments,
2329 CodeEmitInfo* info) {
2330 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2331 }
2332 void call_static(ciMethod* method, LIR_Opr result,
2333 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2334 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2335 }
2336 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2337 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2338 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2339 }
2340 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2341 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2342 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2343 }
2344 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2345 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2346 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2347 }
2349 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2350 void word_align() { append(new LIR_Op0(lir_word_align)); }
2351 void membar() { append(new LIR_Op0(lir_membar)); }
2352 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2353 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2354 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2355 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2356 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2357 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2359 void nop() { append(new LIR_Op0(lir_nop)); }
2360 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2362 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2363 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2365 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2367 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2368 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2370 // result is a stack location for old backend and vreg for UseLinearScan
2371 // stack_loc_temp is an illegal register for old backend
2372 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2373 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2374 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2375 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2376 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2377 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2378 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2379 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2380 if (UseCompressedOops) {
2381 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2382 } else {
2383 move(src, dst, info);
2384 }
2385 }
2386 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2387 if (UseCompressedOops) {
2388 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2389 } else {
2390 move(src, dst, info);
2391 }
2392 }
2393 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2395 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2396 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2398 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2399 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2401 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2403 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2405 #ifdef PPC
2406 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2407 #endif
2408 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2410 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2411 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2412 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2414 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2415 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2417 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
2418 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2419 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2420 }
2421 void unwind_exception(LIR_Opr exceptionOop) {
2422 append(new LIR_Op1(lir_unwind, exceptionOop));
2423 }
2425 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2426 append(new LIR_Op2(lir_compare_to, left, right, dst));
2427 }
2429 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2430 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2432 #ifndef MIPS64
2433 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2434 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2435 }
2436 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2437 cmp(condition, left, LIR_OprFact::intConst(right), info);
2438 }
2440 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2441 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2443 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2444 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2445 }
2447 #else
2448 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2449 CodeEmitInfo* info = NULL) {
2450 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2451 }
2453 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2454 CodeEmitInfo* info = NULL) {
2455 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2456 }
2458 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2459 CodeEmitInfo* info) {
2460 append(new LIR_Op2(lir_null_check_for_branch, condition,
2461 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2462 LIR_OprFact::intConst(c),
2463 info, T_INT));
2464 }
2466 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2467 CodeEmitInfo* info) {
2468 append(new LIR_Op2(lir_null_check_for_branch, condition,
2469 reg,
2470 LIR_OprFact::address(addr),
2471 info));
2472 }
2474 #endif
2475 #ifndef MIPS64
2476 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2477 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2478 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2479 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2480 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2481 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2482 #else
2483 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2484 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2485 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2486 #endif
2488 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2489 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2490 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2491 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2492 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2493 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2494 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2495 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2496 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2498 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2499 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2500 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2501 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2502 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2503 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2504 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2506 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2507 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2509 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2511 void prefetch(LIR_Address* addr, bool is_store);
2513 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2514 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2515 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2516 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2517 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2519 #ifdef MIPS64
2520 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2521 #endif
2523 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2524 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2525 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2526 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2527 #ifndef MIPS64
2528 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2529 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2530 #else
2531 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2532 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2533 #endif
2535 // jump is an unconditional branch
2536 void jump(BlockBegin* block) {
2537 #ifndef MIPS64
2538 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2539 #else
2540 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2541 #endif
2543 }
2544 void jump(CodeStub* stub) {
2545 #ifndef MIPS64
2546 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2547 #else
2548 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2549 #endif
2551 }
2552 #ifndef MIPS64
2553 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2554 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2555 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2556 append(new LIR_OpBranch(cond, type, block));
2557 }
2558 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2559 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2560 append(new LIR_OpBranch(cond, type, stub));
2561 }
2562 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2563 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2564 append(new LIR_OpBranch(cond, type, block, unordered));
2565 }
2566 #else
2567 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2568 append(new LIR_OpBranch(cond, left, right, lbl));
2569 }
2571 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2572 append(new LIR_OpBranch(cond, left, right, type, block));
2573 }
2575 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2576 append(new LIR_OpBranch(cond, left, right, type, stub));
2577 }
2579 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2580 BlockBegin* block, BlockBegin* unordered) {
2581 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2582 }
2584 #endif
2586 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2587 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2588 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2590 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2591 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2592 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2594 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2595 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2597 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2598 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2599 }
2601 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2602 LIR_OprList* arguments, CodeEmitInfo* info) {
2603 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2604 }
2606 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2607 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2608 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2610 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2611 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2612 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2614 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2616 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2618 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2620 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2621 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2623 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2624 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2625 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2626 ciMethod* profiled_method, int profiled_bci);
2627 // MethodData* profiling
2628 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2629 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2630 }
2631 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2632 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2633 }
2635 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2636 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2637 #ifdef ASSERT
2638 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2639 #endif
2640 };
2642 void print_LIR(BlockList* blocks);
2644 class LIR_InsertionBuffer : public CompilationResourceObj {
2645 private:
2646 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2648 // list of insertion points. index and count are stored alternately:
2649 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2650 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2651 intStack _index_and_count;
2653 // the LIR_Ops to be inserted
2654 LIR_OpList _ops;
2656 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2657 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2658 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2660 #ifdef ASSERT
2661 void verify();
2662 #endif
2663 public:
2664 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2666 // must be called before using the insertion buffer
2667 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2668 bool initialized() const { return _lir != NULL; }
2669 // called automatically when the buffer is appended to the LIR_List
2670 void finish() { _lir = NULL; }
2672 // accessors
2673 LIR_List* lir_list() const { return _lir; }
2674 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2675 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2676 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2678 int number_of_ops() const { return _ops.length(); }
2679 LIR_Op* op_at(int i) const { return _ops.at(i); }
2681 // append an instruction to the buffer
2682 void append(int index, LIR_Op* op);
2684 // instruction
2685 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2686 };
2689 //
2690 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2691 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2692 // information about the input, output and temporaries used by the
2693 // op to be recorded. It also records whether the op has call semantics
2694 // and also records all the CodeEmitInfos used by this op.
2695 //
2698 class LIR_OpVisitState: public StackObj {
2699 public:
2700 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2702 enum {
2703 maxNumberOfOperands = 20,
2704 maxNumberOfInfos = 4
2705 };
2707 private:
2708 LIR_Op* _op;
2710 // optimization: the operands and infos are not stored in a variable-length
2711 // list, but in a fixed-size array to save time of size checks and resizing
2712 int _oprs_len[numModes];
2713 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2714 int _info_len;
2715 CodeEmitInfo* _info_new[maxNumberOfInfos];
2717 bool _has_call;
2718 bool _has_slow_case;
2721 // only include register operands
2722 // addresses are decomposed to the base and index registers
2723 // constants and stack operands are ignored
2724 void append(LIR_Opr& opr, OprMode mode) {
2725 assert(opr->is_valid(), "should not call this otherwise");
2726 assert(mode >= 0 && mode < numModes, "bad mode");
2728 if (opr->is_register()) {
2729 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2730 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2732 } else if (opr->is_pointer()) {
2733 LIR_Address* address = opr->as_address_ptr();
2734 if (address != NULL) {
2735 // special handling for addresses: add base and index register of the address
2736 // both are always input operands or temp if we want to extend
2737 // their liveness!
2738 if (mode == outputMode) {
2739 mode = inputMode;
2740 }
2741 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2742 if (address->_base->is_valid()) {
2743 assert(address->_base->is_register(), "must be");
2744 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2745 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2746 }
2747 if (address->_index->is_valid()) {
2748 assert(address->_index->is_register(), "must be");
2749 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2750 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2751 }
2753 } else {
2754 assert(opr->is_constant(), "constant operands are not processed");
2755 }
2756 } else {
2757 assert(opr->is_stack(), "stack operands are not processed");
2758 }
2759 }
2761 void append(CodeEmitInfo* info) {
2762 assert(info != NULL, "should not call this otherwise");
2763 assert(_info_len < maxNumberOfInfos, "array overflow");
2764 _info_new[_info_len++] = info;
2765 }
2767 public:
2768 LIR_OpVisitState() { reset(); }
2770 LIR_Op* op() const { return _op; }
2771 void set_op(LIR_Op* op) { reset(); _op = op; }
2773 bool has_call() const { return _has_call; }
2774 bool has_slow_case() const { return _has_slow_case; }
2776 void reset() {
2777 _op = NULL;
2778 _has_call = false;
2779 _has_slow_case = false;
2781 _oprs_len[inputMode] = 0;
2782 _oprs_len[tempMode] = 0;
2783 _oprs_len[outputMode] = 0;
2784 _info_len = 0;
2785 }
2788 int opr_count(OprMode mode) const {
2789 assert(mode >= 0 && mode < numModes, "bad mode");
2790 return _oprs_len[mode];
2791 }
2793 LIR_Opr opr_at(OprMode mode, int index) const {
2794 assert(mode >= 0 && mode < numModes, "bad mode");
2795 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2796 return *_oprs_new[mode][index];
2797 }
2799 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2800 assert(mode >= 0 && mode < numModes, "bad mode");
2801 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2802 *_oprs_new[mode][index] = opr;
2803 }
2805 int info_count() const {
2806 return _info_len;
2807 }
2809 CodeEmitInfo* info_at(int index) const {
2810 assert(index < _info_len, "index out of bounds");
2811 return _info_new[index];
2812 }
2814 XHandlers* all_xhandler();
2816 // collects all register operands of the instruction
2817 void visit(LIR_Op* op);
2819 #ifdef ASSERT
2820 // check that an operation has no operands
2821 bool no_operands(LIR_Op* op);
2822 #endif
2824 // LIR_Op visitor functions use these to fill in the state
2825 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2826 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2827 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2828 void do_info(CodeEmitInfo* info) { append(info); }
2830 void do_stub(CodeStub* stub);
2831 void do_call() { _has_call = true; }
2832 void do_slow_case() { _has_slow_case = true; }
2833 void do_slow_case(CodeEmitInfo* info) {
2834 _has_slow_case = true;
2835 append(info);
2836 }
2837 };
2840 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2842 #endif // SHARE_VM_C1_C1_LIR_HPP
