Mercurial > jdk8-mips64-public > hotspot / file revision

 /*

  * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.

  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.

  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

  *

  * This code is free software; you can redistribute it and/or modify it

  * under the terms of the GNU General Public License version 2 only, as

  * published by the Free Software Foundation.

  *

  * This code is distributed in the hope that it will be useful, but WITHOUT

  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

  * version 2 for more details (a copy is included in the LICENSE file that

  * accompanied this code).

  *

  * You should have received a copy of the GNU General Public License version

  * 2 along with this work; if not, write to the Free Software Foundation,

  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

  *

  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

  * or visit www.oracle.com if you need additional information or have any

  * questions.

  *

  */

 #include "precompiled.hpp"

 #include "asm/macroAssembler.hpp"

 #include "interpreter/interpreter.hpp"

 #include "interpreter/interpreterRuntime.hpp"

 #include "interpreter/templateTable.hpp"

 #include "memory/universe.inline.hpp"

 #include "oops/methodData.hpp"

 #include "oops/objArrayKlass.hpp"

 #include "oops/oop.inline.hpp"

 #include "prims/methodHandles.hpp"

 #include "runtime/sharedRuntime.hpp"

 #include "runtime/stubRoutines.hpp"

 #include "runtime/synchronizer.hpp"

 #ifndef CC_INTERP

 #define __ _masm->

 // Platform-dependent initialization

 void TemplateTable::pd_initialize() {

   // No mips specific initialization

 }

 // Address computation: local variables

 // we use t8 as the local variables pointer register, by yjl 6/27/2005

 static inline Address iaddress(int n) {

   return Address(LVP, Interpreter::local_offset_in_bytes(n));

 }

 static inline Address laddress(int n) {

   return iaddress(n + 1);

 }

 static inline Address faddress(int n) {

   return iaddress(n);

 }

 static inline Address daddress(int n) {

   return laddress(n);

 }

 static inline Address aaddress(int n) {

   return iaddress(n);

 }

 static inline Address haddress(int n)            { return iaddress(n + 0); }

 //FIXME , can not use dadd and dsll

 /*

 static inline Address iaddress(Register r) {

   return Address(r14, r, Address::times_8, Interpreter::value_offset_in_bytes());

 }

 static inline Address laddress(Register r) {

   return Address(r14, r, Address::times_8, Interpreter::local_offset_in_bytes(1));

 }

 static inline Address faddress(Register r) {

   return iaddress(r);

 }

 static inline Address daddress(Register r) {

   return laddress(r);

 }

 static inline Address aaddress(Register r) {

   return iaddress(r);

 }

 */

 static inline Address at_sp() 						{	return Address(SP, 	0); }					

 static inline Address at_sp_p1()          { return Address(SP,  1 * wordSize); }

 static inline Address at_sp_p2()          { return Address(SP,  2 * wordSize); }

 // At top of Java expression stack which may be different than esp().  It

 // isn't for category 1 objects.

 static inline Address at_tos   () {

   Address tos = Address(SP,  Interpreter::expr_offset_in_bytes(0));

   return tos;

 }

 static inline Address at_tos_p1() {

   return Address(SP,  Interpreter::expr_offset_in_bytes(1));

 }

 static inline Address at_tos_p2() {

   return Address(SP,  Interpreter::expr_offset_in_bytes(2));

 }

 static inline Address at_tos_p3() {

   return Address(SP,  Interpreter::expr_offset_in_bytes(3));

 }

 // we use S0 as bcp, be sure you have bcp in S0 before you call any of the Template generator 

 Address TemplateTable::at_bcp(int offset) {

   assert(_desc->uses_bcp(), "inconsistent uses_bcp information");

   return Address(BCP, offset);

 }

 #define callee_saved_register(R) assert((R>=S0 && R<=S7), "should use callee saved registers!")

 // bytecode folding

 void TemplateTable::patch_bytecode(Bytecodes::Code bc, Register bc_reg,

                                    Register tmp_reg, 

                                    bool load_bc_into_bc_reg,/*=true*/

                                    int byte_no) {

   if (!RewriteBytecodes) {

     return;

   }

   Label L_patch_done;

   switch (bc) {

   case Bytecodes::_fast_aputfield:

   case Bytecodes::_fast_bputfield:

   case Bytecodes::_fast_cputfield:

   case Bytecodes::_fast_dputfield:

   case Bytecodes::_fast_fputfield:

   case Bytecodes::_fast_iputfield:

   case Bytecodes::_fast_lputfield:

   case Bytecodes::_fast_sputfield:

     {

     // We skip bytecode quickening for putfield instructions when the put_code written to the constant pool cache

     // is zero. This is required so that every execution of this instruction calls out to 

     // InterpreterRuntime::resolve_get_put to do additional, required work.

     assert(byte_no == f1_byte || byte_no == f2_byte, "byte_no out of range");

     assert(load_bc_into_bc_reg, "we use bc_reg as temp");

     __ get_cache_and_index_and_bytecode_at_bcp(tmp_reg, bc_reg, tmp_reg, byte_no, 1);

     __ daddi(bc_reg, R0, bc);

     __ beq(tmp_reg, R0, L_patch_done);

     __ delayed()->nop();

     }

     break;

   default:

     assert(byte_no == -1, "sanity");

  // the pair bytecodes have already done the load.

   if (load_bc_into_bc_reg) {

     __ move(bc_reg, bc);

   }

   }

   if (JvmtiExport::can_post_breakpoint()) {

     Label L_fast_patch;

     // if a breakpoint is present we can't rewrite the stream directly

     __ lbu(tmp_reg, at_bcp(0));

     __ move(AT, Bytecodes::_breakpoint);

     __ bne(tmp_reg, AT, L_fast_patch);

     __ delayed()->nop();

     __ get_method(tmp_reg);

     // Let breakpoint table handling rewrite to quicker bytecode 

     __ call_VM(NOREG, CAST_FROM_FN_PTR(address, 

 	  InterpreterRuntime::set_original_bytecode_at), tmp_reg, BCP, bc_reg);

     __ b(L_patch_done);

     __ delayed()->nop();

     __ bind(L_fast_patch);

   }

 #ifdef ASSERT

   Label L_okay;

   __ lbu(tmp_reg, at_bcp(0));

   __ move(AT, (int)Bytecodes::java_code(bc));

   __ beq(tmp_reg, AT, L_okay);

   __ delayed()->nop();

   __ beq(tmp_reg, bc_reg, L_patch_done);

   __ delayed()->nop();

   __ stop("patching the wrong bytecode");

   __ bind(L_okay);

 #endif

   // patch bytecode

   __ sb(bc_reg, at_bcp(0));

   __ bind(L_patch_done);

 }

 // Individual instructions

 void TemplateTable::nop() {

   transition(vtos, vtos);

   // nothing to do

 }

 void TemplateTable::shouldnotreachhere() {

   transition(vtos, vtos);

   __ stop("shouldnotreachhere bytecode");

 }

 void TemplateTable::aconst_null() {

   transition(vtos, atos);

   __ move(FSR, R0);

 }

 void TemplateTable::iconst(int value) {

   transition(vtos, itos);

   if (value == 0) {

     __ move(FSR, R0);

   } else {

     __ move(FSR, value);

   }

 }

 void TemplateTable::lconst(int value) {

   transition(vtos, ltos);

   if (value == 0) {

     __ move(FSR, R0);

   } else {

     __ move(FSR, value);

   }

   assert(value >= 0, "check this code");

   //__ move(SSR, R0);

 }

 void TemplateTable::fconst(int value) {

   static float  _f1 = 1.0, _f2 = 2.0;

   transition(vtos, ftos);

   float* p;

   switch( value ) {

     default: ShouldNotReachHere();

     case 0:  __ dmtc1(R0, FSF);  return;

     case 1:  p = &_f1;   break;

     case 2:  p = &_f2;   break;

   }

   __ li(AT, (address)p);

   __ lwc1(FSF, AT, 0);

 }

 void TemplateTable::dconst(int value) {

   static double _d1 = 1.0;

   transition(vtos, dtos);

   double* p;

   switch( value ) {

     default: ShouldNotReachHere();

     case 0:  __ dmtc1(R0, FSF);  return;

     case 1:  p = &_d1;   break;

   }

   __ li(AT, (address)p);

   __ ldc1(FSF, AT, 0);

 }

 void TemplateTable::bipush() {

   transition(vtos, itos);

   __ lb(FSR, at_bcp(1));

 }

 void TemplateTable::sipush() {

 	transition(vtos, itos);

 	__ load_two_bytes_from_at_bcp(FSR, AT, 1);

 	__ hswap(FSR);

 }

 // T1 : tags

 // T2 : index

 // T3 : cpool

 // T8 : tag

 void TemplateTable::ldc(bool wide) {

   transition(vtos, vtos);

   Label call_ldc, notFloat, notClass, Done;

   // get index in cpool

   if (wide) {

     __ load_two_bytes_from_at_bcp(T2, AT, 1);

     __ huswap(T2);

   } else {

     __ lbu(T2, at_bcp(1));

   }

   __ get_cpool_and_tags(T3, T1);

   const int base_offset = ConstantPool::header_size() * wordSize;

   const int tags_offset = Array<u1>::base_offset_in_bytes();

   // get type

   __ dadd(AT, T1, T2);

   __ lb(T1, AT, tags_offset);

   //now T1 is the tag

   // unresolved string - get the resolved string

   /*__ daddiu(AT, T1, - JVM_CONSTANT_UnresolvedString);

   __ beq(AT, R0, call_ldc);

   __ delayed()->nop();*/

   // unresolved class - get the resolved class

   __ daddiu(AT, T1, - JVM_CONSTANT_UnresolvedClass);

   __ beq(AT, R0, call_ldc);

   __ delayed()->nop();

   // unresolved class in error (resolution failed) - call into runtime

   // so that the same error from first resolution attempt is thrown.

   __ daddiu(AT, T1, -JVM_CONSTANT_UnresolvedClassInError); 

   __ beq(AT, R0, call_ldc);

   __ delayed()->nop();

   // resolved class - need to call vm to get java mirror of the class

   __ daddiu(AT, T1, - JVM_CONSTANT_Class);

   __ bne(AT, R0, notClass);

   __ delayed()->dsll(T2, T2, Address::times_8);

   __ bind(call_ldc);

   __ move(A1, wide);

   call_VM(FSR, CAST_FROM_FN_PTR(address, InterpreterRuntime::ldc), A1);

   //	__ sw(FSR, SP, - 1 * wordSize);

   __ push(atos);	

   __ b(Done);

   //	__ delayed()->daddi(SP, SP, - 1 * wordSize);

   __ delayed()->nop();

   __ bind(notClass);

   __ daddiu(AT, T1, -JVM_CONSTANT_Float);

   __ bne(AT, R0, notFloat);

   __ delayed()->nop();

   // ftos

   __ dadd(AT, T3, T2);

   __ lwc1(FSF, AT, base_offset);

   __ push_f();

   __ b(Done);

   __ delayed()->nop();

   __ bind(notFloat);

 #ifdef ASSERT

   { 

     Label L;

     __ daddiu(AT, T1, -JVM_CONSTANT_Integer);

     __ beq(AT, R0, L);

     __ delayed()->nop();

     __ stop("unexpected tag type in ldc");

     __ bind(L);

   }

 #endif

   // atos and itos

   __ dadd(T0, T3, T2);

   __ lw(FSR, T0, base_offset);

   __ push(itos);

   __ b(Done);

   __ delayed()->nop(); 

   if (VerifyOops) {

     __ verify_oop(FSR);

   }

   __ bind(Done);

 }

 // Fast path for caching oop constants.

 void TemplateTable::fast_aldc(bool wide) {

   transition(vtos, atos);

   Register result = FSR;

   Register tmp = SSR;

   int index_size = wide ? sizeof(u2) : sizeof(u1);

   Label resolved;

  // We are resolved if the resolved reference cache entry contains a

  // non-null object (String, MethodType, etc.)

   assert_different_registers(result, tmp);

   __ get_cache_index_at_bcp(tmp, 1, index_size);

   __ load_resolved_reference_at_index(result, tmp);

   __ bne(result, R0, resolved);

   __ delayed()->nop();

   address entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_ldc);

   // first time invocation - must resolve first

   int i = (int)bytecode();

   __ move(tmp, i);

   __ call_VM(result, entry, tmp);

   __ bind(resolved);

   if (VerifyOops) {

     __ verify_oop(result);

   }

 }

 // used register: T2, T3, T1

 // T2 : index

 // T3 : cpool

 // T1 : tag

 void TemplateTable::ldc2_w() {

   transition(vtos, vtos);

   Label Long, Done;

   // get index in cpool

   __ load_two_bytes_from_at_bcp(T2, AT, 1);

   __ huswap(T2);

   __ get_cpool_and_tags(T3, T1);

   const int base_offset = ConstantPool::header_size() * wordSize;

   const int tags_offset = Array<u1>::base_offset_in_bytes();

   // get type in T1

   __ dadd(AT, T1, T2);

   __ lb(T1, AT, tags_offset);

   __ daddiu(AT, T1, - JVM_CONSTANT_Double);

   __ bne(AT, R0, Long);

   __ delayed()->dsll(T2, T2, Address::times_8);

   // dtos	

   __ daddu(AT, T3, T2);

   __ ldc1(FSF, AT, base_offset + 0 * wordSize);

   __ sdc1(FSF, SP, - 2 * wordSize);

   __ b(Done);

   __ delayed()->daddi(SP, SP, - 2 * wordSize);

   // ltos

   __ bind(Long);

   __ dadd(AT, T3, T2);	

   __ ld(FSR, AT, base_offset + 0 * wordSize);

   __ push(ltos);

   __ bind(Done);

 }

 // we compute the actual local variable address here

 // the x86 dont do so for it has scaled index memory access model, we dont have, so do here

 void TemplateTable::locals_index(Register reg, int offset) {

   __ lbu(reg, at_bcp(offset));

   __ dsll(reg, reg, Address::times_8);

   __ dsub(reg, LVP, reg);

 }

 // this method will do bytecode folding of the two form:

 // iload iload			iload caload

 // used register : T2, T3

 // T2 : bytecode

 // T3 : folded code

 void TemplateTable::iload() {

   transition(vtos, itos);

   if (RewriteFrequentPairs) { 

     Label rewrite, done;

     // get the next bytecode in T2

     __ lbu(T2, at_bcp(Bytecodes::length_for(Bytecodes::_iload)));

     // if _iload, wait to rewrite to iload2.  We only want to rewrite the

     // last two iloads in a pair.  Comparing against fast_iload means that

     // the next bytecode is neither an iload or a caload, and therefore

     // an iload pair.

     __ move(AT, Bytecodes::_iload);

     __ beq(AT, T2, done);

     __ delayed()->nop();

     __ move(T3, Bytecodes::_fast_iload2);

     __ move(AT, Bytecodes::_fast_iload);

     __ beq(AT, T2, rewrite);

     __ delayed()->nop();

     // if _caload, rewrite to fast_icaload

     __ move(T3, Bytecodes::_fast_icaload);

     __ move(AT, Bytecodes::_caload);

     __ beq(AT, T2, rewrite);

     __ delayed()->nop();

     // rewrite so iload doesn't check again.

     __ move(T3, Bytecodes::_fast_iload);

     // rewrite

     // T3 : fast bytecode

     __ bind(rewrite);

     patch_bytecode(Bytecodes::_iload, T3, T2, false);

     __ bind(done);

   }

   // Get the local value into tos

   locals_index(T2);

   __ lw(FSR, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::fast_iload2() {

 	transition(vtos, itos);

 	locals_index(T2);

 	__ lw(FSR, T2, 0);

 	__ push(itos);

 	locals_index(T2, 3);

 	__ lw(FSR, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::fast_iload() {

   transition(vtos, itos);

   locals_index(T2);

   __ lw(FSR, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::lload() {

   transition(vtos, ltos);

   locals_index(T2);

   __ ld(FSR, T2, -wordSize);

   __ ld(SSR, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::fload() {

   transition(vtos, ftos);

   locals_index(T2);

 //FIXME, aoqi. How should the high 32bits be when store a single float into a 64bits register. 

   //__ mtc1(R0, FSF);

   __ lwc1(FSF, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::dload() {

   transition(vtos, dtos);

   locals_index(T2);

 /*  if (TaggedStackInterpreter) {

     // Get double out of locals array, onto temp stack and load with

     // float instruction into ST0

     __ dsll(AT,T2,Interpreter::stackElementScale());

     __ dadd(AT, LVP, AT);

     __ ldc1(FSF, AT, Interpreter::local_offset_in_bytes(1)); 

   } else {*/

     __ ldc1(FSF, T2, -wordSize);

     __ ldc1(SSF, T2, 0);

  // }

 }

 // used register T2

 // T2 : index

 void TemplateTable::aload() 

 {

   transition(vtos, atos);

   locals_index(T2);

   __ ld(FSR, T2, 0);

 }

 void TemplateTable::locals_index_wide(Register reg) {

   __ load_two_bytes_from_at_bcp(reg, AT, 2);

   __ huswap(reg);

   __ dsll(reg, reg, Address::times_8);

   __ dsub(reg, LVP, reg);

 }

 // used register T2

 // T2 : index

 void TemplateTable::wide_iload() {

 	transition(vtos, itos);

 	locals_index_wide(T2);

 	__ ld(FSR, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::wide_lload() {

 	transition(vtos, ltos);

 	locals_index_wide(T2);

 	__ ld(FSR, T2, -4);

 }

 // used register T2

 // T2 : index

 void TemplateTable::wide_fload() {

 	transition(vtos, ftos);

 	locals_index_wide(T2);

 	__ lwc1(FSF, T2, 0);

 }

 // used register T2

 // T2 : index

 void TemplateTable::wide_dload() {

 	transition(vtos, dtos);

 	locals_index_wide(T2);

 /*	if (TaggedStackInterpreter) {

 		// Get double out of locals array, onto temp stack and load with

 		// float instruction into ST0

 		//   __ movl(eax, laddress(ebx));

 		//  __ movl(edx, haddress(ebx));

 		__ dsll(AT,T2,Interpreter::stackElementScale());

 		__ dadd(AT, LVP, AT);

 		__ ldc1(FSF, AT, Interpreter::local_offset_in_bytes(1)); 

 		//  __ pushl(edx);  // push hi first

 		//  __ pushl(eax);

 		//  __ fld_d(Address(esp));

 		//  __ addl(esp, 2*wordSize);

 	} else {*/

 		__ ldc1(FSF, T2, -4);

 	//}

 }

 // used register T2

 // T2 : index

 void TemplateTable::wide_aload() {

 	transition(vtos, atos);

 	locals_index_wide(T2);

 	__ ld(FSR, T2, 0);

 }

 // we use A2 as the regiser for index, BE CAREFUL!

 // we dont use our tge 29 now, for later optimization

 void TemplateTable::index_check(Register array, Register index) {

   // Pop ptr into array

   __ pop_ptr(array);

   index_check_without_pop(array, index);

 }

 void TemplateTable::index_check_without_pop(Register array, Register index) {

   // destroys ebx

   // check array

   __ null_check(array, arrayOopDesc::length_offset_in_bytes());

   // check index

   Label ok;

   __ lw(AT, array, arrayOopDesc::length_offset_in_bytes());

 #ifndef OPT_RANGECHECK

   __ sltu(AT, index, AT);

   __ bne(AT, R0, ok);

   __ delayed()->nop(); 

   //throw_ArrayIndexOutOfBoundsException assume abberrant index in A2

   if (A2 != index) __ move(A2, index);		

   __ jmp(Interpreter::_throw_ArrayIndexOutOfBoundsException_entry);

   __ delayed()->nop();

   __ bind(ok);

 #else

   __ lw(AT, array, arrayOopDesc::length_offset_in_bytes());

   __ move(A2, index);

   __ tgeu(A2, AT, 29);

 #endif

 }

 void TemplateTable::iaload() {

   transition(itos, itos);

   //  __ pop(SSR);

   index_check(SSR, FSR);

   __ dsll(FSR, FSR, 2);

   __ dadd(FSR, SSR, FSR);

   //FSR: index

   __ lw(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_INT));

 }

 void TemplateTable::laload() {

   transition(itos, ltos);

   //  __ pop(SSR);

   index_check(SSR, FSR);

   __ dsll(AT, FSR, Address::times_8);

   __ dadd(AT, SSR, AT);

   __ ld(FSR, AT, arrayOopDesc::base_offset_in_bytes(T_LONG) + 0 * wordSize);

 }

 void TemplateTable::faload() {

 	transition(itos, ftos);

 	// __ pop(SSR);

 	index_check(SSR, FSR);  

 	__ shl(FSR, 2);

 	__ dadd(FSR, SSR, FSR);

 	__ lwc1(FSF, FSR, arrayOopDesc::base_offset_in_bytes(T_FLOAT));

 }

 void TemplateTable::daload() {

 	transition(itos, dtos);

 	//__ pop(SSR);

 	index_check(SSR, FSR);  

 	__ dsll(AT, FSR, 3);

 	__ dadd(AT, SSR, AT);

 	__ ldc1(FSF, AT, arrayOopDesc::base_offset_in_bytes(T_DOUBLE) + 0 * wordSize);

 }

 void TemplateTable::aaload() {

   transition(itos, atos);

   //__ pop(SSR);

   index_check(SSR, FSR);

   __ dsll(FSR, FSR, UseCompressedOops ? Address::times_4 : Address::times_8);

   __ dadd(FSR, SSR, FSR);

   //add for compressedoops

   __ load_heap_oop(FSR, Address(FSR, arrayOopDesc::base_offset_in_bytes(T_OBJECT)));

 }

 void TemplateTable::baload() {

   transition(itos, itos);

   //__ pop(SSR);

   index_check(SSR, FSR); 

   __ dadd(FSR, SSR, FSR);

   __ lb(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_BYTE));

 }

 void TemplateTable::caload() {

   transition(itos, itos);

   // __ pop(SSR);

   index_check(SSR, FSR);

   __ dsll(FSR, FSR, Address::times_2);

   __ dadd(FSR, SSR, FSR);

   __ lhu(FSR, FSR,  arrayOopDesc::base_offset_in_bytes(T_CHAR));

 }

 // iload followed by caload frequent pair

 // used register : T2

 // T2 : index

 void TemplateTable::fast_icaload() {

   transition(vtos, itos);

   // load index out of locals

   locals_index(T2);

   __ lw(FSR, T2, 0);

   //	__ pop(SSR);

   index_check(SSR, FSR);

   __ dsll(FSR, FSR, 1);

   __ dadd(FSR, SSR, FSR);

   __ lhu(FSR, FSR,  arrayOopDesc::base_offset_in_bytes(T_CHAR));

 }

 void TemplateTable::saload() {

   transition(itos, itos);

   // __ pop(SSR);

   index_check(SSR, FSR);  

   __ dsll(FSR, FSR, Address::times_2);

   __ dadd(FSR, SSR, FSR);

   __ lh(FSR, FSR,  arrayOopDesc::base_offset_in_bytes(T_SHORT));

 }

 void TemplateTable::iload(int n) {

 	transition(vtos, itos);

 	__ lw(FSR, iaddress(n));

 }

 void TemplateTable::lload(int n) {

 	transition(vtos, ltos);

 	__ ld(FSR, laddress(n));

 }

 void TemplateTable::fload(int n) {

   transition(vtos, ftos);

   //__ mtc1(R0, FSF);

   __ lwc1(FSF, faddress(n));

 }

 //FIXME here

 void TemplateTable::dload(int n) {

 	transition(vtos, dtos);

 	__ ldc1(FSF, laddress(n));

 }

 void TemplateTable::aload(int n) {

   transition(vtos, atos);

   __ ld(FSR, aaddress(n));

 }

 // used register : T2, T3

 // T2 : bytecode

 // T3 : folded code

 void TemplateTable::aload_0() {

 	transition(vtos, atos);

 	// According to bytecode histograms, the pairs:

 	//

 	// _aload_0, _fast_igetfield

 	// _aload_0, _fast_agetfield

 	// _aload_0, _fast_fgetfield

 	//

 	// occur frequently. If RewriteFrequentPairs is set, the (slow) _aload_0

 	// bytecode checks if the next bytecode is either _fast_igetfield, 

 	// _fast_agetfield or _fast_fgetfield and then rewrites the

 	// current bytecode into a pair bytecode; otherwise it rewrites the current

 	// bytecode into _fast_aload_0 that doesn't do the pair check anymore.

 	//

 	// Note: If the next bytecode is _getfield, the rewrite must be delayed,

 	//       otherwise we may miss an opportunity for a pair.

 	//

 	// Also rewrite frequent pairs

 	//   aload_0, aload_1

 	//   aload_0, iload_1

 	// These bytecodes with a small amount of code are most profitable to rewrite

 	if (RewriteFrequentPairs) {

 		Label rewrite, done;

 		// get the next bytecode in T2

 		__ lbu(T2, at_bcp(Bytecodes::length_for(Bytecodes::_aload_0)));

 		// do actual aload_0

 		aload(0);

 		// if _getfield then wait with rewrite

 		__ move(AT, Bytecodes::_getfield);

 		__ beq(AT, T2, done);

 		__ delayed()->nop();

 		// if _igetfield then reqrite to _fast_iaccess_0

 		assert(Bytecodes::java_code(Bytecodes::_fast_iaccess_0) == 

 				Bytecodes::_aload_0, "fix bytecode definition");

 		__ move(T3, Bytecodes::_fast_iaccess_0);

 		__ move(AT, Bytecodes::_fast_igetfield);

 		__ beq(AT, T2, rewrite);

 		__ delayed()->nop();

 		// if _agetfield then reqrite to _fast_aaccess_0

 		assert(Bytecodes::java_code(Bytecodes::_fast_aaccess_0) == 

 				Bytecodes::_aload_0, "fix bytecode definition");

 		__ move(T3, Bytecodes::_fast_aaccess_0);

 		__ move(AT, Bytecodes::_fast_agetfield);

 		__ beq(AT, T2, rewrite);

 		__ delayed()->nop();

 		// if _fgetfield then reqrite to _fast_faccess_0

 		assert(Bytecodes::java_code(Bytecodes::_fast_faccess_0) == 

 				Bytecodes::_aload_0, "fix bytecode definition");

 		__ move(T3, Bytecodes::_fast_faccess_0);

 		__ move(AT, Bytecodes::_fast_fgetfield);

 		__ beq(AT, T2, rewrite);

 		__ delayed()->nop();

 		// else rewrite to _fast_aload0

 		assert(Bytecodes::java_code(Bytecodes::_fast_aload_0) == 

 				Bytecodes::_aload_0, "fix bytecode definition");

 		__ move(T3, Bytecodes::_fast_aload_0);

 		// rewrite

 		__ bind(rewrite);

 		patch_bytecode(Bytecodes::_aload_0, T3, T2, false);

 		__ bind(done);

 	} else {

 		aload(0);

 	}

 }

 void TemplateTable::istore() {

 	transition(itos, vtos);

 	locals_index(T2);

 	__ sw(FSR, T2, 0);

 }

 void TemplateTable::lstore() {

   transition(ltos, vtos);

   locals_index(T2);

   __ sd(FSR, T2, -wordSize);

 }

 void TemplateTable::fstore() {

 	transition(ftos, vtos);

 	locals_index(T2);

 	__ swc1(FSF, T2, 0);

 }

 void TemplateTable::dstore() {

   transition(dtos, vtos);

   locals_index(T2);

   __ sdc1(FSF, T2, -wordSize);

 }

 void TemplateTable::astore() {

   transition(vtos, vtos);

   //  __ pop(FSR);

   __ pop_ptr(FSR);

   locals_index(T2);

   __ sd(FSR, T2, 0);

 }

 void TemplateTable::wide_istore() {

 	transition(vtos, vtos);

 	//  __ pop(FSR);

 	__ pop_i(FSR);

 	locals_index_wide(T2);

 	__ sd(FSR, T2, 0);

 }

 void TemplateTable::wide_lstore() {

 	transition(vtos, vtos);

 	//__ pop2(FSR, SSR);

 	//__ pop_l(FSR, SSR); 

 	__ pop_l(FSR); //aoqi:FIXME Is this right?

 	locals_index_wide(T2);

 	__ sd(FSR, T2, -4);

 }

 void TemplateTable::wide_fstore() {

 	wide_istore();

 }

 void TemplateTable::wide_dstore() {

 	wide_lstore();

 }

 void TemplateTable::wide_astore() {

 	transition(vtos, vtos);

 	__ pop_ptr(FSR);

 	locals_index_wide(T2);

 	__ sd(FSR, T2, 0);

 }

 // used register : T2

 void TemplateTable::iastore() {

   transition(itos, vtos);

   __ pop_i(SSR);

   index_check(T2, SSR);  // prefer index in ebx

   __ dsll(SSR, SSR, Address::times_4);

   __ dadd(T2, T2, SSR);

   __ sw(FSR, T2, arrayOopDesc::base_offset_in_bytes(T_INT));

 }

 // used register T2, T3

 void TemplateTable::lastore() {

   transition(ltos, vtos);

   __ pop_i (T2);

   index_check(T3, T2);

   __ dsll(T2, T2, Address::times_8);

   __ dadd(T3, T3, T2);

   __ sd(FSR, T3, arrayOopDesc::base_offset_in_bytes(T_LONG) + 0 * wordSize);

 }

 // used register T2

 void TemplateTable::fastore() {

   transition(ftos, vtos);

   __ pop_i(SSR);	

   index_check(T2, SSR); 

   __ dsll(SSR, SSR, Address::times_4);

   __ dadd(T2, T2, SSR);

   __ swc1(FSF, T2, arrayOopDesc::base_offset_in_bytes(T_FLOAT));

 }

 // used register T2, T3

 void TemplateTable::dastore() {

   transition(dtos, vtos);

   __ pop_i (T2); 

   index_check(T3, T2);  

   __ dsll(T2, T2, Address::times_8);

   __ daddu(T3, T3, T2);

   __ sdc1(FSF, T3, arrayOopDesc::base_offset_in_bytes(T_DOUBLE) + 0 * wordSize);

 }

 // used register : T2, T3, T8

 // T2 : array

 // T3 : subklass

 // T8 : supklass

 void TemplateTable::aastore() {

   Label is_null, ok_is_subtype, done;

   transition(vtos, vtos);

   // stack: ..., array, index, value

   __ ld(FSR, at_tos());     // Value

   __ lw(SSR, at_tos_p1());  // Index

   __ ld(T2, at_tos_p2());  // Array

   // index_check(T2, SSR);

   index_check_without_pop(T2, SSR);

   // do array store check - check for NULL value first

   __ beq(FSR, R0, is_null);

   __ delayed()->nop();

   // Move subklass into T3

   //__ ld(T3,  Address(FSR, oopDesc::klass_offset_in_bytes()));

   //add for compressedoops

   __ load_klass(T3, FSR);

   // Move superklass into T8

   //__ ld(T8, Address(T2, oopDesc::klass_offset_in_bytes()));

   //add for compressedoops

   __ load_klass(T8, T2);

   __ ld(T8, Address(T8,  ObjArrayKlass::element_klass_offset()));

   // Compress array+index*4+12 into a single register. T2

   __ dsll(AT, SSR, UseCompressedOops? Address::times_4 : Address::times_8);

   __ dadd(T2, T2, AT);

   __ daddi(T2, T2, arrayOopDesc::base_offset_in_bytes(T_OBJECT));

   // Generate subtype check.

   // Superklass in T8.  Subklass in T3.

   __ gen_subtype_check(T8, T3, ok_is_subtype);				// <-- Jin

   // Come here on failure

   // object is at FSR

   __ jmp(Interpreter::_throw_ArrayStoreException_entry);    // <-- Jin

   __ delayed()->nop();

   // Come here on success

   __ bind(ok_is_subtype);

   //replace with do_oop_store->store_heap_oop

   //__ sd(FSR, T2, 0);

   __ store_heap_oop(Address(T2, 0), FSR);					// <-- Jin

   __ store_check(T2);

   __ b(done);

   __ delayed()->nop();

   // Have a NULL in FSR, EDX=T2, SSR=index.  Store NULL at ary[idx]

   __ bind(is_null);

   __ profile_null_seen(T9);

   __ dsll(AT, SSR, UseCompressedOops? Address::times_4 : Address::times_8);

   __ dadd(T2, T2, AT);

   //__ sd(FSR, T2, arrayOopDesc::base_offset_in_bytes(T_OBJECT));

   __ store_heap_oop(Address(T2, arrayOopDesc::base_offset_in_bytes(T_OBJECT)), FSR);	/* FSR is null here */

   __ bind(done);

   __ daddi(SP, SP, 3 * Interpreter::stackElementSize);

 }

 void TemplateTable::bastore() {

   transition(itos, vtos);

   __ pop_i (SSR); 

   index_check(T2, SSR);

   __ dadd(SSR, T2, SSR);

   __ sb(FSR, SSR, arrayOopDesc::base_offset_in_bytes(T_BYTE));

 }

 void TemplateTable::castore() {

   transition(itos, vtos);

   __ pop_i(SSR); 

   index_check(T2, SSR); 

   __ dsll(SSR, SSR, Address::times_2);

   __ dadd(SSR, T2, SSR);

   __ sh(FSR, SSR, arrayOopDesc::base_offset_in_bytes(T_CHAR));

 }

 void TemplateTable::sastore() {

   castore();

 }

 void TemplateTable::istore(int n) {

   transition(itos, vtos);

   __ sw(FSR, iaddress(n));

 }

 void TemplateTable::lstore(int n) {

   transition(ltos, vtos);

   __ sd(FSR, laddress(n));

 }

 void TemplateTable::fstore(int n) {

   transition(ftos, vtos);

   __ swc1(FSF, faddress(n));

 }

 void TemplateTable::dstore(int n) {

   transition(dtos, vtos);

   __ sdc1(FSF, laddress(n));

 }

 void TemplateTable::astore(int n) {

   transition(vtos, vtos);

   __ pop_ptr(FSR);

   __ sd(FSR, aaddress(n));

 }

 void TemplateTable::pop() {

   transition(vtos, vtos);

   __ daddi(SP, SP, Interpreter::stackElementSize);

 }

 void TemplateTable::pop2() {

   transition(vtos, vtos);

   __ daddi(SP, SP, 2 * Interpreter::stackElementSize);

 }

 void TemplateTable::dup() {

   transition(vtos, vtos);

   // stack: ..., a

   __ load_ptr(0, FSR);

   __ push_ptr(FSR);

   // stack: ..., a, a

 }

 // blows FSR

 void TemplateTable::dup_x1() {

 	transition(vtos, vtos);

 	// stack: ..., a, b

 	__ load_ptr(0, FSR);  // load b

 	__ load_ptr(1, A5);  // load a

 	__ store_ptr(1, FSR); // store b

 	__ store_ptr(0, A5); // store a

 	__ push_ptr(FSR);             // push b

 	// stack: ..., b, a, b

 }

 // blows FSR

 void TemplateTable::dup_x2() {

 	transition(vtos, vtos);

 	// stack: ..., a, b, c

 	__ load_ptr(0, FSR);  // load c

 	__ load_ptr(2, A5);  // load a

 	__ store_ptr(2, FSR); // store c in a

 	__ push_ptr(FSR);             // push c

 	// stack: ..., c, b, c, c

 	__ load_ptr(2, FSR);  // load b

 	__ store_ptr(2, A5); // store a in b

 	// stack: ..., c, a, c, c

 	__ store_ptr(1, FSR); // store b in c

 	// stack: ..., c, a, b, c

 }

 // blows FSR

 void TemplateTable::dup2() {

 	transition(vtos, vtos);

 	// stack: ..., a, b

 	__ load_ptr(1, FSR);  // load a

 	__ push_ptr(FSR);             // push a

 	__ load_ptr(1, FSR);  // load b

 	__ push_ptr(FSR);             // push b

 	// stack: ..., a, b, a, b

 }

 // blows FSR

 void TemplateTable::dup2_x1() {

 	transition(vtos, vtos);

 	// stack: ..., a, b, c

 	__ load_ptr(0, T2);  // load c

 	__ load_ptr(1, FSR);  // load b

 	__ push_ptr(FSR);             // push b

 	__ push_ptr(T2);             // push c

 	// stack: ..., a, b, c, b, c

 	__ store_ptr(3, T2); // store c in b

 	// stack: ..., a, c, c, b, c

 	__ load_ptr(4, T2);  // load a

 	__ store_ptr(2, T2); // store a in 2nd c

 	// stack: ..., a, c, a, b, c

 	__ store_ptr(4, FSR); // store b in a

 	// stack: ..., b, c, a, b, c

 	// stack: ..., b, c, a, b, c

 }

 // blows FSR, SSR

 void TemplateTable::dup2_x2() {

 	transition(vtos, vtos);

 	// stack: ..., a, b, c, d

 	// stack: ..., a, b, c, d

 	__ load_ptr(0, T2);  // load d

 	__ load_ptr(1, FSR);  // load c

 	__ push_ptr(FSR);             // push c

 	__ push_ptr(T2);             // push d

 	// stack: ..., a, b, c, d, c, d

 	__ load_ptr(4, FSR);  // load b

 	__ store_ptr(2, FSR); // store b in d

 	__ store_ptr(4, T2); // store d in b

 	// stack: ..., a, d, c, b, c, d

 	__ load_ptr(5, T2);  // load a

 	__ load_ptr(3, FSR);  // load c

 	__ store_ptr(3, T2); // store a in c

 	__ store_ptr(5, FSR); // store c in a

 	// stack: ..., c, d, a, b, c, d

 	// stack: ..., c, d, a, b, c, d

 }

 // blows FSR

 void TemplateTable::swap() {

 	transition(vtos, vtos);

 	// stack: ..., a, b

 	__ load_ptr(1, A5);  // load a

 	__ load_ptr(0, FSR);  // load b

 	__ store_ptr(0, A5); // store a in b

 	__ store_ptr(1, FSR); // store b in a

 	// stack: ..., b, a

 }

 void TemplateTable::iop2(Operation op) {

 	transition(itos, itos);

 	switch (op) {

 		case add  :                    

 			__ pop_i(SSR); 

 			__ addu32(FSR, SSR, FSR); 

 			break;

 		case sub  :  

 			__ pop_i(SSR); 

 			__ subu32(FSR, SSR, FSR); 

 			break;

 		case mul  :                    

 			__ lw(SSR, SP, 0);

 			__ mult(SSR, FSR);

 			__ daddi(SP, SP, wordSize);

 			__ nop();

 			__ mflo(FSR);

 			break;

 		case _and :                    

 			__ pop_i(SSR); 

 			__ andr(FSR, SSR, FSR); 

 			break;

 		case _or  :                    

 			__ pop_i(SSR); 

 			__ orr(FSR, SSR, FSR); 

 			break;

 		case _xor :                    

 			__ pop_i(SSR); 

 			__ xorr(FSR, SSR, FSR); 

 			break;

 		case shl  : 

 			__ pop_i(SSR); 

 			__ sllv(FSR, SSR, FSR);      

 			break; // implicit masking of lower 5 bits by Intel shift instr. mips also

 		case shr  : 

 			__ pop_i(SSR); 

 			__ srav(FSR, SSR, FSR);      

 			break; // implicit masking of lower 5 bits by Intel shift instr. mips also

 		case ushr : 

 			__ pop_i(SSR); 

 			__ srlv(FSR, SSR, FSR);     

 			break; // implicit masking of lower 5 bits by Intel shift instr. mips also

 		default   : ShouldNotReachHere();

 	}

 }

 // the result stored in FSR, SSR,

 // used registers : T2, T3

 //FIXME, aoqi

 void TemplateTable::lop2(Operation op) {

   transition(ltos, ltos);

   //__ pop2(T2, T3);

   __ pop_l(T2, T3);

 #ifdef ASSERT

   {

     Label  L;

     __ beq(T3, R0, L);

     __ delayed()->nop();

     // FIXME: stack verification required

 //    __ stop("lop2, wrong stack");  // <--- Fu 20130930

     __ bind(L);

   }

 #endif

   switch (op) {

     case add : 

       __ daddu(FSR, T2, FSR);

       //__ sltu(AT, FSR, T2);

       //__ daddu(SSR, T3, SSR);

       //__ daddu(SSR, SSR, AT); 

       break;

     case sub :

       __ dsubu(FSR, T2, FSR);

       //__ sltu(AT, T2, FSR);

       //__ dsubu(SSR, T3, SSR);

       //__ dsubu(SSR, SSR, AT);

       break;

     case _and: 

       __ andr(FSR, T2, FSR); 

       //__ andr(SSR, T3, SSR); 

       break;

     case _or : 

       __ orr(FSR, T2, FSR); 

       //__ orr(SSR, T3, SSR); 

       break;

     case _xor: 

       __ xorr(FSR, T2, FSR); 

       //__ xorr(SSR, T3, SSR); 

       break;

     default : ShouldNotReachHere();

   }

 }

 // java require this bytecode could handle 0x80000000/-1, dont cause a overflow exception, 

 // the result is 0x80000000

 // the godson2 cpu do the same, so we need not handle this specially like x86

 void TemplateTable::idiv() {

 	transition(itos, itos);

 	Label not_zero;

 	//__ pop(SSR);

 	__ pop_i(SSR);

 	__ div(SSR, FSR);

 	__ bne(FSR, R0, not_zero);

 	__ delayed()->nop();

 	//__ brk(7);

 	__ jmp(Interpreter::_throw_ArithmeticException_entry); 

 	__ delayed()->nop();

 	__ bind(not_zero);

 	__ mflo(FSR);

 }

 void TemplateTable::irem() {

 	transition(itos, itos);

 	Label not_zero;

 	//__ pop(SSR);

 	__ pop_i(SSR);

 	__ div(SSR, FSR);

 	__ bne(FSR, R0, not_zero);

 	__ delayed()->nop();

 	//__ brk(7);

 	__ jmp(Interpreter::_throw_ArithmeticException_entry);

 	__ delayed()->nop();

 	__ bind(not_zero);

 	__ mfhi(FSR);

 }

 // the multiplier in SSR||FSR, the multiplicand in stack

 // the result in SSR||FSR

 // used registers : T2, T3

 void TemplateTable::lmul() {

   transition(ltos, ltos);

   Label done;

   __ pop_l(T2, T3);

 #ifdef ASSERT

   {

     Label  L;

     __ orr(AT, T3, SSR);

     __ beq(AT, R0, L);

     __ delayed()->nop();

     //FIXME, aoqi

     //__ stop("lmul, wrong stack");

     __ bind(L);

   }

 #endif

   __ orr(AT, T2, FSR);

   __ beq(AT, R0, done);

   __ delayed()->nop();

   __ dmultu(T2, FSR);

   __ daddu(SSR, SSR, T3);

   __ nop();

   __ mflo(FSR);

   __ mfhi(SSR);

   __ b(done);

   __ delayed()->nop();

   __ bind(done);

 }

 // NOTE: i DONT use the Interpreter::_throw_ArithmeticException_entry

 void TemplateTable::ldiv() {

   transition(ltos, ltos);

   Label normal;

   __ bne(FSR, R0, normal);

   __ delayed()->nop();

   //__ brk(7);		//generate FPE

   __ jmp(Interpreter::_throw_ArithmeticException_entry);

   __ delayed()->nop();

   __ bind(normal);

   __ move(A1, FSR);

   __ pop_l(A2, A3); 

   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::ldiv), A1, A2);

 }

 // NOTE: i DONT use the Interpreter::_throw_ArithmeticException_entry

 void TemplateTable::lrem() {

   transition(ltos, ltos);

   Label normal;

   __ bne(FSR, R0, normal);

   __ delayed()->nop();

   __ jmp(Interpreter::_throw_ArithmeticException_entry);

   __ delayed()->nop();

   __ bind(normal);

   __ move(A1, FSR);

   __ pop_l (A2, A3); 

   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::lrem), A1, A2);

 }

 // result in FSR

 // used registers : T0

 void TemplateTable::lshl() {

   transition(itos, ltos);

   __ pop_l(T0, T1);	

 #ifdef ASSERT

   {

     Label  L;

     __ beq(T1, R0, L);

     __ delayed()->nop();

     //__ stop("lshl, wrong stack");  // <-- Fu 20130930 

     __ bind(L);

   }

 #endif

   __ andi(FSR, FSR, 0x3f);	      // the bit to be shifted

   __ dsllv(FSR, T0, FSR);

 }

 // used registers : T0

 void TemplateTable::lshr() {

   transition(itos, ltos);

   __ pop_l(T0, T1);	

 #ifdef ASSERT

   {

     Label  L;

     __ beq(T1, R0, L);

     __ delayed()->nop();

     __ stop("lshr, wrong stack");

     __ bind(L);

   }

 #endif

   __ andi(FSR, FSR, 0x3f);				// the bit to be shifted

   __ dsrav(FSR, T0, FSR);

 }

 // used registers : T0

 void TemplateTable::lushr() {

   transition(itos, ltos);

   __ pop_l(T0, T1);	

 #ifdef ASSERT

   {

     Label  L;

     __ beq(T1, R0, L);

     __ delayed()->nop();

     __ stop("lushr, wrong stack");

     __ bind(L);

   }

 #endif

   __ andi(FSR, FSR, 0x3f);				// the bit to be shifted

   __ dsrlv(FSR, T0, FSR);

 }

 // result in FSF

 void TemplateTable::fop2(Operation op) {

 	transition(ftos, ftos);

 	__ pop_ftos_to_esp();  // pop ftos into esp

 	switch (op) {

 		case add:

 			__ lwc1(FTF, at_sp());

 			__ add_s(FSF, FTF, FSF);

 			break;

 		case sub: 

 			__ lwc1(FTF, at_sp());

 			__ sub_s(FSF, FTF, FSF);

 			break;

 		case mul: 

 			__ lwc1(FTF, at_sp());

 			__ mul_s(FSF, FTF, FSF);

 			break;

 		case div: 

 			__ lwc1(FTF, at_sp());

 			__ div_s(FSF, FTF, FSF);

 			break;

 		case rem: 

 			__ mfc1(FSR, FSF);

 			__ mtc1(FSR, F12);

 			__ lwc1(FTF, at_sp());

 			__ rem_s(FSF, FTF, F12, FSF);

 			break;

 		default : ShouldNotReachHere();

 	}

 	__ daddi(SP, SP, 1 * wordSize);

 }

 // result in SSF||FSF

 // i dont handle the strict flags

 void TemplateTable::dop2(Operation op) {

 	transition(dtos, dtos);

 	__ pop_dtos_to_esp();  // pop dtos into esp

 	switch (op) {

 		case add: 

 			__ ldc1(FTF, at_sp());

 			__ add_d(FSF, FTF, FSF);

 			break;

 		case sub: 

 			__ ldc1(FTF, at_sp());

 			__ sub_d(FSF, FTF, FSF);

 			break;

 		case mul: 

 			__ ldc1(FTF, at_sp());

 			__ mul_d(FSF, FTF, FSF);

 			break;

 		case div:

 			__ ldc1(FTF, at_sp());

 			__ div_d(FSF, FTF, FSF);

 			break;

 		case rem:

 			__ dmfc1(FSR, FSF);

 			__ dmtc1(FSR, F12);

 			__ ldc1(FTF, at_sp());

 			__ rem_d(FSF, FTF, F12, FSF);

 			break;

 		default : ShouldNotReachHere();

 	}

 	__ daddi(SP, SP, 2 * wordSize);

 }

 void TemplateTable::ineg() {

 	transition(itos, itos);

 	__ neg(FSR);

 }

 void TemplateTable::lneg() {

 	transition(ltos, ltos);

 	__ dsubu(FSR, R0, FSR);

 }

 /*

 // Note: 'double' and 'long long' have 32-bits alignment on x86.

 static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) {

   // Use the expression (adr)&(~0xF) to provide 128-bits aligned address

   // of 128-bits operands for SSE instructions.

   jlong *operand = (jlong*)(((intptr_t)adr)&((intptr_t)(~0xF)));

   // Store the value to a 128-bits operand.

   operand[0] = lo;

   operand[1] = hi;

   return operand;

 }

 // Buffer for 128-bits masks used by SSE instructions.

 static jlong float_signflip_pool[2*2];

 static jlong double_signflip_pool[2*2];

 */

 void TemplateTable::fneg() {

 	transition(ftos, ftos);

 	__ neg_s(FSF, FSF);

 }

 void TemplateTable::dneg() {

 	transition(dtos, dtos);

 	__ neg_d(FSF, FSF);

 }

 // used registers : T2

 void TemplateTable::iinc() {

 	transition(vtos, vtos);

 	locals_index(T2);

 	__ lw(FSR, T2, 0);

 	__ lb(AT, at_bcp(2));           // get constant

 	__ daddu(FSR, FSR, AT);

 	__ sw(FSR, T2, 0);

 }

 // used register : T2

 void TemplateTable::wide_iinc() {

 	transition(vtos, vtos);

 	locals_index_wide(T2);

 	__ load_two_bytes_from_at_bcp(FSR, AT, 4);

 	__ hswap(FSR);

 	__ lw(AT, T2, 0);

 	__ daddu(FSR, AT, FSR);

 	__ sw(FSR, T2, 0);

 }

 void TemplateTable::convert() {

   // Checking

 #ifdef ASSERT

   { TosState tos_in  = ilgl;

     TosState tos_out = ilgl;

     switch (bytecode()) {

       case Bytecodes::_i2l: // fall through

       case Bytecodes::_i2f: // fall through

       case Bytecodes::_i2d: // fall through

       case Bytecodes::_i2b: // fall through

       case Bytecodes::_i2c: // fall through

       case Bytecodes::_i2s: tos_in = itos; break;

       case Bytecodes::_l2i: // fall through

       case Bytecodes::_l2f: // fall through

       case Bytecodes::_l2d: tos_in = ltos; break;

       case Bytecodes::_f2i: // fall through

       case Bytecodes::_f2l: // fall through

       case Bytecodes::_f2d: tos_in = ftos; break;

       case Bytecodes::_d2i: // fall through

       case Bytecodes::_d2l: // fall through

       case Bytecodes::_d2f: tos_in = dtos; break;

       default             : ShouldNotReachHere();

     }

     switch (bytecode()) {

       case Bytecodes::_l2i: // fall through

       case Bytecodes::_f2i: // fall through

       case Bytecodes::_d2i: // fall through

       case Bytecodes::_i2b: // fall through

       case Bytecodes::_i2c: // fall through

       case Bytecodes::_i2s: tos_out = itos; break;

       case Bytecodes::_i2l: // fall through

       case Bytecodes::_f2l: // fall through

       case Bytecodes::_d2l: tos_out = ltos; break;

       case Bytecodes::_i2f: // fall through

       case Bytecodes::_l2f: // fall through

       case Bytecodes::_d2f: tos_out = ftos; break;

       case Bytecodes::_i2d: // fall through

       case Bytecodes::_l2d: // fall through

       case Bytecodes::_f2d: tos_out = dtos; break;

       default             : ShouldNotReachHere();

     }

     transition(tos_in, tos_out);

   }

 #endif // ASSERT

   // Conversion

   // (Note: use pushl(ecx)/popl(ecx) for 1/2-word stack-ptr manipulation)

   switch (bytecode()) {

     case Bytecodes::_i2l:

       //__ extend_sign(SSR, FSR);

       __ sll(FSR, FSR, 0);

       break;

     case Bytecodes::_i2f:

       __ mtc1(FSR, FSF);

       __ cvt_s_w(FSF, FSF);

       break;

     case Bytecodes::_i2d:

       __ mtc1(FSR, FSF);

       __ cvt_d_w(FSF, FSF);

       break;

     case Bytecodes::_i2b:

       __ dsll32(FSR, FSR, 24);

       __ dsra32(FSR, FSR, 24);

       break;

     case Bytecodes::_i2c:

       __ andi(FSR, FSR, 0xFFFF);  // truncate upper 56 bits

       break;

     case Bytecodes::_i2s:

       __ dsll32(FSR, FSR, 16);

       __ dsra32(FSR, FSR, 16);

       break;

     case Bytecodes::_l2i:

       __ dsll32(FSR, FSR, 0);

       __ dsra32(FSR, FSR, 0);

       break;

     case Bytecodes::_l2f:

       __ dmtc1(FSR, FSF);

       //__ mtc1(SSR, SSF);

       __ cvt_s_l(FSF, FSF);

       break;

     case Bytecodes::_l2d:

       __ dmtc1(FSR, FSF);

       //__ mtc1(SSR, SSF);

       __ cvt_d_l(FSF, FSF);

       break;

     case Bytecodes::_f2i:

       {

 	Label L;

 	/*

 	__ c_un_s(FSF, FSF);		//NaN?

 	__ bc1t(L);

 	__ delayed(); __ move(FSR, R0);

 	*/

 	__ trunc_w_s(F12, FSF);

 	__ cfc1(AT, 31);

 	__ li(T0, 0x10000);

 	__ andr(AT, AT, T0);

 	__ beq(AT, R0, L);

 	__ delayed()->mfc1(FSR, F12);

 	__ mov_s(F12, FSF);

 	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::f2i), 1);

 	__ bind(L);

       }

       break;

     case Bytecodes::_f2l:

       {

 	Label L;

 	/*

 	__ move(SSR, R0);

 	__ c_un_s(FSF, FSF);		//NaN?

 	__ bc1t(L);

 	__ delayed();

 	__ move(FSR, R0);

 	*/

 	__ trunc_l_s(F12, FSF);

 	__ cfc1(AT, 31);

 	__ li(T0, 0x10000);

 	__ andr(AT, AT, T0);

 	__ beq(AT, R0, L);

 	__ delayed()->dmfc1(FSR, F12);

 	__ mov_s(F12, FSF);

 	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::f2l), 1);

 	__ bind(L);

       }

       break;

     case Bytecodes::_f2d:

       __ cvt_d_s(FSF, FSF);

       break;

     case Bytecodes::_d2i:

       {

 	Label L;

 	/*

 	__ c_un_d(FSF, FSF);		//NaN?

 	__ bc1t(L);

 	__ delayed(); __ move(FSR, R0);

 	*/

 	__ trunc_w_d(F12, FSF);

 	__ cfc1(AT, 31);

 	__ li(T0, 0x10000);

 	__ andr(AT, AT, T0);

 	__ beq(AT, R0, L);

 	__ delayed()->mfc1(FSR, F12);

 	__ mov_d(F12, FSF);

 	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::d2i), 1);

 	__ bind(L);

       }

       break;

     case Bytecodes::_d2l:

       {

 	Label L;

 	/*

 	__ move(SSR, R0);

 	__ c_un_d(FSF, FSF);		//NaN?

 	__ bc1t(L);

 	__ delayed(); __ move(FSR, R0);

 	*/

 	__ trunc_l_d(F12, FSF);

 	__ cfc1(AT, 31);

 	__ li(T0, 0x10000);

 	__ andr(AT, AT, T0);

 	__ beq(AT, R0, L);

 	__ delayed()->dmfc1(FSR, F12);

 	__ mov_d(F12, FSF);

 	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::d2l), 1);

 	__ bind(L);

       }

       break;

     case Bytecodes::_d2f:

       __ cvt_s_d(FSF, FSF);

       break;

     default             :

       ShouldNotReachHere();

   }

 }

 void TemplateTable::lcmp() {

   transition(ltos, itos);

   Label low, high, done;

   __ pop(T0);

   __ pop(R0);

   __ slt(AT, T0, FSR);

   __ bne(AT, R0, low);

   __ delayed()->nop();

   __ bne(T0, FSR, high);

   __ delayed()->nop();

   __ li(FSR, (long)0);

   __ b(done);

   __ delayed()->nop();

   __ bind(low);

   __ li(FSR, (long)-1);

   __ b(done);

   __ delayed()->nop();

   __ bind(high);

   __ li(FSR, (long)1);

   __ b(done);

   __ delayed()->nop();

   __ bind(done);

 }

 void TemplateTable::float_cmp(bool is_float, int unordered_result) {

 	Label less, done;

 	__ move(FSR, R0);

 	if (is_float) {

 		__ pop_ftos_to_esp();

 		__ lwc1(FTF, at_sp());

 		__ c_eq_s(FTF, FSF);

 		__ bc1t(done);

 		__ delayed()->daddi(SP, SP, 1 * wordSize);

 		if (unordered_result<0)

 			__ c_ult_s(FTF, FSF);

 		else

 			__ c_olt_s(FTF, FSF);

 	} else {

 		__ pop_dtos_to_esp();

 		__ ldc1(FTF, at_sp());

 		__ c_eq_d(FTF, FSF);

 		__ bc1t(done);

 		__ delayed()->daddi(SP, SP, 2 * wordSize);

 		if (unordered_result<0)

 			__ c_ult_d(FTF, FSF);

 		else

 			__ c_olt_d(FTF, FSF);

 	}

 	__ bc1t(less);

 	__ delayed()->nop();

 	__ move(FSR, 1);

 	__ b(done);

 	__ delayed()->nop();

 	__ bind(less);

 	__ move(FSR, -1);

 	__ bind(done);

 }

 // used registers : T3, A7, Rnext

 // FSR : return bci, this is defined by the vm specification

 // T2 : MDO taken count

 // T3 : method

 // A7 : offset

 // Rnext : next bytecode, this is required by dispatch_base

 void TemplateTable::branch(bool is_jsr, bool is_wide) {

   __ get_method(T3);

   __ profile_taken_branch(A7, T2);		// only C2 meaningful 

 #ifndef CORE

   const ByteSize be_offset = MethodCounters::backedge_counter_offset() 

     + InvocationCounter::counter_offset();

   const ByteSize inv_offset = MethodCounters::invocation_counter_offset() 

     + InvocationCounter::counter_offset();

   const int method_offset = frame::interpreter_frame_method_offset * wordSize;

 #endif // CORE

   // Load up T4 with the branch displacement

   if (!is_wide) {

     __ load_two_bytes_from_at_bcp(A7, AT, 1);

     __ hswap(A7);

   } else {

     __ lw(A7, at_bcp(1));

     __ swap(A7);

   }

   // Handle all the JSR stuff here, then exit.

   // It's much shorter and cleaner than intermingling with the

   // non-JSR normal-branch stuff occuring below.

   if (is_jsr) {

     // Pre-load the next target bytecode into Rnext

     __ dadd(AT, BCP, A7);

     __ lbu(Rnext, AT, 0);

     // compute return address as bci in FSR

     __ daddi(FSR, BCP, (is_wide?5:3) - in_bytes(ConstMethod::codes_offset()));

     __ ld(AT, T3, in_bytes(Method::const_offset()));

     __ dsub(FSR, FSR, AT);

     // Adjust the bcp in BCP by the displacement in A7

     __ dadd(BCP, BCP, A7);

     // jsr returns atos that is not an oop

     // __ dispatch_only_noverify(atos);

     // Push return address

     __ push_i(FSR);

     // jsr returns vtos

     __ dispatch_only_noverify(vtos);

     return;

   }

   // Normal (non-jsr) branch handling

   // Adjust the bcp in S0 by the displacement in T4

   __ dadd(BCP, BCP, A7);

 #ifdef CORE

   // Pre-load the next target bytecode into EBX

   __ lbu(Rnext, BCP, 0);

   // continue with the bytecode @ target

   __ dispatch_only(vtos);

 #else

   assert(UseLoopCounter || !UseOnStackReplacement, "on-stack-replacement requires loop counters");

   Label backedge_counter_overflow;

   Label profile_method;

   Label dispatch;

   if (UseLoopCounter) {

     // increment backedge counter for backward branches

     // eax: MDO

     // ebx: MDO bumped taken-count

     // T3: method

     // T4: target offset

     // BCP: target bcp

     // LVP: locals pointer

     __ bgtz(A7, dispatch);	// check if forward or backward branch

     __ delayed()->nop();

     // check if MethodCounters exists

     Label has_counters;

     __ ld(AT, T3, in_bytes(Method::method_counters_offset()));  // use AT as MDO, TEMP 

     __ bne(AT, R0, has_counters);

     __ nop();

     //__ push(T3);

     //__ push(A7);

     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::build_method_counters),

                T3);

     //__ pop(A7);

     //__ pop(T3);

     __ ld(AT, T3, in_bytes(Method::method_counters_offset()));  // use AT as MDO, TEMP

     __ beq(AT, R0, dispatch);

     __ nop();

     __ bind(has_counters);

     // increment back edge counter 

     __ ld(T1, T3, in_bytes(Method::method_counters_offset()));

     __ lw(T0, T1, in_bytes(be_offset));

     __ increment(T0, InvocationCounter::count_increment);

     __ sw(T0, T1, in_bytes(be_offset));

     // load invocation counter

     __ lw(T1, T1, in_bytes(inv_offset));

     // buffer bit added, mask no needed

     // by yjl 10/24/2005

     //__ move(AT, InvocationCounter::count_mask_value);

     //__ andr(T1, T1, AT);

     // dadd backedge counter & invocation counter

     __ dadd(T1, T1, T0);

     if (ProfileInterpreter) {

       // Test to see if we should create a method data oop

       //__ lui(AT, Assembler::split_high(int(&InvocationCounter::InterpreterProfileLimit)));

       //__ lw(AT, AT, Assembler::split_low(int(&InvocationCounter::InterpreterProfileLimit)));

       // T1 : backedge counter & invocation counter

       __ li(AT, (long)&InvocationCounter::InterpreterProfileLimit);

       __ lw(AT, AT, 0);

       __ slt(AT, T1, AT);

       __ bne(AT, R0, dispatch);

       __ delayed()->nop();

       // if no method data exists, go to profile method

       __ test_method_data_pointer(T1, profile_method);

       if (UseOnStackReplacement) {

 	// check for overflow against ebx which is the MDO taken count

 	//__ lui(AT, Assembler::split_high(int(&InvocationCounter::InterpreterBackwardBranchLimit)));

 	//__ lw(AT, AT, Assembler::split_low(int(&InvocationCounter::InterpreterBackwardBranchLimit)));

 	__ li(AT, (long)&InvocationCounter::InterpreterBackwardBranchLimit);

 	__ lw(AT, AT, 0);

 	// the value Rnext Is get from the beginning profile_taken_branch

 	__ slt(AT, T2, AT);

 	__ bne(AT, R0, dispatch);

 	__ delayed()->nop();

 	// When ProfileInterpreter is on, the backedge_count comes 

 	// from the methodDataOop, which value does not get reset on 

 	// the call to  frequency_counter_overflow().  

 	// To avoid excessive calls to the overflow routine while 

 	// the method is being compiled, dadd a second test to make 

 	// sure the overflow function is called only once every 

 	// overflow_frequency.

 	const int overflow_frequency = 1024;

 	__ andi(AT, T2, overflow_frequency-1);

 	__ beq(AT, R0, backedge_counter_overflow);

 	__ delayed()->nop();

       }

     } else {

       if (UseOnStackReplacement) {

 	// check for overflow against eax, which is the sum of the counters

 	//__ lui(AT, Assembler::split_high(int(&InvocationCounter::InterpreterBackwardBranchLimit)));

 	//__ lw(AT, AT, Assembler::split_low(int(&InvocationCounter::InterpreterBackwardBranchLimit)));

 	__ li(AT, (long)&InvocationCounter::InterpreterBackwardBranchLimit);

 	__ lw(AT, AT, 0);

 	__ slt(AT, T1, AT);

 	__ beq(AT, R0, backedge_counter_overflow);

 	__ delayed()->nop();

       }

     }

     __ bind(dispatch);

   }

   // Pre-load the next target bytecode into Rnext

   __ lbu(Rnext, BCP, 0);

   // continue with the bytecode @ target

   // FSR: return bci for jsr's, unused otherwise

   // Rnext: target bytecode

   // BCP: target bcp

   __ dispatch_only(vtos);

   if (UseLoopCounter) {

     if (ProfileInterpreter) {

       // Out-of-line code to allocate method data oop.

       __ bind(profile_method);

       __ call_VM(NOREG, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method));

       __ lbu(Rnext, BCP, 0);

       __ set_method_data_pointer_for_bcp();

 /*

       __ ld(T3, FP, method_offset);

       __ lw(T3, T3, in_bytes(Method::method_data_offset()));

       __ sw(T3, FP, frame::interpreter_frame_mdx_offset * wordSize);

       __ test_method_data_pointer(T3, dispatch);

       // offset non-null mdp by MDO::data_offset() + IR::profile_method()

       __ daddi(T3, T3, in_bytes(MethodData::data_offset()));

       __ dadd(T3, T3, T1);

       __ sw(T3, FP, frame::interpreter_frame_mdx_offset * wordSize);

 */

       __ b(dispatch);

       __ delayed()->nop();

     }

     if (UseOnStackReplacement) {

       // invocation counter overflow

       __ bind(backedge_counter_overflow);

       __ sub(A7, BCP, A7);	// branch bcp

       call_VM(NOREG, CAST_FROM_FN_PTR(address, 

 	    InterpreterRuntime::frequency_counter_overflow), A7);

       __ lbu(Rnext, BCP, 0);

       // V0: osr nmethod (osr ok) or NULL (osr not possible)

       // V1: osr adapter frame return address

       // Rnext: target bytecode

       // LVP: locals pointer

       // BCP: bcp

       __ beq(V0, R0, dispatch);

       __ delayed()->nop();

       // nmethod may have been invalidated (VM may block upon call_VM return)

       __ lw(T3, V0, nmethod::entry_bci_offset());

       __ move(AT, InvalidOSREntryBci);

       __ beq(AT, T3, dispatch);

       __ delayed()->nop();

       // We need to prepare to execute the OSR method. First we must

       // migrate the locals and monitors off of the stack.

       //eax V0: osr nmethod (osr ok) or NULL (osr not possible)

       //ebx V1: osr adapter frame return address

       //edx  Rnext: target bytecode

       //edi  LVP: locals pointer

       //esi  BCP: bcp

       __ move(BCP, V0); 

       // const Register thread = ecx;

       const Register thread = TREG;

 #ifndef OPT_THREAD

       __ get_thread(thread);

 #endif

       call_VM(noreg, CAST_FROM_FN_PTR(address, 

 	    SharedRuntime::OSR_migration_begin));

       // eax is OSR buffer, move it to expected parameter location

       //refer to osrBufferPointer in c1_LIRAssembler_mips.cpp	

       __ move(T0, V0);

       // pop the interpreter frame

       //  __ movl(edx, Address(ebp, frame::interpreter_frame_sender_sp_offset 

       //  * wordSize)); // get sender sp

       __ ld(A7, Address(FP, 

 	    frame::interpreter_frame_sender_sp_offset * wordSize)); 

       //FIXME, shall we keep the return address on the stack?	

       __ leave();                                // remove frame anchor

       // __ popl(edi);                         // get return address

       //__ daddi(SP, SP, wordSize);               // get return address

       //   __ pop(LVP);	

       __ move(LVP, RA);	

       // __ movl(esp, edx);                         // set sp to sender sp

       __ move(SP, A7);

       Label skip;

       Label chkint;

       // The interpreter frame we have removed may be returning to

       // either the callstub or the interpreter. Since we will

       // now be returning from a compiled (OSR) nmethod we must

       // adjust the return to the return were it can handler compiled

       // results and clean the fpu stack. This is very similar to

       // what a i2c adapter must do.

       // Are we returning to the call stub?

 #if 0	

       // __ cmpl(edi, (int)StubRoutines::_call_stub_return_address);

       __ daddi(AT, LVP, -(int)StubRoutines::_call_stub_return_address); 

       //  __ jcc(Assembler::notEqual, chkint);

       __ bne(AT, R0, chkint);

       __ delayed()->nop();      

       // yes adjust to the specialized call stub  return.

       // assert(StubRoutines::i486::get_call_stub_compiled_return() != NULL,

       // "must be set");

       assert(StubRoutines::gs2::get_call_stub_compiled_return() != NULL, 

 	  "must be set");

       // __ movl(edi, (intptr_t) StubRoutines::i486::get_call_stub_compiled_return());

       __ move(LVP, (intptr_t) StubRoutines::gs2::get_call_stub_compiled_return()); 

       //  __ jmp(skip);

       __ b(skip);

       __ delayed()->nop();

       __ bind(chkint);

       // Are we returning to the interpreter? Look for sentinel

       //__ cmpl(Address(edi, -8), Interpreter::return_sentinel);

       __ lw(AT, LVP , -8); 

       __ daddi(AT, AT, -Interpreter::return_sentinel); 

       //__ jcc(Assembler::notEqual, skip);

       __ bne(AT, R0, skip);

       __ delayed()->nop(); 

       // Adjust to compiled return back to interpreter

       // __ movl(edi, Address(edi, -4));

       __ lw(LVP, LVP, -4); 

       __ bind(skip);

 #endif

       // Align stack pointer for compiled code (note that caller is

       // responsible for undoing this fixup by remembering the old SP

       // in an ebp-relative location)

       //  __ andl(esp, -(StackAlignmentInBytes));

       __ move(AT, -(StackAlignmentInBytes));	

       __ andr(SP , SP , AT);

       // push the (possibly adjusted) return address

       //  __ pushl(edi);

       //__ push(LVP);

       //			__ move(RA, LVP);	

       // and begin the OSR nmethod

       //  __ jmp(Address(esi, nmethod::osr_entry_point_offset()));

       //refer to osr_entry in c1_LIRAssembler_mips.cpp	

       __ ld(AT, BCP, nmethod::osr_entry_point_offset()); 

       __ jr(AT); 

       __ delayed()->nop(); 

     }

   }

 #endif // not CORE

 }

 void TemplateTable::if_0cmp(Condition cc) {

   transition(itos, vtos);

   // assume branch is more often taken than not (loops use backward branches)

   Label not_taken;

   switch(cc) {

     case not_equal:

       __ beq(FSR, R0, not_taken);

       break;

     case equal:

       __ bne(FSR, R0, not_taken);

       break;

     case less:

       __ bgez(FSR, not_taken);

       break;

     case less_equal:

       __ bgtz(FSR, not_taken);

       break;

     case greater:

       __ blez(FSR, not_taken);

       break;

     case greater_equal:

       __ bltz(FSR, not_taken);

       break;

   }

   __ delayed()->nop();

   branch(false, false);

   __ bind(not_taken);

   __ profile_not_taken_branch(FSR);

 }

 void TemplateTable::if_icmp(Condition cc) {

   transition(itos, vtos);

   // assume branch is more often taken than not (loops use backward branches)

   Label not_taken;

   __ pop_i(SSR);	

   switch(cc) {

     case not_equal:

       __ beq(SSR, FSR, not_taken);

       break;

     case equal:

       __ bne(SSR, FSR, not_taken);

       break;

     case less:

       __ slt(AT, SSR, FSR);

       __ beq(AT, R0, not_taken);

       break;

     case less_equal:

       __ slt(AT, FSR, SSR);

       __ bne(AT, R0, not_taken);

       break;

     case greater:

       __ slt(AT, FSR, SSR);

       __ beq(AT, R0, not_taken);

       break;

     case greater_equal:

       __ slt(AT, SSR, FSR);

       __ bne(AT, R0, not_taken);

       break;

   }

   __ delayed()->nop();

   branch(false, false);

   __ bind(not_taken);

   __ profile_not_taken_branch(FSR);

 }

 void TemplateTable::if_nullcmp(Condition cc) {

   transition(atos, vtos);

   // assume branch is more often taken than not (loops use backward branches)

   Label not_taken;

   switch(cc) {

     case not_equal:

       __ beq(FSR, R0, not_taken);

       break;

     case equal:

       __ bne(FSR, R0, not_taken);

       break;

     default:

       ShouldNotReachHere();

   }

   __ delayed()->nop();

   branch(false, false);

   __ bind(not_taken);

   __ profile_not_taken_branch(FSR);

 }

 void TemplateTable::if_acmp(Condition cc) {

 	transition(atos, vtos);

 	// assume branch is more often taken than not (loops use backward branches)

 	Label not_taken;

 	//	__ lw(SSR, SP, 0);

 	__ pop_ptr(SSR);

 	switch(cc) {

 		case not_equal:

 			__ beq(SSR, FSR, not_taken);

 			break;

 		case equal:

 			__ bne(SSR, FSR, not_taken);

 			break;

 		default:

 			ShouldNotReachHere();

 	}

 	//	__ delayed()->daddi(SP, SP, 4);

 	__ delayed()->nop();

 	branch(false, false);

 	__ bind(not_taken);

 	__ profile_not_taken_branch(FSR);

 }

 // used registers : T1, T2, T3

 // T1 : method

 // T2 : returb bci

 void TemplateTable::ret() {

 	transition(vtos, vtos);

 	locals_index(T2);

 	__ ld(T2, T2, 0);

 	__ profile_ret(T2, T3);

 	__ get_method(T1);

 	__ ld(BCP, T1, in_bytes(Method::const_offset()));

 	__ dadd(BCP, BCP, T2);

 	__ daddi(BCP, BCP, in_bytes(ConstMethod::codes_offset()));

 	__ dispatch_next(vtos);

 }

 // used registers : T1, T2, T3

 // T1 : method

 // T2 : returb bci

 void TemplateTable::wide_ret() {

 	transition(vtos, vtos);

 	locals_index_wide(T2);

 	__ ld(T2, T2, 0);                   // get return bci, compute return bcp

 	__ profile_ret(T2, T3);

 	__ get_method(T1);

 	__ ld(BCP, T1, in_bytes(Method::const_offset()));

 	__ dadd(BCP, BCP, T2);

 	__ daddi(BCP, BCP, in_bytes(ConstMethod::codes_offset()));

 	__ dispatch_next(vtos);

 }

 // used register T2, T3, A7, Rnext

 // T2 : bytecode pointer

 // T3 : low

 // A7 : high

 // Rnext : dest bytecode, required by dispatch_base

 void TemplateTable::tableswitch() {

 	Label default_case, continue_execution;

 	transition(itos, vtos);

 	// align BCP

 	__ daddi(T2, BCP, BytesPerInt);

 	__ li(AT, -BytesPerInt);

 	__ andr(T2, T2, AT);

 	// load lo & hi

 	__ lw(T3, T2, 1 * BytesPerInt);

 	__ swap(T3);

 	__ lw(A7, T2, 2 * BytesPerInt);

 	__ swap(A7);

 	// check against lo & hi

 	__ slt(AT, FSR, T3);

 	__ bne(AT, R0, default_case);

 	__ delayed()->nop();

 	__ slt(AT, A7, FSR);

 	__ bne(AT, R0, default_case);

 	__ delayed()->nop();

 	// lookup dispatch offset, in A7 big endian

 	__ dsub(FSR, FSR, T3);

 	__ dsll(AT, FSR, Address::times_4);

 	__ dadd(AT, T2, AT);

 	__ lw(A7, AT, 3 * BytesPerInt);

 	__ profile_switch_case(FSR, T9, T3);

 	__ bind(continue_execution);

 	__ swap(A7);

 	__ dadd(BCP, BCP, A7);

 	__ lbu(Rnext, BCP, 0);

 	__ dispatch_only(vtos);

 	// handle default

 	__ bind(default_case);

 	__ profile_switch_default(FSR);

 	__ lw(A7, T2, 0);

 	__ b(continue_execution);

 	__ delayed()->nop();

 }

 void TemplateTable::lookupswitch() {

 	transition(itos, itos);

 	__ stop("lookupswitch bytecode should have been rewritten");

 }

 // used registers : T2, T3, A7, Rnext

 // T2 : bytecode pointer

 // T3 : pair index

 // A7 : offset

 // Rnext : dest bytecode

 // the data after the opcode is the same as lookupswitch

 // see Rewriter::rewrite_method for more information

 void TemplateTable::fast_linearswitch() {

   transition(itos, vtos);

   Label loop_entry, loop, found, continue_execution;  

   // swap eax so we can avoid swapping the table entries

   __ swap(FSR);

   // align BCP

   __ daddi(T2, BCP, BytesPerInt);

   __ li(AT, -BytesPerInt);

   __ andr(T2, T2, AT);

   // set counter

   __ lw(T3, T2, BytesPerInt);

   __ swap(T3);

   __ b(loop_entry);

   __ delayed()->nop();

   // table search

   __ bind(loop);

   // get the entry value

   __ dsll(AT, T3, Address::times_8);

   __ dadd(AT, T2, AT);

   __ lw(AT, AT, 2 * BytesPerInt);

   // found?

   __ beq(FSR, AT, found);

   __ delayed()->nop();

   __ bind(loop_entry);

   __ bgtz(T3, loop);

   __ delayed()->daddiu(T3, T3, -1);

   // default case

   __ profile_switch_default(FSR);

   __ lw(A7, T2, 0);

   __ b(continue_execution);

   __ delayed()->nop();

   // entry found -> get offset

   __ bind(found);

   __ dsll(AT, T3, Address::times_8);

   __ dadd(AT, T2, AT);

   __ lw(A7, AT, 3 * BytesPerInt);

   __ profile_switch_case(T3, FSR, T2);

   // continue execution

   __ bind(continue_execution);  

   __ swap(A7);

   __ dadd(BCP, BCP, A7);

   __ lbu(Rnext, BCP, 0);

   __ dispatch_only(vtos);

 }

 // used registers : T0, T1, T2, T3, A7, Rnext

 // T2 : pairs address(array)

 // Rnext : dest bytecode

 // the data after the opcode is the same as lookupswitch

 // see Rewriter::rewrite_method for more information

 void TemplateTable::fast_binaryswitch() {

   transition(itos, vtos);

   // Implementation using the following core algorithm:

   //

   // int binary_search(int key, LookupswitchPair* array, int n) {

   //   // Binary search according to "Methodik des Programmierens" by

   //   // Edsger W. Dijkstra and W.H.J. Feijen, Addison Wesley Germany 1985.

   //   int i = 0;

   //   int j = n;

   //   while (i+1 < j) {

   //     // invariant P: 0 <= i < j <= n and (a[i] <= key < a[j] or Q)

   //     // with      Q: for all i: 0 <= i < n: key < a[i]

   //     // where a stands for the array and assuming that the (inexisting)

   //     // element a[n] is infinitely big.

   //     int h = (i + j) >> 1;

   //     // i < h < j

   //     if (key < array[h].fast_match()) {

   //       j = h;

   //     } else {

   //       i = h;

   //     }

   //   }

   //   // R: a[i] <= key < a[i+1] or Q

   //   // (i.e., if key is within array, i is the correct index)

   //   return i;

   // }

   // register allocation

   const Register array = T2;

   const Register i = T3, j = A7;

   const Register h = T1;

   const Register temp = T0;

   const Register key = FSR;

   // setup array

   __ daddi(array, BCP, 3*BytesPerInt);

   __ li(AT, -BytesPerInt);

   __ andr(array, array, AT);

   // initialize i & j

   __ move(i, R0);

   __ lw(j, array, - 1 * BytesPerInt);

   // Convert j into native byteordering  

   __ swap(j);

   // and start

   Label entry;

   __ b(entry);

   __ delayed()->nop();

   // binary search loop

   { 

     Label loop;

     __ bind(loop);

     // int h = (i + j) >> 1;

     __ dadd(h, i, j);

     __ dsrl(h, h, 1);

     // if (key < array[h].fast_match()) {

     //   j = h;

     // } else {

     //   i = h;

     // }

     // Convert array[h].match to native byte-ordering before compare

     __ dsll(AT, h, Address::times_8);

     __ dadd(AT, array, AT);

     __ lw(temp, AT, 0 * BytesPerInt);

     __ swap(temp);

     {

       Label set_i, end_of_if;

       __ slt(AT, key, temp);

       __ beq(AT, R0, set_i);

       __ delayed()->nop(); 

       __ b(end_of_if);

       __ delayed(); __ move(j, h);

       __ bind(set_i);

       __ move(i, h);

       __ bind(end_of_if);

     }

     // while (i+1 < j)

     __ bind(entry);

     __ daddi(h, i, 1);

     __ slt(AT, h, j);

     __ bne(AT, R0, loop);

     __ delayed()->nop();

   }

   // end of binary search, result index is i (must check again!)

   Label default_case;

   // Convert array[i].match to native byte-ordering before compare

   __ dsll(AT, i, Address::times_8);

   __ dadd(AT, array, AT);

   __ lw(temp, AT, 0 * BytesPerInt);

   __ swap(temp);

   __ bne(key, temp, default_case);

   __ delayed()->nop();

   // entry found -> j = offset

   __ dsll(AT, i, Address::times_8);

   __ dadd(AT, array, AT);

   __ lw(j, AT, 1 * BytesPerInt);

   __ profile_switch_case(i, key, array);

   __ swap(j);

   __ dadd(BCP, BCP, j);

   __ lbu(Rnext, BCP, 0);

   __ dispatch_only(vtos);

   // default case -> j = default offset

   __ bind(default_case);

   __ profile_switch_default(i);

   __ lw(j, array, - 2 * BytesPerInt);

   __ swap(j);

   __ dadd(BCP, BCP, j);

   __ lbu(Rnext, BCP, 0);

   __ dispatch_only(vtos);

 }

 void TemplateTable::_return(TosState state) {

   transition(state, state);

   assert(_desc->calls_vm(), "inconsistent calls_vm information"); // call in remove_activation

   if (_desc->bytecode() == Bytecodes::_return_register_finalizer) {

     assert(state == vtos, "only valid state");

     __ ld(T1, aaddress(0));

     //__ ld(LVP, T1, oopDesc::klass_offset_in_bytes());

     __ load_klass(LVP, T1);

     __ lw(LVP, LVP, in_bytes(Klass::access_flags_offset()));

     __ move(AT, JVM_ACC_HAS_FINALIZER); 

     __ andr(AT, AT, LVP);//by_css

     Label skip_register_finalizer;

     __ beq(AT, R0, skip_register_finalizer);

     __ delayed()->nop(); 

     __ call_VM(noreg, CAST_FROM_FN_PTR(address, 

 	  InterpreterRuntime::register_finalizer), T1);

     __ bind(skip_register_finalizer);

   }

   __ remove_activation(state, T9);

   __ jr(T9);

   __ delayed()->nop();

 }

 // ----------------------------------------------------------------------------

 // Volatile variables demand their effects be made known to all CPU's

 // in order.  Store buffers on most chips allow reads & writes to

 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode

 // without some kind of memory barrier (i.e., it's not sufficient that

 // the interpreter does not reorder volatile references, the hardware

 // also must not reorder them).

 //

 // According to the new Java Memory Model (JMM):

 // (1) All volatiles are serialized wrt to each other.  ALSO reads &

 //     writes act as aquire & release, so:

 // (2) A read cannot let unrelated NON-volatile memory refs that

 //     happen after the read float up to before the read.  It's OK for

 //     non-volatile memory refs that happen before the volatile read to

 //     float down below it.

 // (3) Similar a volatile write cannot let unrelated NON-volatile

 //     memory refs that happen BEFORE the write float down to after the

 //     write.  It's OK for non-volatile memory refs that happen after the

 //     volatile write to float up before it.

 //

 // We only put in barriers around volatile refs (they are expensive),

 // not _between_ memory refs (that would require us to track the

 // flavor of the previous memory refs).  Requirements (2) and (3)

 // require some barriers before volatile stores and after volatile

 // loads.  These nearly cover requirement (1) but miss the

 // volatile-store-volatile-load case.  This final case is placed after

 // volatile-stores although it could just as well go before

 // volatile-loads.

 //void TemplateTable::volatile_barrier(Assembler::Membar_mask_bits

 //                                     order_constraint) {

 void TemplateTable::volatile_barrier( ) {

   // Helper function to insert a is-volatile test and memory barrier

   //if (os::is_MP()) { // Not needed on single CPU

   //  __ membar(order_constraint);

   //}

 	if( !os::is_MP() ) return;	// Not needed on single CPU

 	__ sync();

 }

 // we dont shift left 2 bits in get_cache_and_index_at_bcp

 // for we always need shift the index we use it. the ConstantPoolCacheEntry 

 // is 16-byte long, index is the index in 

 // ConstantPoolCache, so cache + base_offset() + index * 16 is 

 // the corresponding ConstantPoolCacheEntry

 // used registers : T2

 // NOTE : the returned index need also shift left 4 to get the address!

 void TemplateTable::resolve_cache_and_index(int byte_no,

                                             Register Rcache,

 					    Register index,

                                             size_t index_size) {

   assert(byte_no == f1_byte || byte_no == f2_byte, "byte_no out of range");

   const Register temp = A1;

   assert_different_registers(Rcache, index);

   const int shift_count = (1 + byte_no)*BitsPerByte;

   Label resolved;

   __ get_cache_and_index_and_bytecode_at_bcp(Rcache, index, temp, byte_no, 1, index_size);

   // is resolved?

   int i = (int)bytecode();

   __ addi(temp, temp, -i);

   __ beq(temp, R0, resolved);

   __ delayed()->nop();

   // resolve first time through

   address entry;

   switch (bytecode()) {

     case Bytecodes::_getstatic      : // fall through

     case Bytecodes::_putstatic      : // fall through

     case Bytecodes::_getfield       : // fall through

     case Bytecodes::_putfield       : 

       entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_get_put); 

       break;

     case Bytecodes::_invokevirtual  : // fall through

     case Bytecodes::_invokespecial  : // fall through

     case Bytecodes::_invokestatic   : // fall through

     case Bytecodes::_invokeinterface: 

       entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_invoke);  

       break;

     case Bytecodes::_invokehandle:

       entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_invokehandle);

       break;

     case Bytecodes::_invokedynamic:

       entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_invokedynamic);

       break;

     default                      		: 

       fatal(err_msg("unexpected bytecode: %s", Bytecodes::name(bytecode())));

   }

   __ move(temp, i);

   __ call_VM(NOREG, entry, temp);

   // Update registers with resolved info

   __ get_cache_and_index_at_bcp(Rcache, index, 1, index_size);

   __ bind(resolved);

 }

 // The Rcache and index registers must be set before call

 void TemplateTable::load_field_cp_cache_entry(Register obj,

                                               Register cache,

                                               Register index,

                                               Register off,

                                               Register flags,

                                               bool is_static = false) {

   assert_different_registers(cache, index, flags, off);

   ByteSize cp_base_offset = ConstantPoolCache::base_offset();

   // Field offset

   __ dsll(AT, index, Address::times_ptr);

   __ dadd(AT, cache, AT);

   __ ld(off, AT, in_bytes(cp_base_offset + ConstantPoolCacheEntry::f2_offset()));

   // Flags    

   __ ld(flags, AT, in_bytes(cp_base_offset + ConstantPoolCacheEntry::flags_offset()));

   // klass     overwrite register

   if (is_static) {

     __ ld(obj, AT, in_bytes(cp_base_offset + ConstantPoolCacheEntry::f1_offset())); 

     const int mirror_offset = in_bytes(Klass::java_mirror_offset());

     __ ld(obj, Address(obj, mirror_offset));

     __ verify_oop(obj);	

   }

 }