Mon, 17 Sep 2012 12:57:58 -0700
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
Reviewed-by: kvn, jrose, bdelsart
1 /*
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "assembler_x86.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
48 class RegisterSaver {
49 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
50 // Capture info about frame layout
51 enum layout {
52 fpu_state_off = 0,
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
54 st0_off, st0H_off,
55 st1_off, st1H_off,
56 st2_off, st2H_off,
57 st3_off, st3H_off,
58 st4_off, st4H_off,
59 st5_off, st5H_off,
60 st6_off, st6H_off,
61 st7_off, st7H_off,
63 xmm0_off, xmm0H_off,
64 xmm1_off, xmm1H_off,
65 xmm2_off, xmm2H_off,
66 xmm3_off, xmm3H_off,
67 xmm4_off, xmm4H_off,
68 xmm5_off, xmm5H_off,
69 xmm6_off, xmm6H_off,
70 xmm7_off, xmm7H_off,
71 flags_off,
72 rdi_off,
73 rsi_off,
74 ignore_off, // extra copy of rbp,
75 rsp_off,
76 rbx_off,
77 rdx_off,
78 rcx_off,
79 rax_off,
80 // The frame sender code expects that rbp will be in the "natural" place and
81 // will override any oopMap setting for it. We must therefore force the layout
82 // so that it agrees with the frame sender code.
83 rbp_off,
84 return_off, // slot for return address
85 reg_save_size };
88 public:
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
91 int* total_frame_words, bool verify_fpu = true);
92 static void restore_live_registers(MacroAssembler* masm);
94 static int rax_offset() { return rax_off; }
95 static int rbx_offset() { return rbx_off; }
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
101 static int raxOffset(void) { return rax_off; }
102 static int rdxOffset(void) { return rdx_off; }
103 static int rbxOffset(void) { return rbx_off; }
104 static int xmm0Offset(void) { return xmm0_off; }
105 // This really returns a slot in the fp save area, which one is not important
106 static int fpResultOffset(void) { return st0_off; }
108 // During deoptimization only the result register need to be restored
109 // all the other values have already been extracted.
111 static void restore_result_registers(MacroAssembler* masm);
113 };
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
116 int* total_frame_words, bool verify_fpu) {
118 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
119 int frame_words = frame_size_in_bytes / wordSize;
120 *total_frame_words = frame_words;
122 assert(FPUStateSizeInWords == 27, "update stack layout");
124 // save registers, fpu state, and flags
125 // We assume caller has already has return address slot on the stack
126 // We push epb twice in this sequence because we want the real rbp,
127 // to be under the return like a normal enter and we want to use pusha
128 // We push by hand instead of pusing push
129 __ enter();
130 __ pusha();
131 __ pushf();
132 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
133 __ push_FPU_state(); // Save FPU state & init
135 if (verify_fpu) {
136 // Some stubs may have non standard FPU control word settings so
137 // only check and reset the value when it required to be the
138 // standard value. The safepoint blob in particular can be used
139 // in methods which are using the 24 bit control word for
140 // optimized float math.
142 #ifdef ASSERT
143 // Make sure the control word has the expected value
144 Label ok;
145 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
146 __ jccb(Assembler::equal, ok);
147 __ stop("corrupted control word detected");
148 __ bind(ok);
149 #endif
151 // Reset the control word to guard against exceptions being unmasked
152 // since fstp_d can cause FPU stack underflow exceptions. Write it
153 // into the on stack copy and then reload that to make sure that the
154 // current and future values are correct.
155 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
156 }
158 __ frstor(Address(rsp, 0));
159 if (!verify_fpu) {
160 // Set the control word so that exceptions are masked for the
161 // following code.
162 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
163 }
165 // Save the FPU registers in de-opt-able form
167 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
168 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
169 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
170 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
171 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
172 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
173 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
174 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
176 if( UseSSE == 1 ) { // Save the XMM state
177 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
178 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
179 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
180 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
181 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
182 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
183 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
184 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
185 } else if( UseSSE >= 2 ) {
186 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
187 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
188 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
189 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
190 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
191 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
192 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
193 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
194 }
196 // Set an oopmap for the call site. This oopmap will map all
197 // oop-registers and debug-info registers as callee-saved. This
198 // will allow deoptimization at this safepoint to find all possible
199 // debug-info recordings, as well as let GC find all oops.
201 OopMapSet *oop_maps = new OopMapSet();
202 OopMap* map = new OopMap( frame_words, 0 );
204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
206 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
207 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
208 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
209 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
210 // rbp, location is known implicitly, no oopMap
211 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
212 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
213 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
214 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
215 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
216 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
217 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
218 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
222 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
223 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
229 // %%% This is really a waste but we'll keep things as they were for now
230 if (true) {
231 #define NEXTREG(x) (x)->as_VMReg()->next()
232 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
233 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
234 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
235 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
236 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
237 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
238 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
239 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
240 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
241 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
242 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
243 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
244 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
245 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
246 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
247 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
248 #undef NEXTREG
249 #undef STACK_OFFSET
250 }
252 return map;
254 }
256 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
258 // Recover XMM & FPU state
259 if( UseSSE == 1 ) {
260 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
261 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
262 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
263 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
264 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
265 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
266 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
267 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
268 } else if( UseSSE >= 2 ) {
269 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
270 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
271 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
272 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
273 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
274 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
275 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
276 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
277 }
278 __ pop_FPU_state();
279 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
281 __ popf();
282 __ popa();
283 // Get the rbp, described implicitly by the frame sender code (no oopMap)
284 __ pop(rbp);
286 }
288 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
290 // Just restore result register. Only used by deoptimization. By
291 // now any callee save register that needs to be restore to a c2
292 // caller of the deoptee has been extracted into the vframeArray
293 // and will be stuffed into the c2i adapter we create for later
294 // restoration so only result registers need to be restored here.
295 //
297 __ frstor(Address(rsp, 0)); // Restore fpu state
299 // Recover XMM & FPU state
300 if( UseSSE == 1 ) {
301 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
302 } else if( UseSSE >= 2 ) {
303 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
304 }
305 __ movptr(rax, Address(rsp, rax_off*wordSize));
306 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
307 // Pop all of the register save are off the stack except the return address
308 __ addptr(rsp, return_off * wordSize);
309 }
311 // The java_calling_convention describes stack locations as ideal slots on
312 // a frame with no abi restrictions. Since we must observe abi restrictions
313 // (like the placement of the register window) the slots must be biased by
314 // the following value.
315 static int reg2offset_in(VMReg r) {
316 // Account for saved rbp, and return address
317 // This should really be in_preserve_stack_slots
318 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
319 }
321 static int reg2offset_out(VMReg r) {
322 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
323 }
325 // ---------------------------------------------------------------------------
326 // Read the array of BasicTypes from a signature, and compute where the
327 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
328 // quantities. Values less than SharedInfo::stack0 are registers, those above
329 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
330 // as framesizes are fixed.
331 // VMRegImpl::stack0 refers to the first slot 0(sp).
332 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
333 // up to RegisterImpl::number_of_registers) are the 32-bit
334 // integer registers.
336 // Pass first two oop/int args in registers ECX and EDX.
337 // Pass first two float/double args in registers XMM0 and XMM1.
338 // Doubles have precedence, so if you pass a mix of floats and doubles
339 // the doubles will grab the registers before the floats will.
341 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
342 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
343 // units regardless of build. Of course for i486 there is no 64 bit build
346 // ---------------------------------------------------------------------------
347 // The compiled Java calling convention.
348 // Pass first two oop/int args in registers ECX and EDX.
349 // Pass first two float/double args in registers XMM0 and XMM1.
350 // Doubles have precedence, so if you pass a mix of floats and doubles
351 // the doubles will grab the registers before the floats will.
352 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
353 VMRegPair *regs,
354 int total_args_passed,
355 int is_outgoing) {
356 uint stack = 0; // Starting stack position for args on stack
359 // Pass first two oop/int args in registers ECX and EDX.
360 uint reg_arg0 = 9999;
361 uint reg_arg1 = 9999;
363 // Pass first two float/double args in registers XMM0 and XMM1.
364 // Doubles have precedence, so if you pass a mix of floats and doubles
365 // the doubles will grab the registers before the floats will.
366 // CNC - TURNED OFF FOR non-SSE.
367 // On Intel we have to round all doubles (and most floats) at
368 // call sites by storing to the stack in any case.
369 // UseSSE=0 ==> Don't Use ==> 9999+0
370 // UseSSE=1 ==> Floats only ==> 9999+1
371 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
372 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
373 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
374 uint freg_arg0 = 9999+fargs;
375 uint freg_arg1 = 9999+fargs;
377 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
378 int i;
379 for( i = 0; i < total_args_passed; i++) {
380 if( sig_bt[i] == T_DOUBLE ) {
381 // first 2 doubles go in registers
382 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
383 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
384 else // Else double is passed low on the stack to be aligned.
385 stack += 2;
386 } else if( sig_bt[i] == T_LONG ) {
387 stack += 2;
388 }
389 }
390 int dstack = 0; // Separate counter for placing doubles
392 // Now pick where all else goes.
393 for( i = 0; i < total_args_passed; i++) {
394 // From the type and the argument number (count) compute the location
395 switch( sig_bt[i] ) {
396 case T_SHORT:
397 case T_CHAR:
398 case T_BYTE:
399 case T_BOOLEAN:
400 case T_INT:
401 case T_ARRAY:
402 case T_OBJECT:
403 case T_ADDRESS:
404 if( reg_arg0 == 9999 ) {
405 reg_arg0 = i;
406 regs[i].set1(rcx->as_VMReg());
407 } else if( reg_arg1 == 9999 ) {
408 reg_arg1 = i;
409 regs[i].set1(rdx->as_VMReg());
410 } else {
411 regs[i].set1(VMRegImpl::stack2reg(stack++));
412 }
413 break;
414 case T_FLOAT:
415 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
416 freg_arg0 = i;
417 regs[i].set1(xmm0->as_VMReg());
418 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
419 freg_arg1 = i;
420 regs[i].set1(xmm1->as_VMReg());
421 } else {
422 regs[i].set1(VMRegImpl::stack2reg(stack++));
423 }
424 break;
425 case T_LONG:
426 assert(sig_bt[i+1] == T_VOID, "missing Half" );
427 regs[i].set2(VMRegImpl::stack2reg(dstack));
428 dstack += 2;
429 break;
430 case T_DOUBLE:
431 assert(sig_bt[i+1] == T_VOID, "missing Half" );
432 if( freg_arg0 == (uint)i ) {
433 regs[i].set2(xmm0->as_VMReg());
434 } else if( freg_arg1 == (uint)i ) {
435 regs[i].set2(xmm1->as_VMReg());
436 } else {
437 regs[i].set2(VMRegImpl::stack2reg(dstack));
438 dstack += 2;
439 }
440 break;
441 case T_VOID: regs[i].set_bad(); break;
442 break;
443 default:
444 ShouldNotReachHere();
445 break;
446 }
447 }
449 // return value can be odd number of VMRegImpl stack slots make multiple of 2
450 return round_to(stack, 2);
451 }
453 // Patch the callers callsite with entry to compiled code if it exists.
454 static void patch_callers_callsite(MacroAssembler *masm) {
455 Label L;
456 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
457 __ jcc(Assembler::equal, L);
458 // Schedule the branch target address early.
459 // Call into the VM to patch the caller, then jump to compiled callee
460 // rax, isn't live so capture return address while we easily can
461 __ movptr(rax, Address(rsp, 0));
462 __ pusha();
463 __ pushf();
465 if (UseSSE == 1) {
466 __ subptr(rsp, 2*wordSize);
467 __ movflt(Address(rsp, 0), xmm0);
468 __ movflt(Address(rsp, wordSize), xmm1);
469 }
470 if (UseSSE >= 2) {
471 __ subptr(rsp, 4*wordSize);
472 __ movdbl(Address(rsp, 0), xmm0);
473 __ movdbl(Address(rsp, 2*wordSize), xmm1);
474 }
475 #ifdef COMPILER2
476 // C2 may leave the stack dirty if not in SSE2+ mode
477 if (UseSSE >= 2) {
478 __ verify_FPU(0, "c2i transition should have clean FPU stack");
479 } else {
480 __ empty_FPU_stack();
481 }
482 #endif /* COMPILER2 */
484 // VM needs caller's callsite
485 __ push(rax);
486 // VM needs target method
487 __ push(rbx);
488 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
489 __ addptr(rsp, 2*wordSize);
491 if (UseSSE == 1) {
492 __ movflt(xmm0, Address(rsp, 0));
493 __ movflt(xmm1, Address(rsp, wordSize));
494 __ addptr(rsp, 2*wordSize);
495 }
496 if (UseSSE >= 2) {
497 __ movdbl(xmm0, Address(rsp, 0));
498 __ movdbl(xmm1, Address(rsp, 2*wordSize));
499 __ addptr(rsp, 4*wordSize);
500 }
502 __ popf();
503 __ popa();
504 __ bind(L);
505 }
508 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
509 int next_off = st_off - Interpreter::stackElementSize;
510 __ movdbl(Address(rsp, next_off), r);
511 }
513 static void gen_c2i_adapter(MacroAssembler *masm,
514 int total_args_passed,
515 int comp_args_on_stack,
516 const BasicType *sig_bt,
517 const VMRegPair *regs,
518 Label& skip_fixup) {
519 // Before we get into the guts of the C2I adapter, see if we should be here
520 // at all. We've come from compiled code and are attempting to jump to the
521 // interpreter, which means the caller made a static call to get here
522 // (vcalls always get a compiled target if there is one). Check for a
523 // compiled target. If there is one, we need to patch the caller's call.
524 patch_callers_callsite(masm);
526 __ bind(skip_fixup);
528 #ifdef COMPILER2
529 // C2 may leave the stack dirty if not in SSE2+ mode
530 if (UseSSE >= 2) {
531 __ verify_FPU(0, "c2i transition should have clean FPU stack");
532 } else {
533 __ empty_FPU_stack();
534 }
535 #endif /* COMPILER2 */
537 // Since all args are passed on the stack, total_args_passed * interpreter_
538 // stack_element_size is the
539 // space we need.
540 int extraspace = total_args_passed * Interpreter::stackElementSize;
542 // Get return address
543 __ pop(rax);
545 // set senderSP value
546 __ movptr(rsi, rsp);
548 __ subptr(rsp, extraspace);
550 // Now write the args into the outgoing interpreter space
551 for (int i = 0; i < total_args_passed; i++) {
552 if (sig_bt[i] == T_VOID) {
553 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
554 continue;
555 }
557 // st_off points to lowest address on stack.
558 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
559 int next_off = st_off - Interpreter::stackElementSize;
561 // Say 4 args:
562 // i st_off
563 // 0 12 T_LONG
564 // 1 8 T_VOID
565 // 2 4 T_OBJECT
566 // 3 0 T_BOOL
567 VMReg r_1 = regs[i].first();
568 VMReg r_2 = regs[i].second();
569 if (!r_1->is_valid()) {
570 assert(!r_2->is_valid(), "");
571 continue;
572 }
574 if (r_1->is_stack()) {
575 // memory to memory use fpu stack top
576 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
578 if (!r_2->is_valid()) {
579 __ movl(rdi, Address(rsp, ld_off));
580 __ movptr(Address(rsp, st_off), rdi);
581 } else {
583 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
584 // st_off == MSW, st_off-wordSize == LSW
586 __ movptr(rdi, Address(rsp, ld_off));
587 __ movptr(Address(rsp, next_off), rdi);
588 #ifndef _LP64
589 __ movptr(rdi, Address(rsp, ld_off + wordSize));
590 __ movptr(Address(rsp, st_off), rdi);
591 #else
592 #ifdef ASSERT
593 // Overwrite the unused slot with known junk
594 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
595 __ movptr(Address(rsp, st_off), rax);
596 #endif /* ASSERT */
597 #endif // _LP64
598 }
599 } else if (r_1->is_Register()) {
600 Register r = r_1->as_Register();
601 if (!r_2->is_valid()) {
602 __ movl(Address(rsp, st_off), r);
603 } else {
604 // long/double in gpr
605 NOT_LP64(ShouldNotReachHere());
606 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
607 // T_DOUBLE and T_LONG use two slots in the interpreter
608 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
609 // long/double in gpr
610 #ifdef ASSERT
611 // Overwrite the unused slot with known junk
612 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
613 __ movptr(Address(rsp, st_off), rax);
614 #endif /* ASSERT */
615 __ movptr(Address(rsp, next_off), r);
616 } else {
617 __ movptr(Address(rsp, st_off), r);
618 }
619 }
620 } else {
621 assert(r_1->is_XMMRegister(), "");
622 if (!r_2->is_valid()) {
623 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
624 } else {
625 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
626 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
627 }
628 }
629 }
631 // Schedule the branch target address early.
632 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
633 // And repush original return address
634 __ push(rax);
635 __ jmp(rcx);
636 }
639 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
640 int next_val_off = ld_off - Interpreter::stackElementSize;
641 __ movdbl(r, Address(saved_sp, next_val_off));
642 }
644 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
645 address code_start, address code_end,
646 Label& L_ok) {
647 Label L_fail;
648 __ lea(temp_reg, ExternalAddress(code_start));
649 __ cmpptr(pc_reg, temp_reg);
650 __ jcc(Assembler::belowEqual, L_fail);
651 __ lea(temp_reg, ExternalAddress(code_end));
652 __ cmpptr(pc_reg, temp_reg);
653 __ jcc(Assembler::below, L_ok);
654 __ bind(L_fail);
655 }
657 static void gen_i2c_adapter(MacroAssembler *masm,
658 int total_args_passed,
659 int comp_args_on_stack,
660 const BasicType *sig_bt,
661 const VMRegPair *regs) {
663 // Note: rsi contains the senderSP on entry. We must preserve it since
664 // we may do a i2c -> c2i transition if we lose a race where compiled
665 // code goes non-entrant while we get args ready.
667 // Adapters can be frameless because they do not require the caller
668 // to perform additional cleanup work, such as correcting the stack pointer.
669 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
670 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
671 // even if a callee has modified the stack pointer.
672 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
673 // routinely repairs its caller's stack pointer (from sender_sp, which is set
674 // up via the senderSP register).
675 // In other words, if *either* the caller or callee is interpreted, we can
676 // get the stack pointer repaired after a call.
677 // This is why c2i and i2c adapters cannot be indefinitely composed.
678 // In particular, if a c2i adapter were to somehow call an i2c adapter,
679 // both caller and callee would be compiled methods, and neither would
680 // clean up the stack pointer changes performed by the two adapters.
681 // If this happens, control eventually transfers back to the compiled
682 // caller, but with an uncorrected stack, causing delayed havoc.
684 // Pick up the return address
685 __ movptr(rax, Address(rsp, 0));
687 if (VerifyAdapterCalls &&
688 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
689 // So, let's test for cascading c2i/i2c adapters right now.
690 // assert(Interpreter::contains($return_addr) ||
691 // StubRoutines::contains($return_addr),
692 // "i2c adapter must return to an interpreter frame");
693 __ block_comment("verify_i2c { ");
694 Label L_ok;
695 if (Interpreter::code() != NULL)
696 range_check(masm, rax, rdi,
697 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
698 L_ok);
699 if (StubRoutines::code1() != NULL)
700 range_check(masm, rax, rdi,
701 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
702 L_ok);
703 if (StubRoutines::code2() != NULL)
704 range_check(masm, rax, rdi,
705 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
706 L_ok);
707 const char* msg = "i2c adapter must return to an interpreter frame";
708 __ block_comment(msg);
709 __ stop(msg);
710 __ bind(L_ok);
711 __ block_comment("} verify_i2ce ");
712 }
714 // Must preserve original SP for loading incoming arguments because
715 // we need to align the outgoing SP for compiled code.
716 __ movptr(rdi, rsp);
718 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
719 // in registers, we will occasionally have no stack args.
720 int comp_words_on_stack = 0;
721 if (comp_args_on_stack) {
722 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
723 // registers are below. By subtracting stack0, we either get a negative
724 // number (all values in registers) or the maximum stack slot accessed.
725 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
726 // Convert 4-byte stack slots to words.
727 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
728 // Round up to miminum stack alignment, in wordSize
729 comp_words_on_stack = round_to(comp_words_on_stack, 2);
730 __ subptr(rsp, comp_words_on_stack * wordSize);
731 }
733 // Align the outgoing SP
734 __ andptr(rsp, -(StackAlignmentInBytes));
736 // push the return address on the stack (note that pushing, rather
737 // than storing it, yields the correct frame alignment for the callee)
738 __ push(rax);
740 // Put saved SP in another register
741 const Register saved_sp = rax;
742 __ movptr(saved_sp, rdi);
745 // Will jump to the compiled code just as if compiled code was doing it.
746 // Pre-load the register-jump target early, to schedule it better.
747 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
749 // Now generate the shuffle code. Pick up all register args and move the
750 // rest through the floating point stack top.
751 for (int i = 0; i < total_args_passed; i++) {
752 if (sig_bt[i] == T_VOID) {
753 // Longs and doubles are passed in native word order, but misaligned
754 // in the 32-bit build.
755 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
756 continue;
757 }
759 // Pick up 0, 1 or 2 words from SP+offset.
761 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
762 "scrambled load targets?");
763 // Load in argument order going down.
764 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
765 // Point to interpreter value (vs. tag)
766 int next_off = ld_off - Interpreter::stackElementSize;
767 //
768 //
769 //
770 VMReg r_1 = regs[i].first();
771 VMReg r_2 = regs[i].second();
772 if (!r_1->is_valid()) {
773 assert(!r_2->is_valid(), "");
774 continue;
775 }
776 if (r_1->is_stack()) {
777 // Convert stack slot to an SP offset (+ wordSize to account for return address )
778 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
780 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
781 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
782 // we be generated.
783 if (!r_2->is_valid()) {
784 // __ fld_s(Address(saved_sp, ld_off));
785 // __ fstp_s(Address(rsp, st_off));
786 __ movl(rsi, Address(saved_sp, ld_off));
787 __ movptr(Address(rsp, st_off), rsi);
788 } else {
789 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
790 // are accessed as negative so LSW is at LOW address
792 // ld_off is MSW so get LSW
793 // st_off is LSW (i.e. reg.first())
794 // __ fld_d(Address(saved_sp, next_off));
795 // __ fstp_d(Address(rsp, st_off));
796 //
797 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
798 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
799 // So we must adjust where to pick up the data to match the interpreter.
800 //
801 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
802 // are accessed as negative so LSW is at LOW address
804 // ld_off is MSW so get LSW
805 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
806 next_off : ld_off;
807 __ movptr(rsi, Address(saved_sp, offset));
808 __ movptr(Address(rsp, st_off), rsi);
809 #ifndef _LP64
810 __ movptr(rsi, Address(saved_sp, ld_off));
811 __ movptr(Address(rsp, st_off + wordSize), rsi);
812 #endif // _LP64
813 }
814 } else if (r_1->is_Register()) { // Register argument
815 Register r = r_1->as_Register();
816 assert(r != rax, "must be different");
817 if (r_2->is_valid()) {
818 //
819 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
820 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
821 // So we must adjust where to pick up the data to match the interpreter.
823 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
824 next_off : ld_off;
826 // this can be a misaligned move
827 __ movptr(r, Address(saved_sp, offset));
828 #ifndef _LP64
829 assert(r_2->as_Register() != rax, "need another temporary register");
830 // Remember r_1 is low address (and LSB on x86)
831 // So r_2 gets loaded from high address regardless of the platform
832 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
833 #endif // _LP64
834 } else {
835 __ movl(r, Address(saved_sp, ld_off));
836 }
837 } else {
838 assert(r_1->is_XMMRegister(), "");
839 if (!r_2->is_valid()) {
840 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
841 } else {
842 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
843 }
844 }
845 }
847 // 6243940 We might end up in handle_wrong_method if
848 // the callee is deoptimized as we race thru here. If that
849 // happens we don't want to take a safepoint because the
850 // caller frame will look interpreted and arguments are now
851 // "compiled" so it is much better to make this transition
852 // invisible to the stack walking code. Unfortunately if
853 // we try and find the callee by normal means a safepoint
854 // is possible. So we stash the desired callee in the thread
855 // and the vm will find there should this case occur.
857 __ get_thread(rax);
858 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
860 // move Method* to rax, in case we end up in an c2i adapter.
861 // the c2i adapters expect Method* in rax, (c2) because c2's
862 // resolve stubs return the result (the method) in rax,.
863 // I'd love to fix this.
864 __ mov(rax, rbx);
866 __ jmp(rdi);
867 }
869 // ---------------------------------------------------------------
870 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
871 int total_args_passed,
872 int comp_args_on_stack,
873 const BasicType *sig_bt,
874 const VMRegPair *regs,
875 AdapterFingerPrint* fingerprint) {
876 address i2c_entry = __ pc();
878 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
880 // -------------------------------------------------------------------------
881 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
882 // to the interpreter. The args start out packed in the compiled layout. They
883 // need to be unpacked into the interpreter layout. This will almost always
884 // require some stack space. We grow the current (compiled) stack, then repack
885 // the args. We finally end in a jump to the generic interpreter entry point.
886 // On exit from the interpreter, the interpreter will restore our SP (lest the
887 // compiled code, which relys solely on SP and not EBP, get sick).
889 address c2i_unverified_entry = __ pc();
890 Label skip_fixup;
892 Register holder = rax;
893 Register receiver = rcx;
894 Register temp = rbx;
896 {
898 Label missed;
899 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
900 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
901 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
902 __ jcc(Assembler::notEqual, missed);
903 // Method might have been compiled since the call site was patched to
904 // interpreted if that is the case treat it as a miss so we can get
905 // the call site corrected.
906 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
907 __ jcc(Assembler::equal, skip_fixup);
909 __ bind(missed);
910 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
911 }
913 address c2i_entry = __ pc();
915 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
917 __ flush();
918 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
919 }
921 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
922 VMRegPair *regs,
923 int total_args_passed) {
924 // We return the amount of VMRegImpl stack slots we need to reserve for all
925 // the arguments NOT counting out_preserve_stack_slots.
927 uint stack = 0; // All arguments on stack
929 for( int i = 0; i < total_args_passed; i++) {
930 // From the type and the argument number (count) compute the location
931 switch( sig_bt[i] ) {
932 case T_BOOLEAN:
933 case T_CHAR:
934 case T_FLOAT:
935 case T_BYTE:
936 case T_SHORT:
937 case T_INT:
938 case T_OBJECT:
939 case T_ARRAY:
940 case T_ADDRESS:
941 case T_METADATA:
942 regs[i].set1(VMRegImpl::stack2reg(stack++));
943 break;
944 case T_LONG:
945 case T_DOUBLE: // The stack numbering is reversed from Java
946 // Since C arguments do not get reversed, the ordering for
947 // doubles on the stack must be opposite the Java convention
948 assert(sig_bt[i+1] == T_VOID, "missing Half" );
949 regs[i].set2(VMRegImpl::stack2reg(stack));
950 stack += 2;
951 break;
952 case T_VOID: regs[i].set_bad(); break;
953 default:
954 ShouldNotReachHere();
955 break;
956 }
957 }
958 return stack;
959 }
961 // A simple move of integer like type
962 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
963 if (src.first()->is_stack()) {
964 if (dst.first()->is_stack()) {
965 // stack to stack
966 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
967 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
968 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
969 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
970 } else {
971 // stack to reg
972 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
973 }
974 } else if (dst.first()->is_stack()) {
975 // reg to stack
976 // no need to sign extend on 64bit
977 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
978 } else {
979 if (dst.first() != src.first()) {
980 __ mov(dst.first()->as_Register(), src.first()->as_Register());
981 }
982 }
983 }
985 // An oop arg. Must pass a handle not the oop itself
986 static void object_move(MacroAssembler* masm,
987 OopMap* map,
988 int oop_handle_offset,
989 int framesize_in_slots,
990 VMRegPair src,
991 VMRegPair dst,
992 bool is_receiver,
993 int* receiver_offset) {
995 // Because of the calling conventions we know that src can be a
996 // register or a stack location. dst can only be a stack location.
998 assert(dst.first()->is_stack(), "must be stack");
999 // must pass a handle. First figure out the location we use as a handle
1001 if (src.first()->is_stack()) {
1002 // Oop is already on the stack as an argument
1003 Register rHandle = rax;
1004 Label nil;
1005 __ xorptr(rHandle, rHandle);
1006 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1007 __ jcc(Assembler::equal, nil);
1008 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1009 __ bind(nil);
1010 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1012 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1013 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1014 if (is_receiver) {
1015 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1016 }
1017 } else {
1018 // Oop is in an a register we must store it to the space we reserve
1019 // on the stack for oop_handles
1020 const Register rOop = src.first()->as_Register();
1021 const Register rHandle = rax;
1022 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1023 int offset = oop_slot*VMRegImpl::stack_slot_size;
1024 Label skip;
1025 __ movptr(Address(rsp, offset), rOop);
1026 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1027 __ xorptr(rHandle, rHandle);
1028 __ cmpptr(rOop, (int32_t)NULL_WORD);
1029 __ jcc(Assembler::equal, skip);
1030 __ lea(rHandle, Address(rsp, offset));
1031 __ bind(skip);
1032 // Store the handle parameter
1033 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1034 if (is_receiver) {
1035 *receiver_offset = offset;
1036 }
1037 }
1038 }
1040 // A float arg may have to do float reg int reg conversion
1041 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1042 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1044 // Because of the calling convention we know that src is either a stack location
1045 // or an xmm register. dst can only be a stack location.
1047 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1049 if (src.first()->is_stack()) {
1050 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1051 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1052 } else {
1053 // reg to stack
1054 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1055 }
1056 }
1058 // A long move
1059 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1061 // The only legal possibility for a long_move VMRegPair is:
1062 // 1: two stack slots (possibly unaligned)
1063 // as neither the java or C calling convention will use registers
1064 // for longs.
1066 if (src.first()->is_stack() && dst.first()->is_stack()) {
1067 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1068 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1069 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1070 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1071 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1072 } else {
1073 ShouldNotReachHere();
1074 }
1075 }
1077 // A double move
1078 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1080 // The only legal possibilities for a double_move VMRegPair are:
1081 // The painful thing here is that like long_move a VMRegPair might be
1083 // Because of the calling convention we know that src is either
1084 // 1: a single physical register (xmm registers only)
1085 // 2: two stack slots (possibly unaligned)
1086 // dst can only be a pair of stack slots.
1088 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1090 if (src.first()->is_stack()) {
1091 // source is all stack
1092 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1093 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1094 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1095 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1096 } else {
1097 // reg to stack
1098 // No worries about stack alignment
1099 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1100 }
1101 }
1104 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1105 // We always ignore the frame_slots arg and just use the space just below frame pointer
1106 // which by this time is free to use
1107 switch (ret_type) {
1108 case T_FLOAT:
1109 __ fstp_s(Address(rbp, -wordSize));
1110 break;
1111 case T_DOUBLE:
1112 __ fstp_d(Address(rbp, -2*wordSize));
1113 break;
1114 case T_VOID: break;
1115 case T_LONG:
1116 __ movptr(Address(rbp, -wordSize), rax);
1117 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1118 break;
1119 default: {
1120 __ movptr(Address(rbp, -wordSize), rax);
1121 }
1122 }
1123 }
1125 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1126 // We always ignore the frame_slots arg and just use the space just below frame pointer
1127 // which by this time is free to use
1128 switch (ret_type) {
1129 case T_FLOAT:
1130 __ fld_s(Address(rbp, -wordSize));
1131 break;
1132 case T_DOUBLE:
1133 __ fld_d(Address(rbp, -2*wordSize));
1134 break;
1135 case T_LONG:
1136 __ movptr(rax, Address(rbp, -wordSize));
1137 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1138 break;
1139 case T_VOID: break;
1140 default: {
1141 __ movptr(rax, Address(rbp, -wordSize));
1142 }
1143 }
1144 }
1147 static void save_or_restore_arguments(MacroAssembler* masm,
1148 const int stack_slots,
1149 const int total_in_args,
1150 const int arg_save_area,
1151 OopMap* map,
1152 VMRegPair* in_regs,
1153 BasicType* in_sig_bt) {
1154 // if map is non-NULL then the code should store the values,
1155 // otherwise it should load them.
1156 int handle_index = 0;
1157 // Save down double word first
1158 for ( int i = 0; i < total_in_args; i++) {
1159 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1160 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1161 int offset = slot * VMRegImpl::stack_slot_size;
1162 handle_index += 2;
1163 assert(handle_index <= stack_slots, "overflow");
1164 if (map != NULL) {
1165 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1166 } else {
1167 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1168 }
1169 }
1170 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1171 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1172 int offset = slot * VMRegImpl::stack_slot_size;
1173 handle_index += 2;
1174 assert(handle_index <= stack_slots, "overflow");
1175 if (map != NULL) {
1176 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1177 if (in_regs[i].second()->is_Register()) {
1178 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1179 }
1180 } else {
1181 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1182 if (in_regs[i].second()->is_Register()) {
1183 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1184 }
1185 }
1186 }
1187 }
1188 // Save or restore single word registers
1189 for ( int i = 0; i < total_in_args; i++) {
1190 if (in_regs[i].first()->is_Register()) {
1191 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1192 int offset = slot * VMRegImpl::stack_slot_size;
1193 assert(handle_index <= stack_slots, "overflow");
1194 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1195 map->set_oop(VMRegImpl::stack2reg(slot));;
1196 }
1198 // Value is in an input register pass we must flush it to the stack
1199 const Register reg = in_regs[i].first()->as_Register();
1200 switch (in_sig_bt[i]) {
1201 case T_ARRAY:
1202 if (map != NULL) {
1203 __ movptr(Address(rsp, offset), reg);
1204 } else {
1205 __ movptr(reg, Address(rsp, offset));
1206 }
1207 break;
1208 case T_BOOLEAN:
1209 case T_CHAR:
1210 case T_BYTE:
1211 case T_SHORT:
1212 case T_INT:
1213 if (map != NULL) {
1214 __ movl(Address(rsp, offset), reg);
1215 } else {
1216 __ movl(reg, Address(rsp, offset));
1217 }
1218 break;
1219 case T_OBJECT:
1220 default: ShouldNotReachHere();
1221 }
1222 } else if (in_regs[i].first()->is_XMMRegister()) {
1223 if (in_sig_bt[i] == T_FLOAT) {
1224 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1225 int offset = slot * VMRegImpl::stack_slot_size;
1226 assert(handle_index <= stack_slots, "overflow");
1227 if (map != NULL) {
1228 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1229 } else {
1230 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1231 }
1232 }
1233 } else if (in_regs[i].first()->is_stack()) {
1234 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1235 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1236 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1237 }
1238 }
1239 }
1240 }
1242 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1243 // keeps a new JNI critical region from starting until a GC has been
1244 // forced. Save down any oops in registers and describe them in an
1245 // OopMap.
1246 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1247 Register thread,
1248 int stack_slots,
1249 int total_c_args,
1250 int total_in_args,
1251 int arg_save_area,
1252 OopMapSet* oop_maps,
1253 VMRegPair* in_regs,
1254 BasicType* in_sig_bt) {
1255 __ block_comment("check GC_locker::needs_gc");
1256 Label cont;
1257 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1258 __ jcc(Assembler::equal, cont);
1260 // Save down any incoming oops and call into the runtime to halt for a GC
1262 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1264 save_or_restore_arguments(masm, stack_slots, total_in_args,
1265 arg_save_area, map, in_regs, in_sig_bt);
1267 address the_pc = __ pc();
1268 oop_maps->add_gc_map( __ offset(), map);
1269 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1271 __ block_comment("block_for_jni_critical");
1272 __ push(thread);
1273 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1274 __ increment(rsp, wordSize);
1276 __ get_thread(thread);
1277 __ reset_last_Java_frame(thread, false, true);
1279 save_or_restore_arguments(masm, stack_slots, total_in_args,
1280 arg_save_area, NULL, in_regs, in_sig_bt);
1282 __ bind(cont);
1283 #ifdef ASSERT
1284 if (StressCriticalJNINatives) {
1285 // Stress register saving
1286 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1287 save_or_restore_arguments(masm, stack_slots, total_in_args,
1288 arg_save_area, map, in_regs, in_sig_bt);
1289 // Destroy argument registers
1290 for (int i = 0; i < total_in_args - 1; i++) {
1291 if (in_regs[i].first()->is_Register()) {
1292 const Register reg = in_regs[i].first()->as_Register();
1293 __ xorptr(reg, reg);
1294 } else if (in_regs[i].first()->is_XMMRegister()) {
1295 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1296 } else if (in_regs[i].first()->is_FloatRegister()) {
1297 ShouldNotReachHere();
1298 } else if (in_regs[i].first()->is_stack()) {
1299 // Nothing to do
1300 } else {
1301 ShouldNotReachHere();
1302 }
1303 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1304 i++;
1305 }
1306 }
1308 save_or_restore_arguments(masm, stack_slots, total_in_args,
1309 arg_save_area, NULL, in_regs, in_sig_bt);
1310 }
1311 #endif
1312 }
1314 // Unpack an array argument into a pointer to the body and the length
1315 // if the array is non-null, otherwise pass 0 for both.
1316 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1317 Register tmp_reg = rax;
1318 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1319 "possible collision");
1320 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1321 "possible collision");
1323 // Pass the length, ptr pair
1324 Label is_null, done;
1325 VMRegPair tmp(tmp_reg->as_VMReg());
1326 if (reg.first()->is_stack()) {
1327 // Load the arg up from the stack
1328 simple_move32(masm, reg, tmp);
1329 reg = tmp;
1330 }
1331 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1332 __ jccb(Assembler::equal, is_null);
1333 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1334 simple_move32(masm, tmp, body_arg);
1335 // load the length relative to the body.
1336 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1337 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1338 simple_move32(masm, tmp, length_arg);
1339 __ jmpb(done);
1340 __ bind(is_null);
1341 // Pass zeros
1342 __ xorptr(tmp_reg, tmp_reg);
1343 simple_move32(masm, tmp, body_arg);
1344 simple_move32(masm, tmp, length_arg);
1345 __ bind(done);
1346 }
1348 static void verify_oop_args(MacroAssembler* masm,
1349 methodHandle method,
1350 const BasicType* sig_bt,
1351 const VMRegPair* regs) {
1352 Register temp_reg = rbx; // not part of any compiled calling seq
1353 if (VerifyOops) {
1354 for (int i = 0; i < method->size_of_parameters(); i++) {
1355 if (sig_bt[i] == T_OBJECT ||
1356 sig_bt[i] == T_ARRAY) {
1357 VMReg r = regs[i].first();
1358 assert(r->is_valid(), "bad oop arg");
1359 if (r->is_stack()) {
1360 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1361 __ verify_oop(temp_reg);
1362 } else {
1363 __ verify_oop(r->as_Register());
1364 }
1365 }
1366 }
1367 }
1368 }
1370 static void gen_special_dispatch(MacroAssembler* masm,
1371 methodHandle method,
1372 const BasicType* sig_bt,
1373 const VMRegPair* regs) {
1374 verify_oop_args(masm, method, sig_bt, regs);
1375 vmIntrinsics::ID iid = method->intrinsic_id();
1377 // Now write the args into the outgoing interpreter space
1378 bool has_receiver = false;
1379 Register receiver_reg = noreg;
1380 int member_arg_pos = -1;
1381 Register member_reg = noreg;
1382 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1383 if (ref_kind != 0) {
1384 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1385 member_reg = rbx; // known to be free at this point
1386 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1387 } else if (iid == vmIntrinsics::_invokeBasic) {
1388 has_receiver = true;
1389 } else {
1390 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1391 }
1393 if (member_reg != noreg) {
1394 // Load the member_arg into register, if necessary.
1395 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1396 VMReg r = regs[member_arg_pos].first();
1397 if (r->is_stack()) {
1398 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1399 } else {
1400 // no data motion is needed
1401 member_reg = r->as_Register();
1402 }
1403 }
1405 if (has_receiver) {
1406 // Make sure the receiver is loaded into a register.
1407 assert(method->size_of_parameters() > 0, "oob");
1408 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1409 VMReg r = regs[0].first();
1410 assert(r->is_valid(), "bad receiver arg");
1411 if (r->is_stack()) {
1412 // Porting note: This assumes that compiled calling conventions always
1413 // pass the receiver oop in a register. If this is not true on some
1414 // platform, pick a temp and load the receiver from stack.
1415 fatal("receiver always in a register");
1416 receiver_reg = rcx; // known to be free at this point
1417 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1418 } else {
1419 // no data motion is needed
1420 receiver_reg = r->as_Register();
1421 }
1422 }
1424 // Figure out which address we are really jumping to:
1425 MethodHandles::generate_method_handle_dispatch(masm, iid,
1426 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1427 }
1429 // ---------------------------------------------------------------------------
1430 // Generate a native wrapper for a given method. The method takes arguments
1431 // in the Java compiled code convention, marshals them to the native
1432 // convention (handlizes oops, etc), transitions to native, makes the call,
1433 // returns to java state (possibly blocking), unhandlizes any result and
1434 // returns.
1435 //
1436 // Critical native functions are a shorthand for the use of
1437 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1438 // functions. The wrapper is expected to unpack the arguments before
1439 // passing them to the callee and perform checks before and after the
1440 // native call to ensure that they GC_locker
1441 // lock_critical/unlock_critical semantics are followed. Some other
1442 // parts of JNI setup are skipped like the tear down of the JNI handle
1443 // block and the check for pending exceptions it's impossible for them
1444 // to be thrown.
1445 //
1446 // They are roughly structured like this:
1447 // if (GC_locker::needs_gc())
1448 // SharedRuntime::block_for_jni_critical();
1449 // tranistion to thread_in_native
1450 // unpack arrray arguments and call native entry point
1451 // check for safepoint in progress
1452 // check if any thread suspend flags are set
1453 // call into JVM and possible unlock the JNI critical
1454 // if a GC was suppressed while in the critical native.
1455 // transition back to thread_in_Java
1456 // return to caller
1457 //
1458 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1459 methodHandle method,
1460 int compile_id,
1461 BasicType* in_sig_bt,
1462 VMRegPair* in_regs,
1463 BasicType ret_type) {
1464 if (method->is_method_handle_intrinsic()) {
1465 vmIntrinsics::ID iid = method->intrinsic_id();
1466 intptr_t start = (intptr_t)__ pc();
1467 int vep_offset = ((intptr_t)__ pc()) - start;
1468 gen_special_dispatch(masm,
1469 method,
1470 in_sig_bt,
1471 in_regs);
1472 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1473 __ flush();
1474 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1475 return nmethod::new_native_nmethod(method,
1476 compile_id,
1477 masm->code(),
1478 vep_offset,
1479 frame_complete,
1480 stack_slots / VMRegImpl::slots_per_word,
1481 in_ByteSize(-1),
1482 in_ByteSize(-1),
1483 (OopMapSet*)NULL);
1484 }
1485 bool is_critical_native = true;
1486 address native_func = method->critical_native_function();
1487 if (native_func == NULL) {
1488 native_func = method->native_function();
1489 is_critical_native = false;
1490 }
1491 assert(native_func != NULL, "must have function");
1493 // An OopMap for lock (and class if static)
1494 OopMapSet *oop_maps = new OopMapSet();
1496 // We have received a description of where all the java arg are located
1497 // on entry to the wrapper. We need to convert these args to where
1498 // the jni function will expect them. To figure out where they go
1499 // we convert the java signature to a C signature by inserting
1500 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1502 const int total_in_args = method->size_of_parameters();
1503 int total_c_args = total_in_args;
1504 if (!is_critical_native) {
1505 total_c_args += 1;
1506 if (method->is_static()) {
1507 total_c_args++;
1508 }
1509 } else {
1510 for (int i = 0; i < total_in_args; i++) {
1511 if (in_sig_bt[i] == T_ARRAY) {
1512 total_c_args++;
1513 }
1514 }
1515 }
1517 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1518 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1519 BasicType* in_elem_bt = NULL;
1521 int argc = 0;
1522 if (!is_critical_native) {
1523 out_sig_bt[argc++] = T_ADDRESS;
1524 if (method->is_static()) {
1525 out_sig_bt[argc++] = T_OBJECT;
1526 }
1528 for (int i = 0; i < total_in_args ; i++ ) {
1529 out_sig_bt[argc++] = in_sig_bt[i];
1530 }
1531 } else {
1532 Thread* THREAD = Thread::current();
1533 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1534 SignatureStream ss(method->signature());
1535 for (int i = 0; i < total_in_args ; i++ ) {
1536 if (in_sig_bt[i] == T_ARRAY) {
1537 // Arrays are passed as int, elem* pair
1538 out_sig_bt[argc++] = T_INT;
1539 out_sig_bt[argc++] = T_ADDRESS;
1540 Symbol* atype = ss.as_symbol(CHECK_NULL);
1541 const char* at = atype->as_C_string();
1542 if (strlen(at) == 2) {
1543 assert(at[0] == '[', "must be");
1544 switch (at[1]) {
1545 case 'B': in_elem_bt[i] = T_BYTE; break;
1546 case 'C': in_elem_bt[i] = T_CHAR; break;
1547 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1548 case 'F': in_elem_bt[i] = T_FLOAT; break;
1549 case 'I': in_elem_bt[i] = T_INT; break;
1550 case 'J': in_elem_bt[i] = T_LONG; break;
1551 case 'S': in_elem_bt[i] = T_SHORT; break;
1552 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1553 default: ShouldNotReachHere();
1554 }
1555 }
1556 } else {
1557 out_sig_bt[argc++] = in_sig_bt[i];
1558 in_elem_bt[i] = T_VOID;
1559 }
1560 if (in_sig_bt[i] != T_VOID) {
1561 assert(in_sig_bt[i] == ss.type(), "must match");
1562 ss.next();
1563 }
1564 }
1565 }
1567 // Now figure out where the args must be stored and how much stack space
1568 // they require.
1569 int out_arg_slots;
1570 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1572 // Compute framesize for the wrapper. We need to handlize all oops in
1573 // registers a max of 2 on x86.
1575 // Calculate the total number of stack slots we will need.
1577 // First count the abi requirement plus all of the outgoing args
1578 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1580 // Now the space for the inbound oop handle area
1581 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1582 if (is_critical_native) {
1583 // Critical natives may have to call out so they need a save area
1584 // for register arguments.
1585 int double_slots = 0;
1586 int single_slots = 0;
1587 for ( int i = 0; i < total_in_args; i++) {
1588 if (in_regs[i].first()->is_Register()) {
1589 const Register reg = in_regs[i].first()->as_Register();
1590 switch (in_sig_bt[i]) {
1591 case T_ARRAY: // critical array (uses 2 slots on LP64)
1592 case T_BOOLEAN:
1593 case T_BYTE:
1594 case T_SHORT:
1595 case T_CHAR:
1596 case T_INT: single_slots++; break;
1597 case T_LONG: double_slots++; break;
1598 default: ShouldNotReachHere();
1599 }
1600 } else if (in_regs[i].first()->is_XMMRegister()) {
1601 switch (in_sig_bt[i]) {
1602 case T_FLOAT: single_slots++; break;
1603 case T_DOUBLE: double_slots++; break;
1604 default: ShouldNotReachHere();
1605 }
1606 } else if (in_regs[i].first()->is_FloatRegister()) {
1607 ShouldNotReachHere();
1608 }
1609 }
1610 total_save_slots = double_slots * 2 + single_slots;
1611 // align the save area
1612 if (double_slots != 0) {
1613 stack_slots = round_to(stack_slots, 2);
1614 }
1615 }
1617 int oop_handle_offset = stack_slots;
1618 stack_slots += total_save_slots;
1620 // Now any space we need for handlizing a klass if static method
1622 int klass_slot_offset = 0;
1623 int klass_offset = -1;
1624 int lock_slot_offset = 0;
1625 bool is_static = false;
1627 if (method->is_static()) {
1628 klass_slot_offset = stack_slots;
1629 stack_slots += VMRegImpl::slots_per_word;
1630 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1631 is_static = true;
1632 }
1634 // Plus a lock if needed
1636 if (method->is_synchronized()) {
1637 lock_slot_offset = stack_slots;
1638 stack_slots += VMRegImpl::slots_per_word;
1639 }
1641 // Now a place (+2) to save return values or temp during shuffling
1642 // + 2 for return address (which we own) and saved rbp,
1643 stack_slots += 4;
1645 // Ok The space we have allocated will look like:
1646 //
1647 //
1648 // FP-> | |
1649 // |---------------------|
1650 // | 2 slots for moves |
1651 // |---------------------|
1652 // | lock box (if sync) |
1653 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1654 // | klass (if static) |
1655 // |---------------------| <- klass_slot_offset
1656 // | oopHandle area |
1657 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1658 // | outbound memory |
1659 // | based arguments |
1660 // | |
1661 // |---------------------|
1662 // | |
1663 // SP-> | out_preserved_slots |
1664 //
1665 //
1666 // ****************************************************************************
1667 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1668 // arguments off of the stack after the jni call. Before the call we can use
1669 // instructions that are SP relative. After the jni call we switch to FP
1670 // relative instructions instead of re-adjusting the stack on windows.
1671 // ****************************************************************************
1674 // Now compute actual number of stack words we need rounding to make
1675 // stack properly aligned.
1676 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1678 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1680 intptr_t start = (intptr_t)__ pc();
1682 // First thing make an ic check to see if we should even be here
1684 // We are free to use all registers as temps without saving them and
1685 // restoring them except rbp. rbp is the only callee save register
1686 // as far as the interpreter and the compiler(s) are concerned.
1689 const Register ic_reg = rax;
1690 const Register receiver = rcx;
1691 Label hit;
1692 Label exception_pending;
1694 __ verify_oop(receiver);
1695 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1696 __ jcc(Assembler::equal, hit);
1698 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1700 // verified entry must be aligned for code patching.
1701 // and the first 5 bytes must be in the same cache line
1702 // if we align at 8 then we will be sure 5 bytes are in the same line
1703 __ align(8);
1705 __ bind(hit);
1707 int vep_offset = ((intptr_t)__ pc()) - start;
1709 #ifdef COMPILER1
1710 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1711 // Object.hashCode can pull the hashCode from the header word
1712 // instead of doing a full VM transition once it's been computed.
1713 // Since hashCode is usually polymorphic at call sites we can't do
1714 // this optimization at the call site without a lot of work.
1715 Label slowCase;
1716 Register receiver = rcx;
1717 Register result = rax;
1718 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1720 // check if locked
1721 __ testptr(result, markOopDesc::unlocked_value);
1722 __ jcc (Assembler::zero, slowCase);
1724 if (UseBiasedLocking) {
1725 // Check if biased and fall through to runtime if so
1726 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1727 __ jcc (Assembler::notZero, slowCase);
1728 }
1730 // get hash
1731 __ andptr(result, markOopDesc::hash_mask_in_place);
1732 // test if hashCode exists
1733 __ jcc (Assembler::zero, slowCase);
1734 __ shrptr(result, markOopDesc::hash_shift);
1735 __ ret(0);
1736 __ bind (slowCase);
1737 }
1738 #endif // COMPILER1
1740 // The instruction at the verified entry point must be 5 bytes or longer
1741 // because it can be patched on the fly by make_non_entrant. The stack bang
1742 // instruction fits that requirement.
1744 // Generate stack overflow check
1746 if (UseStackBanging) {
1747 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1748 } else {
1749 // need a 5 byte instruction to allow MT safe patching to non-entrant
1750 __ fat_nop();
1751 }
1753 // Generate a new frame for the wrapper.
1754 __ enter();
1755 // -2 because return address is already present and so is saved rbp
1756 __ subptr(rsp, stack_size - 2*wordSize);
1758 // Frame is now completed as far as size and linkage.
1759 int frame_complete = ((intptr_t)__ pc()) - start;
1761 // Calculate the difference between rsp and rbp,. We need to know it
1762 // after the native call because on windows Java Natives will pop
1763 // the arguments and it is painful to do rsp relative addressing
1764 // in a platform independent way. So after the call we switch to
1765 // rbp, relative addressing.
1767 int fp_adjustment = stack_size - 2*wordSize;
1769 #ifdef COMPILER2
1770 // C2 may leave the stack dirty if not in SSE2+ mode
1771 if (UseSSE >= 2) {
1772 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1773 } else {
1774 __ empty_FPU_stack();
1775 }
1776 #endif /* COMPILER2 */
1778 // Compute the rbp, offset for any slots used after the jni call
1780 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1782 // We use rdi as a thread pointer because it is callee save and
1783 // if we load it once it is usable thru the entire wrapper
1784 const Register thread = rdi;
1786 // We use rsi as the oop handle for the receiver/klass
1787 // It is callee save so it survives the call to native
1789 const Register oop_handle_reg = rsi;
1791 __ get_thread(thread);
1793 if (is_critical_native) {
1794 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1795 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1796 }
1798 //
1799 // We immediately shuffle the arguments so that any vm call we have to
1800 // make from here on out (sync slow path, jvmti, etc.) we will have
1801 // captured the oops from our caller and have a valid oopMap for
1802 // them.
1804 // -----------------
1805 // The Grand Shuffle
1806 //
1807 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1808 // and, if static, the class mirror instead of a receiver. This pretty much
1809 // guarantees that register layout will not match (and x86 doesn't use reg
1810 // parms though amd does). Since the native abi doesn't use register args
1811 // and the java conventions does we don't have to worry about collisions.
1812 // All of our moved are reg->stack or stack->stack.
1813 // We ignore the extra arguments during the shuffle and handle them at the
1814 // last moment. The shuffle is described by the two calling convention
1815 // vectors we have in our possession. We simply walk the java vector to
1816 // get the source locations and the c vector to get the destinations.
1818 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1820 // Record rsp-based slot for receiver on stack for non-static methods
1821 int receiver_offset = -1;
1823 // This is a trick. We double the stack slots so we can claim
1824 // the oops in the caller's frame. Since we are sure to have
1825 // more args than the caller doubling is enough to make
1826 // sure we can capture all the incoming oop args from the
1827 // caller.
1828 //
1829 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1831 // Mark location of rbp,
1832 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1834 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1835 // Are free to temporaries if we have to do stack to steck moves.
1836 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1838 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1839 switch (in_sig_bt[i]) {
1840 case T_ARRAY:
1841 if (is_critical_native) {
1842 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1843 c_arg++;
1844 break;
1845 }
1846 case T_OBJECT:
1847 assert(!is_critical_native, "no oop arguments");
1848 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1849 ((i == 0) && (!is_static)),
1850 &receiver_offset);
1851 break;
1852 case T_VOID:
1853 break;
1855 case T_FLOAT:
1856 float_move(masm, in_regs[i], out_regs[c_arg]);
1857 break;
1859 case T_DOUBLE:
1860 assert( i + 1 < total_in_args &&
1861 in_sig_bt[i + 1] == T_VOID &&
1862 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1863 double_move(masm, in_regs[i], out_regs[c_arg]);
1864 break;
1866 case T_LONG :
1867 long_move(masm, in_regs[i], out_regs[c_arg]);
1868 break;
1870 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1872 default:
1873 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1874 }
1875 }
1877 // Pre-load a static method's oop into rsi. Used both by locking code and
1878 // the normal JNI call code.
1879 if (method->is_static() && !is_critical_native) {
1881 // load opp into a register
1882 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1884 // Now handlize the static class mirror it's known not-null.
1885 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1886 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1888 // Now get the handle
1889 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1890 // store the klass handle as second argument
1891 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1892 }
1894 // Change state to native (we save the return address in the thread, since it might not
1895 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1896 // points into the right code segment. It does not have to be the correct return pc.
1897 // We use the same pc/oopMap repeatedly when we call out
1899 intptr_t the_pc = (intptr_t) __ pc();
1900 oop_maps->add_gc_map(the_pc - start, map);
1902 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1905 // We have all of the arguments setup at this point. We must not touch any register
1906 // argument registers at this point (what if we save/restore them there are no oop?
1908 {
1909 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1910 __ mov_metadata(rax, method());
1911 __ call_VM_leaf(
1912 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1913 thread, rax);
1914 }
1916 // RedefineClasses() tracing support for obsolete method entry
1917 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1918 __ mov_metadata(rax, method());
1919 __ call_VM_leaf(
1920 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1921 thread, rax);
1922 }
1924 // These are register definitions we need for locking/unlocking
1925 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1926 const Register obj_reg = rcx; // Will contain the oop
1927 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1929 Label slow_path_lock;
1930 Label lock_done;
1932 // Lock a synchronized method
1933 if (method->is_synchronized()) {
1934 assert(!is_critical_native, "unhandled");
1937 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1939 // Get the handle (the 2nd argument)
1940 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1942 // Get address of the box
1944 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1946 // Load the oop from the handle
1947 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1949 if (UseBiasedLocking) {
1950 // Note that oop_handle_reg is trashed during this call
1951 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1952 }
1954 // Load immediate 1 into swap_reg %rax,
1955 __ movptr(swap_reg, 1);
1957 // Load (object->mark() | 1) into swap_reg %rax,
1958 __ orptr(swap_reg, Address(obj_reg, 0));
1960 // Save (object->mark() | 1) into BasicLock's displaced header
1961 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1963 if (os::is_MP()) {
1964 __ lock();
1965 }
1967 // src -> dest iff dest == rax, else rax, <- dest
1968 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1969 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1970 __ jcc(Assembler::equal, lock_done);
1972 // Test if the oopMark is an obvious stack pointer, i.e.,
1973 // 1) (mark & 3) == 0, and
1974 // 2) rsp <= mark < mark + os::pagesize()
1975 // These 3 tests can be done by evaluating the following
1976 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1977 // assuming both stack pointer and pagesize have their
1978 // least significant 2 bits clear.
1979 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1981 __ subptr(swap_reg, rsp);
1982 __ andptr(swap_reg, 3 - os::vm_page_size());
1984 // Save the test result, for recursive case, the result is zero
1985 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1986 __ jcc(Assembler::notEqual, slow_path_lock);
1987 // Slow path will re-enter here
1988 __ bind(lock_done);
1990 if (UseBiasedLocking) {
1991 // Re-fetch oop_handle_reg as we trashed it above
1992 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1993 }
1994 }
1997 // Finally just about ready to make the JNI call
2000 // get JNIEnv* which is first argument to native
2001 if (!is_critical_native) {
2002 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2003 __ movptr(Address(rsp, 0), rdx);
2004 }
2006 // Now set thread in native
2007 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2009 __ call(RuntimeAddress(native_func));
2011 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2012 // arguments off of the stack. We could just re-adjust the stack pointer here
2013 // and continue to do SP relative addressing but we instead switch to FP
2014 // relative addressing.
2016 // Unpack native results.
2017 switch (ret_type) {
2018 case T_BOOLEAN: __ c2bool(rax); break;
2019 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2020 case T_BYTE : __ sign_extend_byte (rax); break;
2021 case T_SHORT : __ sign_extend_short(rax); break;
2022 case T_INT : /* nothing to do */ break;
2023 case T_DOUBLE :
2024 case T_FLOAT :
2025 // Result is in st0 we'll save as needed
2026 break;
2027 case T_ARRAY: // Really a handle
2028 case T_OBJECT: // Really a handle
2029 break; // can't de-handlize until after safepoint check
2030 case T_VOID: break;
2031 case T_LONG: break;
2032 default : ShouldNotReachHere();
2033 }
2035 // Switch thread to "native transition" state before reading the synchronization state.
2036 // This additional state is necessary because reading and testing the synchronization
2037 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2038 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2039 // VM thread changes sync state to synchronizing and suspends threads for GC.
2040 // Thread A is resumed to finish this native method, but doesn't block here since it
2041 // didn't see any synchronization is progress, and escapes.
2042 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2044 if(os::is_MP()) {
2045 if (UseMembar) {
2046 // Force this write out before the read below
2047 __ membar(Assembler::Membar_mask_bits(
2048 Assembler::LoadLoad | Assembler::LoadStore |
2049 Assembler::StoreLoad | Assembler::StoreStore));
2050 } else {
2051 // Write serialization page so VM thread can do a pseudo remote membar.
2052 // We use the current thread pointer to calculate a thread specific
2053 // offset to write to within the page. This minimizes bus traffic
2054 // due to cache line collision.
2055 __ serialize_memory(thread, rcx);
2056 }
2057 }
2059 if (AlwaysRestoreFPU) {
2060 // Make sure the control word is correct.
2061 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2062 }
2064 Label after_transition;
2066 // check for safepoint operation in progress and/or pending suspend requests
2067 { Label Continue;
2069 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2070 SafepointSynchronize::_not_synchronized);
2072 Label L;
2073 __ jcc(Assembler::notEqual, L);
2074 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2075 __ jcc(Assembler::equal, Continue);
2076 __ bind(L);
2078 // Don't use call_VM as it will see a possible pending exception and forward it
2079 // and never return here preventing us from clearing _last_native_pc down below.
2080 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2081 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2082 // by hand.
2083 //
2084 save_native_result(masm, ret_type, stack_slots);
2085 __ push(thread);
2086 if (!is_critical_native) {
2087 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2088 JavaThread::check_special_condition_for_native_trans)));
2089 } else {
2090 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2091 JavaThread::check_special_condition_for_native_trans_and_transition)));
2092 }
2093 __ increment(rsp, wordSize);
2094 // Restore any method result value
2095 restore_native_result(masm, ret_type, stack_slots);
2097 if (is_critical_native) {
2098 // The call above performed the transition to thread_in_Java so
2099 // skip the transition logic below.
2100 __ jmpb(after_transition);
2101 }
2103 __ bind(Continue);
2104 }
2106 // change thread state
2107 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2108 __ bind(after_transition);
2110 Label reguard;
2111 Label reguard_done;
2112 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
2113 __ jcc(Assembler::equal, reguard);
2115 // slow path reguard re-enters here
2116 __ bind(reguard_done);
2118 // Handle possible exception (will unlock if necessary)
2120 // native result if any is live
2122 // Unlock
2123 Label slow_path_unlock;
2124 Label unlock_done;
2125 if (method->is_synchronized()) {
2127 Label done;
2129 // Get locked oop from the handle we passed to jni
2130 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2132 if (UseBiasedLocking) {
2133 __ biased_locking_exit(obj_reg, rbx, done);
2134 }
2136 // Simple recursive lock?
2138 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2139 __ jcc(Assembler::equal, done);
2141 // Must save rax, if if it is live now because cmpxchg must use it
2142 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2143 save_native_result(masm, ret_type, stack_slots);
2144 }
2146 // get old displaced header
2147 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2149 // get address of the stack lock
2150 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2152 // Atomic swap old header if oop still contains the stack lock
2153 if (os::is_MP()) {
2154 __ lock();
2155 }
2157 // src -> dest iff dest == rax, else rax, <- dest
2158 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2159 __ cmpxchgptr(rbx, Address(obj_reg, 0));
2160 __ jcc(Assembler::notEqual, slow_path_unlock);
2162 // slow path re-enters here
2163 __ bind(unlock_done);
2164 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2165 restore_native_result(masm, ret_type, stack_slots);
2166 }
2168 __ bind(done);
2170 }
2172 {
2173 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2174 // Tell dtrace about this method exit
2175 save_native_result(masm, ret_type, stack_slots);
2176 __ mov_metadata(rax, method());
2177 __ call_VM_leaf(
2178 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2179 thread, rax);
2180 restore_native_result(masm, ret_type, stack_slots);
2181 }
2183 // We can finally stop using that last_Java_frame we setup ages ago
2185 __ reset_last_Java_frame(thread, false, true);
2187 // Unpack oop result
2188 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2189 Label L;
2190 __ cmpptr(rax, (int32_t)NULL_WORD);
2191 __ jcc(Assembler::equal, L);
2192 __ movptr(rax, Address(rax, 0));
2193 __ bind(L);
2194 __ verify_oop(rax);
2195 }
2197 if (!is_critical_native) {
2198 // reset handle block
2199 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2200 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2202 // Any exception pending?
2203 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2204 __ jcc(Assembler::notEqual, exception_pending);
2205 }
2207 // no exception, we're almost done
2209 // check that only result value is on FPU stack
2210 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2212 // Fixup floating pointer results so that result looks like a return from a compiled method
2213 if (ret_type == T_FLOAT) {
2214 if (UseSSE >= 1) {
2215 // Pop st0 and store as float and reload into xmm register
2216 __ fstp_s(Address(rbp, -4));
2217 __ movflt(xmm0, Address(rbp, -4));
2218 }
2219 } else if (ret_type == T_DOUBLE) {
2220 if (UseSSE >= 2) {
2221 // Pop st0 and store as double and reload into xmm register
2222 __ fstp_d(Address(rbp, -8));
2223 __ movdbl(xmm0, Address(rbp, -8));
2224 }
2225 }
2227 // Return
2229 __ leave();
2230 __ ret(0);
2232 // Unexpected paths are out of line and go here
2234 // Slow path locking & unlocking
2235 if (method->is_synchronized()) {
2237 // BEGIN Slow path lock
2239 __ bind(slow_path_lock);
2241 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2242 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2243 __ push(thread);
2244 __ push(lock_reg);
2245 __ push(obj_reg);
2246 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2247 __ addptr(rsp, 3*wordSize);
2249 #ifdef ASSERT
2250 { Label L;
2251 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2252 __ jcc(Assembler::equal, L);
2253 __ stop("no pending exception allowed on exit from monitorenter");
2254 __ bind(L);
2255 }
2256 #endif
2257 __ jmp(lock_done);
2259 // END Slow path lock
2261 // BEGIN Slow path unlock
2262 __ bind(slow_path_unlock);
2264 // Slow path unlock
2266 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2267 save_native_result(masm, ret_type, stack_slots);
2268 }
2269 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2271 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2272 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2275 // should be a peal
2276 // +wordSize because of the push above
2277 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2278 __ push(rax);
2280 __ push(obj_reg);
2281 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2282 __ addptr(rsp, 2*wordSize);
2283 #ifdef ASSERT
2284 {
2285 Label L;
2286 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2287 __ jcc(Assembler::equal, L);
2288 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2289 __ bind(L);
2290 }
2291 #endif /* ASSERT */
2293 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2295 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2296 restore_native_result(masm, ret_type, stack_slots);
2297 }
2298 __ jmp(unlock_done);
2299 // END Slow path unlock
2301 }
2303 // SLOW PATH Reguard the stack if needed
2305 __ bind(reguard);
2306 save_native_result(masm, ret_type, stack_slots);
2307 {
2308 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2309 }
2310 restore_native_result(masm, ret_type, stack_slots);
2311 __ jmp(reguard_done);
2314 // BEGIN EXCEPTION PROCESSING
2316 if (!is_critical_native) {
2317 // Forward the exception
2318 __ bind(exception_pending);
2320 // remove possible return value from FPU register stack
2321 __ empty_FPU_stack();
2323 // pop our frame
2324 __ leave();
2325 // and forward the exception
2326 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2327 }
2329 __ flush();
2331 nmethod *nm = nmethod::new_native_nmethod(method,
2332 compile_id,
2333 masm->code(),
2334 vep_offset,
2335 frame_complete,
2336 stack_slots / VMRegImpl::slots_per_word,
2337 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2338 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2339 oop_maps);
2341 if (is_critical_native) {
2342 nm->set_lazy_critical_native(true);
2343 }
2345 return nm;
2347 }
2349 #ifdef HAVE_DTRACE_H
2350 // ---------------------------------------------------------------------------
2351 // Generate a dtrace nmethod for a given signature. The method takes arguments
2352 // in the Java compiled code convention, marshals them to the native
2353 // abi and then leaves nops at the position you would expect to call a native
2354 // function. When the probe is enabled the nops are replaced with a trap
2355 // instruction that dtrace inserts and the trace will cause a notification
2356 // to dtrace.
2357 //
2358 // The probes are only able to take primitive types and java/lang/String as
2359 // arguments. No other java types are allowed. Strings are converted to utf8
2360 // strings so that from dtrace point of view java strings are converted to C
2361 // strings. There is an arbitrary fixed limit on the total space that a method
2362 // can use for converting the strings. (256 chars per string in the signature).
2363 // So any java string larger then this is truncated.
2365 nmethod *SharedRuntime::generate_dtrace_nmethod(
2366 MacroAssembler *masm, methodHandle method) {
2368 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2369 // be single threaded in this method.
2370 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2372 // Fill in the signature array, for the calling-convention call.
2373 int total_args_passed = method->size_of_parameters();
2375 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2376 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2378 // The signature we are going to use for the trap that dtrace will see
2379 // java/lang/String is converted. We drop "this" and any other object
2380 // is converted to NULL. (A one-slot java/lang/Long object reference
2381 // is converted to a two-slot long, which is why we double the allocation).
2382 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2383 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2385 int i=0;
2386 int total_strings = 0;
2387 int first_arg_to_pass = 0;
2388 int total_c_args = 0;
2390 if( !method->is_static() ) { // Pass in receiver first
2391 in_sig_bt[i++] = T_OBJECT;
2392 first_arg_to_pass = 1;
2393 }
2395 // We need to convert the java args to where a native (non-jni) function
2396 // would expect them. To figure out where they go we convert the java
2397 // signature to a C signature.
2399 SignatureStream ss(method->signature());
2400 for ( ; !ss.at_return_type(); ss.next()) {
2401 BasicType bt = ss.type();
2402 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2403 out_sig_bt[total_c_args++] = bt;
2404 if( bt == T_OBJECT) {
2405 Symbol* s = ss.as_symbol_or_null(); // symbol is created
2406 if (s == vmSymbols::java_lang_String()) {
2407 total_strings++;
2408 out_sig_bt[total_c_args-1] = T_ADDRESS;
2409 } else if (s == vmSymbols::java_lang_Boolean() ||
2410 s == vmSymbols::java_lang_Character() ||
2411 s == vmSymbols::java_lang_Byte() ||
2412 s == vmSymbols::java_lang_Short() ||
2413 s == vmSymbols::java_lang_Integer() ||
2414 s == vmSymbols::java_lang_Float()) {
2415 out_sig_bt[total_c_args-1] = T_INT;
2416 } else if (s == vmSymbols::java_lang_Long() ||
2417 s == vmSymbols::java_lang_Double()) {
2418 out_sig_bt[total_c_args-1] = T_LONG;
2419 out_sig_bt[total_c_args++] = T_VOID;
2420 }
2421 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2422 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2423 out_sig_bt[total_c_args++] = T_VOID;
2424 }
2425 }
2427 assert(i==total_args_passed, "validly parsed signature");
2429 // Now get the compiled-Java layout as input arguments
2430 int comp_args_on_stack;
2431 comp_args_on_stack = SharedRuntime::java_calling_convention(
2432 in_sig_bt, in_regs, total_args_passed, false);
2434 // Now figure out where the args must be stored and how much stack space
2435 // they require (neglecting out_preserve_stack_slots).
2437 int out_arg_slots;
2438 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2440 // Calculate the total number of stack slots we will need.
2442 // First count the abi requirement plus all of the outgoing args
2443 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2445 // Now space for the string(s) we must convert
2447 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2448 for (i = 0; i < total_strings ; i++) {
2449 string_locs[i] = stack_slots;
2450 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2451 }
2453 // + 2 for return address (which we own) and saved rbp,
2455 stack_slots += 2;
2457 // Ok The space we have allocated will look like:
2458 //
2459 //
2460 // FP-> | |
2461 // |---------------------|
2462 // | string[n] |
2463 // |---------------------| <- string_locs[n]
2464 // | string[n-1] |
2465 // |---------------------| <- string_locs[n-1]
2466 // | ... |
2467 // | ... |
2468 // |---------------------| <- string_locs[1]
2469 // | string[0] |
2470 // |---------------------| <- string_locs[0]
2471 // | outbound memory |
2472 // | based arguments |
2473 // | |
2474 // |---------------------|
2475 // | |
2476 // SP-> | out_preserved_slots |
2477 //
2478 //
2480 // Now compute actual number of stack words we need rounding to make
2481 // stack properly aligned.
2482 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2484 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2486 intptr_t start = (intptr_t)__ pc();
2488 // First thing make an ic check to see if we should even be here
2490 // We are free to use all registers as temps without saving them and
2491 // restoring them except rbp. rbp, is the only callee save register
2492 // as far as the interpreter and the compiler(s) are concerned.
2494 const Register ic_reg = rax;
2495 const Register receiver = rcx;
2496 Label hit;
2497 Label exception_pending;
2500 __ verify_oop(receiver);
2501 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2502 __ jcc(Assembler::equal, hit);
2504 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2506 // verified entry must be aligned for code patching.
2507 // and the first 5 bytes must be in the same cache line
2508 // if we align at 8 then we will be sure 5 bytes are in the same line
2509 __ align(8);
2511 __ bind(hit);
2513 int vep_offset = ((intptr_t)__ pc()) - start;
2516 // The instruction at the verified entry point must be 5 bytes or longer
2517 // because it can be patched on the fly by make_non_entrant. The stack bang
2518 // instruction fits that requirement.
2520 // Generate stack overflow check
2523 if (UseStackBanging) {
2524 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2525 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2526 } else {
2527 __ movl(rax, stack_size);
2528 __ bang_stack_size(rax, rbx);
2529 }
2530 } else {
2531 // need a 5 byte instruction to allow MT safe patching to non-entrant
2532 __ fat_nop();
2533 }
2535 assert(((int)__ pc() - start - vep_offset) >= 5,
2536 "valid size for make_non_entrant");
2538 // Generate a new frame for the wrapper.
2539 __ enter();
2541 // -2 because return address is already present and so is saved rbp,
2542 if (stack_size - 2*wordSize != 0) {
2543 __ subl(rsp, stack_size - 2*wordSize);
2544 }
2546 // Frame is now completed as far a size and linkage.
2548 int frame_complete = ((intptr_t)__ pc()) - start;
2550 // First thing we do store all the args as if we are doing the call.
2551 // Since the C calling convention is stack based that ensures that
2552 // all the Java register args are stored before we need to convert any
2553 // string we might have.
2555 int sid = 0;
2556 int c_arg, j_arg;
2557 int string_reg = 0;
2559 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2560 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2562 VMRegPair src = in_regs[j_arg];
2563 VMRegPair dst = out_regs[c_arg];
2564 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2565 "stack based abi assumed");
2567 switch (in_sig_bt[j_arg]) {
2569 case T_ARRAY:
2570 case T_OBJECT:
2571 if (out_sig_bt[c_arg] == T_ADDRESS) {
2572 // Any register based arg for a java string after the first
2573 // will be destroyed by the call to get_utf so we store
2574 // the original value in the location the utf string address
2575 // will eventually be stored.
2576 if (src.first()->is_reg()) {
2577 if (string_reg++ != 0) {
2578 simple_move32(masm, src, dst);
2579 }
2580 }
2581 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2582 // need to unbox a one-word value
2583 Register in_reg = rax;
2584 if ( src.first()->is_reg() ) {
2585 in_reg = src.first()->as_Register();
2586 } else {
2587 simple_move32(masm, src, in_reg->as_VMReg());
2588 }
2589 Label skipUnbox;
2590 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2591 if ( out_sig_bt[c_arg] == T_LONG ) {
2592 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2593 }
2594 __ testl(in_reg, in_reg);
2595 __ jcc(Assembler::zero, skipUnbox);
2596 assert(dst.first()->is_stack() &&
2597 (!dst.second()->is_valid() || dst.second()->is_stack()),
2598 "value(s) must go into stack slots");
2600 BasicType bt = out_sig_bt[c_arg];
2601 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2602 if ( bt == T_LONG ) {
2603 __ movl(rbx, Address(in_reg,
2604 box_offset + VMRegImpl::stack_slot_size));
2605 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2606 }
2607 __ movl(in_reg, Address(in_reg, box_offset));
2608 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2609 __ bind(skipUnbox);
2610 } else {
2611 // Convert the arg to NULL
2612 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2613 }
2614 if (out_sig_bt[c_arg] == T_LONG) {
2615 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2616 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2617 }
2618 break;
2620 case T_VOID:
2621 break;
2623 case T_FLOAT:
2624 float_move(masm, src, dst);
2625 break;
2627 case T_DOUBLE:
2628 assert( j_arg + 1 < total_args_passed &&
2629 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2630 double_move(masm, src, dst);
2631 break;
2633 case T_LONG :
2634 long_move(masm, src, dst);
2635 break;
2637 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2639 default:
2640 simple_move32(masm, src, dst);
2641 }
2642 }
2644 // Now we must convert any string we have to utf8
2645 //
2647 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2648 sid < total_strings ; j_arg++, c_arg++ ) {
2650 if (out_sig_bt[c_arg] == T_ADDRESS) {
2652 Address utf8_addr = Address(
2653 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2654 __ leal(rax, utf8_addr);
2656 // The first string we find might still be in the original java arg
2657 // register
2658 VMReg orig_loc = in_regs[j_arg].first();
2659 Register string_oop;
2661 // This is where the argument will eventually reside
2662 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2664 if (sid == 1 && orig_loc->is_reg()) {
2665 string_oop = orig_loc->as_Register();
2666 assert(string_oop != rax, "smashed arg");
2667 } else {
2669 if (orig_loc->is_reg()) {
2670 // Get the copy of the jls object
2671 __ movl(rcx, dest);
2672 } else {
2673 // arg is still in the original location
2674 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2675 }
2676 string_oop = rcx;
2678 }
2679 Label nullString;
2680 __ movl(dest, NULL_WORD);
2681 __ testl(string_oop, string_oop);
2682 __ jcc(Assembler::zero, nullString);
2684 // Now we can store the address of the utf string as the argument
2685 __ movl(dest, rax);
2687 // And do the conversion
2688 __ call_VM_leaf(CAST_FROM_FN_PTR(
2689 address, SharedRuntime::get_utf), string_oop, rax);
2690 __ bind(nullString);
2691 }
2693 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2694 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2695 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2696 }
2697 }
2700 // Ok now we are done. Need to place the nop that dtrace wants in order to
2701 // patch in the trap
2703 int patch_offset = ((intptr_t)__ pc()) - start;
2705 __ nop();
2708 // Return
2710 __ leave();
2711 __ ret(0);
2713 __ flush();
2715 nmethod *nm = nmethod::new_dtrace_nmethod(
2716 method, masm->code(), vep_offset, patch_offset, frame_complete,
2717 stack_slots / VMRegImpl::slots_per_word);
2718 return nm;
2720 }
2722 #endif // HAVE_DTRACE_H
2724 // this function returns the adjust size (in number of words) to a c2i adapter
2725 // activation for use during deoptimization
2726 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2727 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2728 }
2731 uint SharedRuntime::out_preserve_stack_slots() {
2732 return 0;
2733 }
2736 //------------------------------generate_deopt_blob----------------------------
2737 void SharedRuntime::generate_deopt_blob() {
2738 // allocate space for the code
2739 ResourceMark rm;
2740 // setup code generation tools
2741 CodeBuffer buffer("deopt_blob", 1024, 1024);
2742 MacroAssembler* masm = new MacroAssembler(&buffer);
2743 int frame_size_in_words;
2744 OopMap* map = NULL;
2745 // Account for the extra args we place on the stack
2746 // by the time we call fetch_unroll_info
2747 const int additional_words = 2; // deopt kind, thread
2749 OopMapSet *oop_maps = new OopMapSet();
2751 // -------------
2752 // This code enters when returning to a de-optimized nmethod. A return
2753 // address has been pushed on the the stack, and return values are in
2754 // registers.
2755 // If we are doing a normal deopt then we were called from the patched
2756 // nmethod from the point we returned to the nmethod. So the return
2757 // address on the stack is wrong by NativeCall::instruction_size
2758 // We will adjust the value to it looks like we have the original return
2759 // address on the stack (like when we eagerly deoptimized).
2760 // In the case of an exception pending with deoptimized then we enter
2761 // with a return address on the stack that points after the call we patched
2762 // into the exception handler. We have the following register state:
2763 // rax,: exception
2764 // rbx,: exception handler
2765 // rdx: throwing pc
2766 // So in this case we simply jam rdx into the useless return address and
2767 // the stack looks just like we want.
2768 //
2769 // At this point we need to de-opt. We save the argument return
2770 // registers. We call the first C routine, fetch_unroll_info(). This
2771 // routine captures the return values and returns a structure which
2772 // describes the current frame size and the sizes of all replacement frames.
2773 // The current frame is compiled code and may contain many inlined
2774 // functions, each with their own JVM state. We pop the current frame, then
2775 // push all the new frames. Then we call the C routine unpack_frames() to
2776 // populate these frames. Finally unpack_frames() returns us the new target
2777 // address. Notice that callee-save registers are BLOWN here; they have
2778 // already been captured in the vframeArray at the time the return PC was
2779 // patched.
2780 address start = __ pc();
2781 Label cont;
2783 // Prolog for non exception case!
2785 // Save everything in sight.
2787 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2788 // Normal deoptimization
2789 __ push(Deoptimization::Unpack_deopt);
2790 __ jmp(cont);
2792 int reexecute_offset = __ pc() - start;
2794 // Reexecute case
2795 // return address is the pc describes what bci to do re-execute at
2797 // No need to update map as each call to save_live_registers will produce identical oopmap
2798 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2800 __ push(Deoptimization::Unpack_reexecute);
2801 __ jmp(cont);
2803 int exception_offset = __ pc() - start;
2805 // Prolog for exception case
2807 // all registers are dead at this entry point, except for rax, and
2808 // rdx which contain the exception oop and exception pc
2809 // respectively. Set them in TLS and fall thru to the
2810 // unpack_with_exception_in_tls entry point.
2812 __ get_thread(rdi);
2813 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2814 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2816 int exception_in_tls_offset = __ pc() - start;
2818 // new implementation because exception oop is now passed in JavaThread
2820 // Prolog for exception case
2821 // All registers must be preserved because they might be used by LinearScan
2822 // Exceptiop oop and throwing PC are passed in JavaThread
2823 // tos: stack at point of call to method that threw the exception (i.e. only
2824 // args are on the stack, no return address)
2826 // make room on stack for the return address
2827 // It will be patched later with the throwing pc. The correct value is not
2828 // available now because loading it from memory would destroy registers.
2829 __ push(0);
2831 // Save everything in sight.
2833 // No need to update map as each call to save_live_registers will produce identical oopmap
2834 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2836 // Now it is safe to overwrite any register
2838 // store the correct deoptimization type
2839 __ push(Deoptimization::Unpack_exception);
2841 // load throwing pc from JavaThread and patch it as the return address
2842 // of the current frame. Then clear the field in JavaThread
2843 __ get_thread(rdi);
2844 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2845 __ movptr(Address(rbp, wordSize), rdx);
2846 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2848 #ifdef ASSERT
2849 // verify that there is really an exception oop in JavaThread
2850 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2851 __ verify_oop(rax);
2853 // verify that there is no pending exception
2854 Label no_pending_exception;
2855 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2856 __ testptr(rax, rax);
2857 __ jcc(Assembler::zero, no_pending_exception);
2858 __ stop("must not have pending exception here");
2859 __ bind(no_pending_exception);
2860 #endif
2862 __ bind(cont);
2864 // Compiled code leaves the floating point stack dirty, empty it.
2865 __ empty_FPU_stack();
2868 // Call C code. Need thread and this frame, but NOT official VM entry
2869 // crud. We cannot block on this call, no GC can happen.
2870 __ get_thread(rcx);
2871 __ push(rcx);
2872 // fetch_unroll_info needs to call last_java_frame()
2873 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2875 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2877 // Need to have an oopmap that tells fetch_unroll_info where to
2878 // find any register it might need.
2880 oop_maps->add_gc_map( __ pc()-start, map);
2882 // Discard arg to fetch_unroll_info
2883 __ pop(rcx);
2885 __ get_thread(rcx);
2886 __ reset_last_Java_frame(rcx, false, false);
2888 // Load UnrollBlock into EDI
2889 __ mov(rdi, rax);
2891 // Move the unpack kind to a safe place in the UnrollBlock because
2892 // we are very short of registers
2894 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2895 // retrieve the deopt kind from where we left it.
2896 __ pop(rax);
2897 __ movl(unpack_kind, rax); // save the unpack_kind value
2899 Label noException;
2900 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2901 __ jcc(Assembler::notEqual, noException);
2902 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2903 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2904 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2905 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2907 __ verify_oop(rax);
2909 // Overwrite the result registers with the exception results.
2910 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2911 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2913 __ bind(noException);
2915 // Stack is back to only having register save data on the stack.
2916 // Now restore the result registers. Everything else is either dead or captured
2917 // in the vframeArray.
2919 RegisterSaver::restore_result_registers(masm);
2921 // Non standard control word may be leaked out through a safepoint blob, and we can
2922 // deopt at a poll point with the non standard control word. However, we should make
2923 // sure the control word is correct after restore_result_registers.
2924 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2926 // All of the register save area has been popped of the stack. Only the
2927 // return address remains.
2929 // Pop all the frames we must move/replace.
2930 //
2931 // Frame picture (youngest to oldest)
2932 // 1: self-frame (no frame link)
2933 // 2: deopting frame (no frame link)
2934 // 3: caller of deopting frame (could be compiled/interpreted).
2935 //
2936 // Note: by leaving the return address of self-frame on the stack
2937 // and using the size of frame 2 to adjust the stack
2938 // when we are done the return to frame 3 will still be on the stack.
2940 // Pop deoptimized frame
2941 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2943 // sp should be pointing at the return address to the caller (3)
2945 // Stack bang to make sure there's enough room for these interpreter frames.
2946 if (UseStackBanging) {
2947 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2948 __ bang_stack_size(rbx, rcx);
2949 }
2951 // Load array of frame pcs into ECX
2952 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2954 __ pop(rsi); // trash the old pc
2956 // Load array of frame sizes into ESI
2957 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2959 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2961 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2962 __ movl(counter, rbx);
2964 // Pick up the initial fp we should save
2965 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2967 // Now adjust the caller's stack to make up for the extra locals
2968 // but record the original sp so that we can save it in the skeletal interpreter
2969 // frame and the stack walking of interpreter_sender will get the unextended sp
2970 // value and not the "real" sp value.
2972 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2973 __ movptr(sp_temp, rsp);
2974 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2975 __ subptr(rsp, rbx);
2977 // Push interpreter frames in a loop
2978 Label loop;
2979 __ bind(loop);
2980 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2981 #ifdef CC_INTERP
2982 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2983 #ifdef ASSERT
2984 __ push(0xDEADDEAD); // Make a recognizable pattern
2985 __ push(0xDEADDEAD);
2986 #else /* ASSERT */
2987 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2988 #endif /* ASSERT */
2989 #else /* CC_INTERP */
2990 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2991 #endif /* CC_INTERP */
2992 __ pushptr(Address(rcx, 0)); // save return address
2993 __ enter(); // save old & set new rbp,
2994 __ subptr(rsp, rbx); // Prolog!
2995 __ movptr(rbx, sp_temp); // sender's sp
2996 #ifdef CC_INTERP
2997 __ movptr(Address(rbp,
2998 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2999 rbx); // Make it walkable
3000 #else /* CC_INTERP */
3001 // This value is corrected by layout_activation_impl
3002 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
3003 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3004 #endif /* CC_INTERP */
3005 __ movptr(sp_temp, rsp); // pass to next frame
3006 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3007 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3008 __ decrementl(counter); // decrement counter
3009 __ jcc(Assembler::notZero, loop);
3010 __ pushptr(Address(rcx, 0)); // save final return address
3012 // Re-push self-frame
3013 __ enter(); // save old & set new rbp,
3015 // Return address and rbp, are in place
3016 // We'll push additional args later. Just allocate a full sized
3017 // register save area
3018 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
3020 // Restore frame locals after moving the frame
3021 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
3022 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
3023 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
3024 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3025 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3027 // Set up the args to unpack_frame
3029 __ pushl(unpack_kind); // get the unpack_kind value
3030 __ get_thread(rcx);
3031 __ push(rcx);
3033 // set last_Java_sp, last_Java_fp
3034 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
3036 // Call C code. Need thread but NOT official VM entry
3037 // crud. We cannot block on this call, no GC can happen. Call should
3038 // restore return values to their stack-slots with the new SP.
3039 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3040 // Set an oopmap for the call site
3041 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
3043 // rax, contains the return result type
3044 __ push(rax);
3046 __ get_thread(rcx);
3047 __ reset_last_Java_frame(rcx, false, false);
3049 // Collect return values
3050 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
3051 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
3053 // Clear floating point stack before returning to interpreter
3054 __ empty_FPU_stack();
3056 // Check if we should push the float or double return value.
3057 Label results_done, yes_double_value;
3058 __ cmpl(Address(rsp, 0), T_DOUBLE);
3059 __ jcc (Assembler::zero, yes_double_value);
3060 __ cmpl(Address(rsp, 0), T_FLOAT);
3061 __ jcc (Assembler::notZero, results_done);
3063 // return float value as expected by interpreter
3064 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3065 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3066 __ jmp(results_done);
3068 // return double value as expected by interpreter
3069 __ bind(yes_double_value);
3070 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3071 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3073 __ bind(results_done);
3075 // Pop self-frame.
3076 __ leave(); // Epilog!
3078 // Jump to interpreter
3079 __ ret(0);
3081 // -------------
3082 // make sure all code is generated
3083 masm->flush();
3085 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3086 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3087 }
3090 #ifdef COMPILER2
3091 //------------------------------generate_uncommon_trap_blob--------------------
3092 void SharedRuntime::generate_uncommon_trap_blob() {
3093 // allocate space for the code
3094 ResourceMark rm;
3095 // setup code generation tools
3096 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
3097 MacroAssembler* masm = new MacroAssembler(&buffer);
3099 enum frame_layout {
3100 arg0_off, // thread sp + 0 // Arg location for
3101 arg1_off, // unloaded_class_index sp + 1 // calling C
3102 // The frame sender code expects that rbp will be in the "natural" place and
3103 // will override any oopMap setting for it. We must therefore force the layout
3104 // so that it agrees with the frame sender code.
3105 rbp_off, // callee saved register sp + 2
3106 return_off, // slot for return address sp + 3
3107 framesize
3108 };
3110 address start = __ pc();
3111 // Push self-frame.
3112 __ subptr(rsp, return_off*wordSize); // Epilog!
3114 // rbp, is an implicitly saved callee saved register (i.e. the calling
3115 // convention will save restore it in prolog/epilog) Other than that
3116 // there are no callee save registers no that adapter frames are gone.
3117 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
3119 // Clear the floating point exception stack
3120 __ empty_FPU_stack();
3122 // set last_Java_sp
3123 __ get_thread(rdx);
3124 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
3126 // Call C code. Need thread but NOT official VM entry
3127 // crud. We cannot block on this call, no GC can happen. Call should
3128 // capture callee-saved registers as well as return values.
3129 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
3130 // argument already in ECX
3131 __ movl(Address(rsp, arg1_off*wordSize),rcx);
3132 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3134 // Set an oopmap for the call site
3135 OopMapSet *oop_maps = new OopMapSet();
3136 OopMap* map = new OopMap( framesize, 0 );
3137 // No oopMap for rbp, it is known implicitly
3139 oop_maps->add_gc_map( __ pc()-start, map);
3141 __ get_thread(rcx);
3143 __ reset_last_Java_frame(rcx, false, false);
3145 // Load UnrollBlock into EDI
3146 __ movptr(rdi, rax);
3148 // Pop all the frames we must move/replace.
3149 //
3150 // Frame picture (youngest to oldest)
3151 // 1: self-frame (no frame link)
3152 // 2: deopting frame (no frame link)
3153 // 3: caller of deopting frame (could be compiled/interpreted).
3155 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
3156 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
3158 // Pop deoptimized frame
3159 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3160 __ addptr(rsp, rcx);
3162 // sp should be pointing at the return address to the caller (3)
3164 // Stack bang to make sure there's enough room for these interpreter frames.
3165 if (UseStackBanging) {
3166 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3167 __ bang_stack_size(rbx, rcx);
3168 }
3171 // Load array of frame pcs into ECX
3172 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3174 __ pop(rsi); // trash the pc
3176 // Load array of frame sizes into ESI
3177 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3179 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3181 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3182 __ movl(counter, rbx);
3184 // Pick up the initial fp we should save
3185 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3187 // Now adjust the caller's stack to make up for the extra locals
3188 // but record the original sp so that we can save it in the skeletal interpreter
3189 // frame and the stack walking of interpreter_sender will get the unextended sp
3190 // value and not the "real" sp value.
3192 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3193 __ movptr(sp_temp, rsp);
3194 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3195 __ subptr(rsp, rbx);
3197 // Push interpreter frames in a loop
3198 Label loop;
3199 __ bind(loop);
3200 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3201 #ifdef CC_INTERP
3202 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3203 #ifdef ASSERT
3204 __ push(0xDEADDEAD); // Make a recognizable pattern
3205 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
3206 #else /* ASSERT */
3207 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3208 #endif /* ASSERT */
3209 #else /* CC_INTERP */
3210 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3211 #endif /* CC_INTERP */
3212 __ pushptr(Address(rcx, 0)); // save return address
3213 __ enter(); // save old & set new rbp,
3214 __ subptr(rsp, rbx); // Prolog!
3215 __ movptr(rbx, sp_temp); // sender's sp
3216 #ifdef CC_INTERP
3217 __ movptr(Address(rbp,
3218 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3219 rbx); // Make it walkable
3220 #else /* CC_INTERP */
3221 // This value is corrected by layout_activation_impl
3222 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3223 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3224 #endif /* CC_INTERP */
3225 __ movptr(sp_temp, rsp); // pass to next frame
3226 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3227 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3228 __ decrementl(counter); // decrement counter
3229 __ jcc(Assembler::notZero, loop);
3230 __ pushptr(Address(rcx, 0)); // save final return address
3232 // Re-push self-frame
3233 __ enter(); // save old & set new rbp,
3234 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
3237 // set last_Java_sp, last_Java_fp
3238 __ get_thread(rdi);
3239 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3241 // Call C code. Need thread but NOT official VM entry
3242 // crud. We cannot block on this call, no GC can happen. Call should
3243 // restore return values to their stack-slots with the new SP.
3244 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3245 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3246 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3247 // Set an oopmap for the call site
3248 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3250 __ get_thread(rdi);
3251 __ reset_last_Java_frame(rdi, true, false);
3253 // Pop self-frame.
3254 __ leave(); // Epilog!
3256 // Jump to interpreter
3257 __ ret(0);
3259 // -------------
3260 // make sure all code is generated
3261 masm->flush();
3263 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3264 }
3265 #endif // COMPILER2
3267 //------------------------------generate_handler_blob------
3268 //
3269 // Generate a special Compile2Runtime blob that saves all registers,
3270 // setup oopmap, and calls safepoint code to stop the compiled code for
3271 // a safepoint.
3272 //
3273 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) {
3275 // Account for thread arg in our frame
3276 const int additional_words = 1;
3277 int frame_size_in_words;
3279 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3281 ResourceMark rm;
3282 OopMapSet *oop_maps = new OopMapSet();
3283 OopMap* map;
3285 // allocate space for the code
3286 // setup code generation tools
3287 CodeBuffer buffer("handler_blob", 1024, 512);
3288 MacroAssembler* masm = new MacroAssembler(&buffer);
3290 const Register java_thread = rdi; // callee-saved for VC++
3291 address start = __ pc();
3292 address call_pc = NULL;
3294 // If cause_return is true we are at a poll_return and there is
3295 // the return address on the stack to the caller on the nmethod
3296 // that is safepoint. We can leave this return on the stack and
3297 // effectively complete the return and safepoint in the caller.
3298 // Otherwise we push space for a return address that the safepoint
3299 // handler will install later to make the stack walking sensible.
3300 if( !cause_return )
3301 __ push(rbx); // Make room for return address (or push it again)
3303 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
3305 // The following is basically a call_VM. However, we need the precise
3306 // address of the call in order to generate an oopmap. Hence, we do all the
3307 // work ourselves.
3309 // Push thread argument and setup last_Java_sp
3310 __ get_thread(java_thread);
3311 __ push(java_thread);
3312 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3314 // if this was not a poll_return then we need to correct the return address now.
3315 if( !cause_return ) {
3316 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3317 __ movptr(Address(rbp, wordSize), rax);
3318 }
3320 // do the call
3321 __ call(RuntimeAddress(call_ptr));
3323 // Set an oopmap for the call site. This oopmap will map all
3324 // oop-registers and debug-info registers as callee-saved. This
3325 // will allow deoptimization at this safepoint to find all possible
3326 // debug-info recordings, as well as let GC find all oops.
3328 oop_maps->add_gc_map( __ pc() - start, map);
3330 // Discard arg
3331 __ pop(rcx);
3333 Label noException;
3335 // Clear last_Java_sp again
3336 __ get_thread(java_thread);
3337 __ reset_last_Java_frame(java_thread, false, false);
3339 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3340 __ jcc(Assembler::equal, noException);
3342 // Exception pending
3344 RegisterSaver::restore_live_registers(masm);
3346 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3348 __ bind(noException);
3350 // Normal exit, register restoring and exit
3351 RegisterSaver::restore_live_registers(masm);
3353 __ ret(0);
3355 // make sure all code is generated
3356 masm->flush();
3358 // Fill-out other meta info
3359 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3360 }
3362 //
3363 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3364 //
3365 // Generate a stub that calls into vm to find out the proper destination
3366 // of a java call. All the argument registers are live at this point
3367 // but since this is generic code we don't know what they are and the caller
3368 // must do any gc of the args.
3369 //
3370 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3371 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3373 // allocate space for the code
3374 ResourceMark rm;
3376 CodeBuffer buffer(name, 1000, 512);
3377 MacroAssembler* masm = new MacroAssembler(&buffer);
3379 int frame_size_words;
3380 enum frame_layout {
3381 thread_off,
3382 extra_words };
3384 OopMapSet *oop_maps = new OopMapSet();
3385 OopMap* map = NULL;
3387 int start = __ offset();
3389 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3391 int frame_complete = __ offset();
3393 const Register thread = rdi;
3394 __ get_thread(rdi);
3396 __ push(thread);
3397 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3399 __ call(RuntimeAddress(destination));
3402 // Set an oopmap for the call site.
3403 // We need this not only for callee-saved registers, but also for volatile
3404 // registers that the compiler might be keeping live across a safepoint.
3406 oop_maps->add_gc_map( __ offset() - start, map);
3408 // rax, contains the address we are going to jump to assuming no exception got installed
3410 __ addptr(rsp, wordSize);
3412 // clear last_Java_sp
3413 __ reset_last_Java_frame(thread, true, false);
3414 // check for pending exceptions
3415 Label pending;
3416 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3417 __ jcc(Assembler::notEqual, pending);
3419 // get the returned Method*
3420 __ get_vm_result_2(rbx, thread);
3421 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3423 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3425 RegisterSaver::restore_live_registers(masm);
3427 // We are back the the original state on entry and ready to go.
3429 __ jmp(rax);
3431 // Pending exception after the safepoint
3433 __ bind(pending);
3435 RegisterSaver::restore_live_registers(masm);
3437 // exception pending => remove activation and forward to exception handler
3439 __ get_thread(thread);
3440 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3441 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3442 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3444 // -------------
3445 // make sure all code is generated
3446 masm->flush();
3448 // return the blob
3449 // frame_size_words or bytes??
3450 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3451 }