Thu, 20 Mar 2008 15:11:44 -0700
6674600: (Escape Analysis) Optimize memory graph for instance's fields
Summary: EA gives opportunite to do more aggressive memory optimizations.
Reviewed-by: never, jrose
1 /*
2 * Copyright 1998-2007 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
25 #include "incls/_precompiled.incl"
26 #include "incls/_output.cpp.incl"
28 extern uint size_java_to_interp();
29 extern uint reloc_java_to_interp();
30 extern uint size_exception_handler();
31 extern uint size_deopt_handler();
33 #ifndef PRODUCT
34 #define DEBUG_ARG(x) , x
35 #else
36 #define DEBUG_ARG(x)
37 #endif
39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 extern int emit_deopt_handler(CodeBuffer &cbuf);
42 //------------------------------Output-----------------------------------------
43 // Convert Nodes to instruction bits and pass off to the VM
44 void Compile::Output() {
45 // RootNode goes
46 assert( _cfg->_broot->_nodes.size() == 0, "" );
48 // Initialize the space for the BufferBlob used to find and verify
49 // instruction size in MachNode::emit_size()
50 init_scratch_buffer_blob();
52 // Make sure I can find the Start Node
53 Block_Array& bbs = _cfg->_bbs;
54 Block *entry = _cfg->_blocks[1];
55 Block *broot = _cfg->_broot;
57 const StartNode *start = entry->_nodes[0]->as_Start();
59 // Replace StartNode with prolog
60 MachPrologNode *prolog = new (this) MachPrologNode();
61 entry->_nodes.map( 0, prolog );
62 bbs.map( prolog->_idx, entry );
63 bbs.map( start->_idx, NULL ); // start is no longer in any block
65 // Virtual methods need an unverified entry point
67 if( is_osr_compilation() ) {
68 if( PoisonOSREntry ) {
69 // TODO: Should use a ShouldNotReachHereNode...
70 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
71 }
72 } else {
73 if( _method && !_method->flags().is_static() ) {
74 // Insert unvalidated entry point
75 _cfg->insert( broot, 0, new (this) MachUEPNode() );
76 }
78 }
81 // Break before main entry point
82 if( (_method && _method->break_at_execute())
83 #ifndef PRODUCT
84 ||(OptoBreakpoint && is_method_compilation())
85 ||(OptoBreakpointOSR && is_osr_compilation())
86 ||(OptoBreakpointC2R && !_method)
87 #endif
88 ) {
89 // checking for _method means that OptoBreakpoint does not apply to
90 // runtime stubs or frame converters
91 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
92 }
94 // Insert epilogs before every return
95 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
96 Block *b = _cfg->_blocks[i];
97 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
98 Node *m = b->end();
99 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
100 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
101 b->add_inst( epilog );
102 bbs.map(epilog->_idx, b);
103 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
104 }
105 }
106 }
108 # ifdef ENABLE_ZAP_DEAD_LOCALS
109 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
110 # endif
112 ScheduleAndBundle();
114 #ifndef PRODUCT
115 if (trace_opto_output()) {
116 tty->print("\n---- After ScheduleAndBundle ----\n");
117 for (uint i = 0; i < _cfg->_num_blocks; i++) {
118 tty->print("\nBB#%03d:\n", i);
119 Block *bb = _cfg->_blocks[i];
120 for (uint j = 0; j < bb->_nodes.size(); j++) {
121 Node *n = bb->_nodes[j];
122 OptoReg::Name reg = _regalloc->get_reg_first(n);
123 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
124 n->dump();
125 }
126 }
127 }
128 #endif
130 if (failing()) return;
132 BuildOopMaps();
134 if (failing()) return;
136 Fill_buffer();
137 }
139 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
140 // Determine if we need to generate a stack overflow check.
141 // Do it if the method is not a stub function and
142 // has java calls or has frame size > vm_page_size/8.
143 return (stub_function() == NULL &&
144 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
145 }
147 bool Compile::need_register_stack_bang() const {
148 // Determine if we need to generate a register stack overflow check.
149 // This is only used on architectures which have split register
150 // and memory stacks (ie. IA64).
151 // Bang if the method is not a stub function and has java calls
152 return (stub_function() == NULL && has_java_calls());
153 }
155 # ifdef ENABLE_ZAP_DEAD_LOCALS
158 // In order to catch compiler oop-map bugs, we have implemented
159 // a debugging mode called ZapDeadCompilerLocals.
160 // This mode causes the compiler to insert a call to a runtime routine,
161 // "zap_dead_locals", right before each place in compiled code
162 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
163 // The runtime routine checks that locations mapped as oops are really
164 // oops, that locations mapped as values do not look like oops,
165 // and that locations mapped as dead are not used later
166 // (by zapping them to an invalid address).
168 int Compile::_CompiledZap_count = 0;
170 void Compile::Insert_zap_nodes() {
171 bool skip = false;
174 // Dink with static counts because code code without the extra
175 // runtime calls is MUCH faster for debugging purposes
177 if ( CompileZapFirst == 0 ) ; // nothing special
178 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
179 else if ( CompileZapFirst == CompiledZap_count() )
180 warning("starting zap compilation after skipping");
182 if ( CompileZapLast == -1 ) ; // nothing special
183 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
184 else if ( CompileZapLast == CompiledZap_count() )
185 warning("about to compile last zap");
187 ++_CompiledZap_count; // counts skipped zaps, too
189 if ( skip ) return;
192 if ( _method == NULL )
193 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
195 // Insert call to zap runtime stub before every node with an oop map
196 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
197 Block *b = _cfg->_blocks[i];
198 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
199 Node *n = b->_nodes[j];
201 // Determining if we should insert a zap-a-lot node in output.
202 // We do that for all nodes that has oopmap info, except for calls
203 // to allocation. Calls to allocation passes in the old top-of-eden pointer
204 // and expect the C code to reset it. Hence, there can be no safepoints between
205 // the inlined-allocation and the call to new_Java, etc.
206 // We also cannot zap monitor calls, as they must hold the microlock
207 // during the call to Zap, which also wants to grab the microlock.
208 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
209 if ( insert ) { // it is MachSafePoint
210 if ( !n->is_MachCall() ) {
211 insert = false;
212 } else if ( n->is_MachCall() ) {
213 MachCallNode* call = n->as_MachCall();
214 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
215 call->entry_point() == OptoRuntime::new_array_Java() ||
216 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
217 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
218 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
219 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
220 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
221 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
222 ) {
223 insert = false;
224 }
225 }
226 if (insert) {
227 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
228 b->_nodes.insert( j, zap );
229 _cfg->_bbs.map( zap->_idx, b );
230 ++j;
231 }
232 }
233 }
234 }
235 }
238 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
239 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
240 CallStaticJavaNode* ideal_node =
241 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
242 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
243 "call zap dead locals stub", 0, TypePtr::BOTTOM);
244 // We need to copy the OopMap from the site we're zapping at.
245 // We have to make a copy, because the zap site might not be
246 // a call site, and zap_dead is a call site.
247 OopMap* clone = node_to_check->oop_map()->deep_copy();
249 // Add the cloned OopMap to the zap node
250 ideal_node->set_oop_map(clone);
251 return _matcher->match_sfpt(ideal_node);
252 }
254 //------------------------------is_node_getting_a_safepoint--------------------
255 bool Compile::is_node_getting_a_safepoint( Node* n) {
256 // This code duplicates the logic prior to the call of add_safepoint
257 // below in this file.
258 if( n->is_MachSafePoint() ) return true;
259 return false;
260 }
262 # endif // ENABLE_ZAP_DEAD_LOCALS
264 //------------------------------compute_loop_first_inst_sizes------------------
265 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
266 // of a loop. When aligning a loop we need to provide enough instructions
267 // in cpu's fetch buffer to feed decoders. The loop alignment could be
268 // avoided if we have enough instructions in fetch buffer at the head of a loop.
269 // By default, the size is set to 999999 by Block's constructor so that
270 // a loop will be aligned if the size is not reset here.
271 //
272 // Note: Mach instructions could contain several HW instructions
273 // so the size is estimated only.
274 //
275 void Compile::compute_loop_first_inst_sizes() {
276 // The next condition is used to gate the loop alignment optimization.
277 // Don't aligned a loop if there are enough instructions at the head of a loop
278 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
279 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
280 // equal to 11 bytes which is the largest address NOP instruction.
281 if( MaxLoopPad < OptoLoopAlignment-1 ) {
282 uint last_block = _cfg->_num_blocks-1;
283 for( uint i=1; i <= last_block; i++ ) {
284 Block *b = _cfg->_blocks[i];
285 // Check the first loop's block which requires an alignment.
286 if( b->head()->is_Loop() &&
287 b->code_alignment() > (uint)relocInfo::addr_unit() ) {
288 uint sum_size = 0;
289 uint inst_cnt = NumberOfLoopInstrToAlign;
290 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt,
291 _regalloc);
292 // Check the next fallthrough block if first loop's block does not have
293 // enough instructions.
294 if( inst_cnt > 0 && i < last_block ) {
295 // First, check if the first loop's block contains whole loop.
296 // LoopNode::LoopBackControl == 2.
297 Block *bx = _cfg->_bbs[b->pred(2)->_idx];
298 // Skip connector blocks (with limit in case of irreducible loops).
299 int search_limit = 16;
300 while( bx->is_connector() && search_limit-- > 0) {
301 bx = _cfg->_bbs[bx->pred(1)->_idx];
302 }
303 if( bx != b ) { // loop body is in several blocks.
304 Block *nb = NULL;
305 while( inst_cnt > 0 && i < last_block && nb != bx &&
306 !_cfg->_blocks[i+1]->head()->is_Loop() ) {
307 i++;
308 nb = _cfg->_blocks[i];
309 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt,
310 _regalloc);
311 } // while( inst_cnt > 0 && i < last_block )
312 } // if( bx != b )
313 } // if( inst_cnt > 0 && i < last_block )
314 b->set_first_inst_size(sum_size);
315 } // f( b->head()->is_Loop() )
316 } // for( i <= last_block )
317 } // if( MaxLoopPad < OptoLoopAlignment-1 )
318 }
320 //----------------------Shorten_branches---------------------------------------
321 // The architecture description provides short branch variants for some long
322 // branch instructions. Replace eligible long branches with short branches.
323 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
325 // fill in the nop array for bundling computations
326 MachNode *_nop_list[Bundle::_nop_count];
327 Bundle::initialize_nops(_nop_list, this);
329 // ------------------
330 // Compute size of each block, method size, and relocation information size
331 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
332 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
333 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
334 blk_starts[0] = 0;
336 // Initialize the sizes to 0
337 code_size = 0; // Size in bytes of generated code
338 stub_size = 0; // Size in bytes of all stub entries
339 // Size in bytes of all relocation entries, including those in local stubs.
340 // Start with 2-bytes of reloc info for the unvalidated entry point
341 reloc_size = 1; // Number of relocation entries
342 const_size = 0; // size of fp constants in words
344 // Make three passes. The first computes pessimistic blk_starts,
345 // relative jmp_end, reloc_size and const_size information.
346 // The second performs short branch substitution using the pessimistic
347 // sizing. The third inserts nops where needed.
349 Node *nj; // tmp
351 // Step one, perform a pessimistic sizing pass.
352 uint i;
353 uint min_offset_from_last_call = 1; // init to a positive value
354 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
355 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
356 Block *b = _cfg->_blocks[i];
358 // Sum all instruction sizes to compute block size
359 uint last_inst = b->_nodes.size();
360 uint blk_size = 0;
361 for( uint j = 0; j<last_inst; j++ ) {
362 nj = b->_nodes[j];
363 uint inst_size = nj->size(_regalloc);
364 blk_size += inst_size;
365 // Handle machine instruction nodes
366 if( nj->is_Mach() ) {
367 MachNode *mach = nj->as_Mach();
368 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
369 reloc_size += mach->reloc();
370 const_size += mach->const_size();
371 if( mach->is_MachCall() ) {
372 MachCallNode *mcall = mach->as_MachCall();
373 // This destination address is NOT PC-relative
375 mcall->method_set((intptr_t)mcall->entry_point());
377 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
378 stub_size += size_java_to_interp();
379 reloc_size += reloc_java_to_interp();
380 }
381 } else if (mach->is_MachSafePoint()) {
382 // If call/safepoint are adjacent, account for possible
383 // nop to disambiguate the two safepoints.
384 if (min_offset_from_last_call == 0) {
385 blk_size += nop_size;
386 }
387 }
388 }
389 min_offset_from_last_call += inst_size;
390 // Remember end of call offset
391 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
392 min_offset_from_last_call = 0;
393 }
394 }
396 // During short branch replacement, we store the relative (to blk_starts)
397 // end of jump in jmp_end, rather than the absolute end of jump. This
398 // is so that we do not need to recompute sizes of all nodes when we compute
399 // correct blk_starts in our next sizing pass.
400 jmp_end[i] = blk_size;
401 DEBUG_ONLY( jmp_target[i] = 0; )
403 // When the next block starts a loop, we may insert pad NOP
404 // instructions. Since we cannot know our future alignment,
405 // assume the worst.
406 if( i<_cfg->_num_blocks-1 ) {
407 Block *nb = _cfg->_blocks[i+1];
408 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
409 if( max_loop_pad > 0 ) {
410 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
411 blk_size += max_loop_pad;
412 }
413 }
415 // Save block size; update total method size
416 blk_starts[i+1] = blk_starts[i]+blk_size;
417 }
419 // Step two, replace eligible long jumps.
421 // Note: this will only get the long branches within short branch
422 // range. Another pass might detect more branches that became
423 // candidates because the shortening in the first pass exposed
424 // more opportunities. Unfortunately, this would require
425 // recomputing the starting and ending positions for the blocks
426 for( i=0; i<_cfg->_num_blocks; i++ ) {
427 Block *b = _cfg->_blocks[i];
429 int j;
430 // Find the branch; ignore trailing NOPs.
431 for( j = b->_nodes.size()-1; j>=0; j-- ) {
432 nj = b->_nodes[j];
433 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
434 break;
435 }
437 if (j >= 0) {
438 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
439 MachNode *mach = nj->as_Mach();
440 // This requires the TRUE branch target be in succs[0]
441 uint bnum = b->non_connector_successor(0)->_pre_order;
442 uintptr_t target = blk_starts[bnum];
443 if( mach->is_pc_relative() ) {
444 int offset = target-(blk_starts[i] + jmp_end[i]);
445 if (_matcher->is_short_branch_offset(offset)) {
446 // We've got a winner. Replace this branch.
447 MachNode *replacement = mach->short_branch_version(this);
448 b->_nodes.map(j, replacement);
450 // Update the jmp_end size to save time in our
451 // next pass.
452 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
453 DEBUG_ONLY( jmp_target[i] = bnum; );
454 }
455 } else {
456 #ifndef PRODUCT
457 mach->dump(3);
458 #endif
459 Unimplemented();
460 }
461 }
462 }
463 }
465 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
466 // of a loop. It is used to determine the padding for loop alignment.
467 compute_loop_first_inst_sizes();
469 // Step 3, compute the offsets of all the labels
470 uint last_call_adr = max_uint;
471 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
472 // copy the offset of the beginning to the corresponding label
473 assert(labels[i].is_unused(), "cannot patch at this point");
474 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
476 // insert padding for any instructions that need it
477 Block *b = _cfg->_blocks[i];
478 uint last_inst = b->_nodes.size();
479 uint adr = blk_starts[i];
480 for( uint j = 0; j<last_inst; j++ ) {
481 nj = b->_nodes[j];
482 if( nj->is_Mach() ) {
483 int padding = nj->as_Mach()->compute_padding(adr);
484 // If call/safepoint are adjacent insert a nop (5010568)
485 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
486 adr == last_call_adr ) {
487 padding = nop_size;
488 }
489 if(padding > 0) {
490 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
491 int nops_cnt = padding / nop_size;
492 MachNode *nop = new (this) MachNopNode(nops_cnt);
493 b->_nodes.insert(j++, nop);
494 _cfg->_bbs.map( nop->_idx, b );
495 adr += padding;
496 last_inst++;
497 }
498 }
499 adr += nj->size(_regalloc);
501 // Remember end of call offset
502 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
503 last_call_adr = adr;
504 }
505 }
507 if ( i != _cfg->_num_blocks-1) {
508 // Get the size of the block
509 uint blk_size = adr - blk_starts[i];
511 // When the next block starts a loop, we may insert pad NOP
512 // instructions.
513 Block *nb = _cfg->_blocks[i+1];
514 int current_offset = blk_starts[i] + blk_size;
515 current_offset += nb->alignment_padding(current_offset);
516 // Save block size; update total method size
517 blk_starts[i+1] = current_offset;
518 }
519 }
521 #ifdef ASSERT
522 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
523 if( jmp_target[i] != 0 ) {
524 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
525 if (!_matcher->is_short_branch_offset(offset)) {
526 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
527 }
528 assert(_matcher->is_short_branch_offset(offset), "Displacement too large for short jmp");
529 }
530 }
531 #endif
533 // ------------------
534 // Compute size for code buffer
535 code_size = blk_starts[i-1] + jmp_end[i-1];
537 // Relocation records
538 reloc_size += 1; // Relo entry for exception handler
540 // Adjust reloc_size to number of record of relocation info
541 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
542 // a relocation index.
543 // The CodeBuffer will expand the locs array if this estimate is too low.
544 reloc_size *= 10 / sizeof(relocInfo);
546 // Adjust const_size to number of bytes
547 const_size *= 2*jintSize; // both float and double take two words per entry
549 }
551 //------------------------------FillLocArray-----------------------------------
552 // Create a bit of debug info and append it to the array. The mapping is from
553 // Java local or expression stack to constant, register or stack-slot. For
554 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
555 // entry has been taken care of and caller should skip it).
556 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
557 // This should never have accepted Bad before
558 assert(OptoReg::is_valid(regnum), "location must be valid");
559 return (OptoReg::is_reg(regnum))
560 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
561 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
562 }
565 ObjectValue*
566 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
567 for (int i = 0; i < objs->length(); i++) {
568 assert(objs->at(i)->is_object(), "corrupt object cache");
569 ObjectValue* sv = (ObjectValue*) objs->at(i);
570 if (sv->id() == id) {
571 return sv;
572 }
573 }
574 // Otherwise..
575 return NULL;
576 }
578 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
579 ObjectValue* sv ) {
580 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
581 objs->append(sv);
582 }
585 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
586 GrowableArray<ScopeValue*> *array,
587 GrowableArray<ScopeValue*> *objs ) {
588 assert( local, "use _top instead of null" );
589 if (array->length() != idx) {
590 assert(array->length() == idx + 1, "Unexpected array count");
591 // Old functionality:
592 // return
593 // New functionality:
594 // Assert if the local is not top. In product mode let the new node
595 // override the old entry.
596 assert(local == top(), "LocArray collision");
597 if (local == top()) {
598 return;
599 }
600 array->pop();
601 }
602 const Type *t = local->bottom_type();
604 // Is it a safepoint scalar object node?
605 if (local->is_SafePointScalarObject()) {
606 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
608 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
609 if (sv == NULL) {
610 ciKlass* cik = t->is_oopptr()->klass();
611 assert(cik->is_instance_klass() ||
612 cik->is_array_klass(), "Not supported allocation.");
613 sv = new ObjectValue(spobj->_idx,
614 new ConstantOopWriteValue(cik->encoding()));
615 Compile::set_sv_for_object_node(objs, sv);
617 uint first_ind = spobj->first_index();
618 for (uint i = 0; i < spobj->n_fields(); i++) {
619 Node* fld_node = sfpt->in(first_ind+i);
620 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
621 }
622 }
623 array->append(sv);
624 return;
625 }
627 // Grab the register number for the local
628 OptoReg::Name regnum = _regalloc->get_reg_first(local);
629 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
630 // Record the double as two float registers.
631 // The register mask for such a value always specifies two adjacent
632 // float registers, with the lower register number even.
633 // Normally, the allocation of high and low words to these registers
634 // is irrelevant, because nearly all operations on register pairs
635 // (e.g., StoreD) treat them as a single unit.
636 // Here, we assume in addition that the words in these two registers
637 // stored "naturally" (by operations like StoreD and double stores
638 // within the interpreter) such that the lower-numbered register
639 // is written to the lower memory address. This may seem like
640 // a machine dependency, but it is not--it is a requirement on
641 // the author of the <arch>.ad file to ensure that, for every
642 // even/odd double-register pair to which a double may be allocated,
643 // the word in the even single-register is stored to the first
644 // memory word. (Note that register numbers are completely
645 // arbitrary, and are not tied to any machine-level encodings.)
646 #ifdef _LP64
647 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
648 array->append(new ConstantIntValue(0));
649 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
650 } else if ( t->base() == Type::Long ) {
651 array->append(new ConstantIntValue(0));
652 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
653 } else if ( t->base() == Type::RawPtr ) {
654 // jsr/ret return address which must be restored into a the full
655 // width 64-bit stack slot.
656 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
657 }
658 #else //_LP64
659 #ifdef SPARC
660 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
661 // For SPARC we have to swap high and low words for
662 // long values stored in a single-register (g0-g7).
663 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
664 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
665 } else
666 #endif //SPARC
667 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
668 // Repack the double/long as two jints.
669 // The convention the interpreter uses is that the second local
670 // holds the first raw word of the native double representation.
671 // This is actually reasonable, since locals and stack arrays
672 // grow downwards in all implementations.
673 // (If, on some machine, the interpreter's Java locals or stack
674 // were to grow upwards, the embedded doubles would be word-swapped.)
675 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
676 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
677 }
678 #endif //_LP64
679 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
680 OptoReg::is_reg(regnum) ) {
681 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
682 ? Location::float_in_dbl : Location::normal ));
683 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
684 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
685 ? Location::int_in_long : Location::normal ));
686 } else {
687 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
688 }
689 return;
690 }
692 // No register. It must be constant data.
693 switch (t->base()) {
694 case Type::Half: // Second half of a double
695 ShouldNotReachHere(); // Caller should skip 2nd halves
696 break;
697 case Type::AnyPtr:
698 array->append(new ConstantOopWriteValue(NULL));
699 break;
700 case Type::AryPtr:
701 case Type::InstPtr:
702 case Type::KlassPtr: // fall through
703 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->encoding()));
704 break;
705 case Type::Int:
706 array->append(new ConstantIntValue(t->is_int()->get_con()));
707 break;
708 case Type::RawPtr:
709 // A return address (T_ADDRESS).
710 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
711 #ifdef _LP64
712 // Must be restored to the full-width 64-bit stack slot.
713 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
714 #else
715 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
716 #endif
717 break;
718 case Type::FloatCon: {
719 float f = t->is_float_constant()->getf();
720 array->append(new ConstantIntValue(jint_cast(f)));
721 break;
722 }
723 case Type::DoubleCon: {
724 jdouble d = t->is_double_constant()->getd();
725 #ifdef _LP64
726 array->append(new ConstantIntValue(0));
727 array->append(new ConstantDoubleValue(d));
728 #else
729 // Repack the double as two jints.
730 // The convention the interpreter uses is that the second local
731 // holds the first raw word of the native double representation.
732 // This is actually reasonable, since locals and stack arrays
733 // grow downwards in all implementations.
734 // (If, on some machine, the interpreter's Java locals or stack
735 // were to grow upwards, the embedded doubles would be word-swapped.)
736 jint *dp = (jint*)&d;
737 array->append(new ConstantIntValue(dp[1]));
738 array->append(new ConstantIntValue(dp[0]));
739 #endif
740 break;
741 }
742 case Type::Long: {
743 jlong d = t->is_long()->get_con();
744 #ifdef _LP64
745 array->append(new ConstantIntValue(0));
746 array->append(new ConstantLongValue(d));
747 #else
748 // Repack the long as two jints.
749 // The convention the interpreter uses is that the second local
750 // holds the first raw word of the native double representation.
751 // This is actually reasonable, since locals and stack arrays
752 // grow downwards in all implementations.
753 // (If, on some machine, the interpreter's Java locals or stack
754 // were to grow upwards, the embedded doubles would be word-swapped.)
755 jint *dp = (jint*)&d;
756 array->append(new ConstantIntValue(dp[1]));
757 array->append(new ConstantIntValue(dp[0]));
758 #endif
759 break;
760 }
761 case Type::Top: // Add an illegal value here
762 array->append(new LocationValue(Location()));
763 break;
764 default:
765 ShouldNotReachHere();
766 break;
767 }
768 }
770 // Determine if this node starts a bundle
771 bool Compile::starts_bundle(const Node *n) const {
772 return (_node_bundling_limit > n->_idx &&
773 _node_bundling_base[n->_idx].starts_bundle());
774 }
776 //--------------------------Process_OopMap_Node--------------------------------
777 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
779 // Handle special safepoint nodes for synchronization
780 MachSafePointNode *sfn = mach->as_MachSafePoint();
781 MachCallNode *mcall;
783 #ifdef ENABLE_ZAP_DEAD_LOCALS
784 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
785 #endif
787 int safepoint_pc_offset = current_offset;
789 // Add the safepoint in the DebugInfoRecorder
790 if( !mach->is_MachCall() ) {
791 mcall = NULL;
792 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
793 } else {
794 mcall = mach->as_MachCall();
795 safepoint_pc_offset += mcall->ret_addr_offset();
796 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
797 }
799 // Loop over the JVMState list to add scope information
800 // Do not skip safepoints with a NULL method, they need monitor info
801 JVMState* youngest_jvms = sfn->jvms();
802 int max_depth = youngest_jvms->depth();
804 // Allocate the object pool for scalar-replaced objects -- the map from
805 // small-integer keys (which can be recorded in the local and ostack
806 // arrays) to descriptions of the object state.
807 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
809 // Visit scopes from oldest to youngest.
810 for (int depth = 1; depth <= max_depth; depth++) {
811 JVMState* jvms = youngest_jvms->of_depth(depth);
812 int idx;
813 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
814 // Safepoints that do not have method() set only provide oop-map and monitor info
815 // to support GC; these do not support deoptimization.
816 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
817 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
818 int num_mon = jvms->nof_monitors();
819 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
820 "JVMS local count must match that of the method");
822 // Add Local and Expression Stack Information
824 // Insert locals into the locarray
825 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
826 for( idx = 0; idx < num_locs; idx++ ) {
827 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
828 }
830 // Insert expression stack entries into the exparray
831 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
832 for( idx = 0; idx < num_exps; idx++ ) {
833 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
834 }
836 // Add in mappings of the monitors
837 assert( !method ||
838 !method->is_synchronized() ||
839 method->is_native() ||
840 num_mon > 0 ||
841 !GenerateSynchronizationCode,
842 "monitors must always exist for synchronized methods");
844 // Build the growable array of ScopeValues for exp stack
845 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
847 // Loop over monitors and insert into array
848 for(idx = 0; idx < num_mon; idx++) {
849 // Grab the node that defines this monitor
850 Node* box_node;
851 Node* obj_node;
852 box_node = sfn->monitor_box(jvms, idx);
853 obj_node = sfn->monitor_obj(jvms, idx);
855 // Create ScopeValue for object
856 ScopeValue *scval = NULL;
858 if( obj_node->is_SafePointScalarObject() ) {
859 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
860 scval = Compile::sv_for_node_id(objs, spobj->_idx);
861 if (scval == NULL) {
862 const Type *t = obj_node->bottom_type();
863 ciKlass* cik = t->is_oopptr()->klass();
864 assert(cik->is_instance_klass() ||
865 cik->is_array_klass(), "Not supported allocation.");
866 ObjectValue* sv = new ObjectValue(spobj->_idx,
867 new ConstantOopWriteValue(cik->encoding()));
868 Compile::set_sv_for_object_node(objs, sv);
870 uint first_ind = spobj->first_index();
871 for (uint i = 0; i < spobj->n_fields(); i++) {
872 Node* fld_node = sfn->in(first_ind+i);
873 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
874 }
875 scval = sv;
876 }
877 } else if( !obj_node->is_Con() ) {
878 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
879 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
880 } else {
881 scval = new ConstantOopWriteValue(obj_node->bottom_type()->is_instptr()->const_oop()->encoding());
882 }
884 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
885 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
886 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
887 }
889 // We dump the object pool first, since deoptimization reads it in first.
890 debug_info()->dump_object_pool(objs);
892 // Build first class objects to pass to scope
893 DebugToken *locvals = debug_info()->create_scope_values(locarray);
894 DebugToken *expvals = debug_info()->create_scope_values(exparray);
895 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
897 // Make method available for all Safepoints
898 ciMethod* scope_method = method ? method : _method;
899 // Describe the scope here
900 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
901 // Now we can describe the scope.
902 debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),locvals,expvals,monvals);
903 } // End jvms loop
905 // Mark the end of the scope set.
906 debug_info()->end_safepoint(safepoint_pc_offset);
907 }
911 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
912 class NonSafepointEmitter {
913 Compile* C;
914 JVMState* _pending_jvms;
915 int _pending_offset;
917 void emit_non_safepoint();
919 public:
920 NonSafepointEmitter(Compile* compile) {
921 this->C = compile;
922 _pending_jvms = NULL;
923 _pending_offset = 0;
924 }
926 void observe_instruction(Node* n, int pc_offset) {
927 if (!C->debug_info()->recording_non_safepoints()) return;
929 Node_Notes* nn = C->node_notes_at(n->_idx);
930 if (nn == NULL || nn->jvms() == NULL) return;
931 if (_pending_jvms != NULL &&
932 _pending_jvms->same_calls_as(nn->jvms())) {
933 // Repeated JVMS? Stretch it up here.
934 _pending_offset = pc_offset;
935 } else {
936 if (_pending_jvms != NULL &&
937 _pending_offset < pc_offset) {
938 emit_non_safepoint();
939 }
940 _pending_jvms = NULL;
941 if (pc_offset > C->debug_info()->last_pc_offset()) {
942 // This is the only way _pending_jvms can become non-NULL:
943 _pending_jvms = nn->jvms();
944 _pending_offset = pc_offset;
945 }
946 }
947 }
949 // Stay out of the way of real safepoints:
950 void observe_safepoint(JVMState* jvms, int pc_offset) {
951 if (_pending_jvms != NULL &&
952 !_pending_jvms->same_calls_as(jvms) &&
953 _pending_offset < pc_offset) {
954 emit_non_safepoint();
955 }
956 _pending_jvms = NULL;
957 }
959 void flush_at_end() {
960 if (_pending_jvms != NULL) {
961 emit_non_safepoint();
962 }
963 _pending_jvms = NULL;
964 }
965 };
967 void NonSafepointEmitter::emit_non_safepoint() {
968 JVMState* youngest_jvms = _pending_jvms;
969 int pc_offset = _pending_offset;
971 // Clear it now:
972 _pending_jvms = NULL;
974 DebugInformationRecorder* debug_info = C->debug_info();
975 assert(debug_info->recording_non_safepoints(), "sanity");
977 debug_info->add_non_safepoint(pc_offset);
978 int max_depth = youngest_jvms->depth();
980 // Visit scopes from oldest to youngest.
981 for (int depth = 1; depth <= max_depth; depth++) {
982 JVMState* jvms = youngest_jvms->of_depth(depth);
983 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
984 debug_info->describe_scope(pc_offset, method, jvms->bci());
985 }
987 // Mark the end of the scope set.
988 debug_info->end_non_safepoint(pc_offset);
989 }
993 // helper for Fill_buffer bailout logic
994 static void turn_off_compiler(Compile* C) {
995 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
996 // Do not turn off compilation if a single giant method has
997 // blown the code cache size.
998 C->record_failure("excessive request to CodeCache");
999 } else {
1000 // Let CompilerBroker disable further compilations.
1001 C->record_failure("CodeCache is full");
1002 }
1003 }
1006 //------------------------------Fill_buffer------------------------------------
1007 void Compile::Fill_buffer() {
1009 // Set the initially allocated size
1010 int code_req = initial_code_capacity;
1011 int locs_req = initial_locs_capacity;
1012 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1013 int const_req = initial_const_capacity;
1014 bool labels_not_set = true;
1016 int pad_req = NativeCall::instruction_size;
1017 // The extra spacing after the code is necessary on some platforms.
1018 // Sometimes we need to patch in a jump after the last instruction,
1019 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1021 uint i;
1022 // Compute the byte offset where we can store the deopt pc.
1023 if (fixed_slots() != 0) {
1024 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1025 }
1027 // Compute prolog code size
1028 _method_size = 0;
1029 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1030 #ifdef IA64
1031 if (save_argument_registers()) {
1032 // 4815101: this is a stub with implicit and unknown precision fp args.
1033 // The usual spill mechanism can only generate stfd's in this case, which
1034 // doesn't work if the fp reg to spill contains a single-precision denorm.
1035 // Instead, we hack around the normal spill mechanism using stfspill's and
1036 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1037 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1038 //
1039 // If we ever implement 16-byte 'registers' == stack slots, we can
1040 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1041 // instead of stfd/stfs/ldfd/ldfs.
1042 _frame_slots += 8*(16/BytesPerInt);
1043 }
1044 #endif
1045 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1047 // Create an array of unused labels, one for each basic block
1048 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1050 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1051 blk_labels[i].init();
1052 }
1054 // If this machine supports different size branch offsets, then pre-compute
1055 // the length of the blocks
1056 if( _matcher->is_short_branch_offset(0) ) {
1057 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1058 labels_not_set = false;
1059 }
1061 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1062 int exception_handler_req = size_exception_handler();
1063 int deopt_handler_req = size_deopt_handler();
1064 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1065 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1066 stub_req += MAX_stubs_size; // ensure per-stub margin
1067 code_req += MAX_inst_size; // ensure per-instruction margin
1068 if (StressCodeBuffers)
1069 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1070 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1071 CodeBuffer* cb = code_buffer();
1072 cb->initialize(total_req, locs_req);
1074 // Have we run out of code space?
1075 if (cb->blob() == NULL) {
1076 turn_off_compiler(this);
1077 return;
1078 }
1079 // Configure the code buffer.
1080 cb->initialize_consts_size(const_req);
1081 cb->initialize_stubs_size(stub_req);
1082 cb->initialize_oop_recorder(env()->oop_recorder());
1084 // fill in the nop array for bundling computations
1085 MachNode *_nop_list[Bundle::_nop_count];
1086 Bundle::initialize_nops(_nop_list, this);
1088 // Create oopmap set.
1089 _oop_map_set = new OopMapSet();
1091 // !!!!! This preserves old handling of oopmaps for now
1092 debug_info()->set_oopmaps(_oop_map_set);
1094 // Count and start of implicit null check instructions
1095 uint inct_cnt = 0;
1096 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1098 // Count and start of calls
1099 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1101 uint return_offset = 0;
1102 MachNode *nop = new (this) MachNopNode();
1104 int previous_offset = 0;
1105 int current_offset = 0;
1106 int last_call_offset = -1;
1108 // Create an array of unused labels, one for each basic block, if printing is enabled
1109 #ifndef PRODUCT
1110 int *node_offsets = NULL;
1111 uint node_offset_limit = unique();
1114 if ( print_assembly() )
1115 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1116 #endif
1118 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1120 // ------------------
1121 // Now fill in the code buffer
1122 Node *delay_slot = NULL;
1124 for( i=0; i < _cfg->_num_blocks; i++ ) {
1125 Block *b = _cfg->_blocks[i];
1127 Node *head = b->head();
1129 // If this block needs to start aligned (i.e, can be reached other
1130 // than by falling-thru from the previous block), then force the
1131 // start of a new bundle.
1132 if( Pipeline::requires_bundling() && starts_bundle(head) )
1133 cb->flush_bundle(true);
1135 // Define the label at the beginning of the basic block
1136 if( labels_not_set )
1137 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1139 else
1140 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1141 "label position does not match code offset" );
1143 uint last_inst = b->_nodes.size();
1145 // Emit block normally, except for last instruction.
1146 // Emit means "dump code bits into code buffer".
1147 for( uint j = 0; j<last_inst; j++ ) {
1149 // Get the node
1150 Node* n = b->_nodes[j];
1152 // See if delay slots are supported
1153 if (valid_bundle_info(n) &&
1154 node_bundling(n)->used_in_unconditional_delay()) {
1155 assert(delay_slot == NULL, "no use of delay slot node");
1156 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1158 delay_slot = n;
1159 continue;
1160 }
1162 // If this starts a new instruction group, then flush the current one
1163 // (but allow split bundles)
1164 if( Pipeline::requires_bundling() && starts_bundle(n) )
1165 cb->flush_bundle(false);
1167 // The following logic is duplicated in the code ifdeffed for
1168 // ENABLE_ZAP_DEAD_LOCALS which apppears above in this file. It
1169 // should be factored out. Or maybe dispersed to the nodes?
1171 // Special handling for SafePoint/Call Nodes
1172 bool is_mcall = false;
1173 if( n->is_Mach() ) {
1174 MachNode *mach = n->as_Mach();
1175 is_mcall = n->is_MachCall();
1176 bool is_sfn = n->is_MachSafePoint();
1178 // If this requires all previous instructions be flushed, then do so
1179 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1180 cb->flush_bundle(true);
1181 current_offset = cb->code_size();
1182 }
1184 // align the instruction if necessary
1185 int nop_size = nop->size(_regalloc);
1186 int padding = mach->compute_padding(current_offset);
1187 // Make sure safepoint node for polling is distinct from a call's
1188 // return by adding a nop if needed.
1189 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1190 padding = nop_size;
1191 }
1192 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1194 if(padding > 0) {
1195 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1196 int nops_cnt = padding / nop_size;
1197 MachNode *nop = new (this) MachNopNode(nops_cnt);
1198 b->_nodes.insert(j++, nop);
1199 last_inst++;
1200 _cfg->_bbs.map( nop->_idx, b );
1201 nop->emit(*cb, _regalloc);
1202 cb->flush_bundle(true);
1203 current_offset = cb->code_size();
1204 }
1206 // Remember the start of the last call in a basic block
1207 if (is_mcall) {
1208 MachCallNode *mcall = mach->as_MachCall();
1210 // This destination address is NOT PC-relative
1211 mcall->method_set((intptr_t)mcall->entry_point());
1213 // Save the return address
1214 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1216 if (!mcall->is_safepoint_node()) {
1217 is_mcall = false;
1218 is_sfn = false;
1219 }
1220 }
1222 // sfn will be valid whenever mcall is valid now because of inheritance
1223 if( is_sfn || is_mcall ) {
1225 // Handle special safepoint nodes for synchronization
1226 if( !is_mcall ) {
1227 MachSafePointNode *sfn = mach->as_MachSafePoint();
1228 // !!!!! Stubs only need an oopmap right now, so bail out
1229 if( sfn->jvms()->method() == NULL) {
1230 // Write the oopmap directly to the code blob??!!
1231 # ifdef ENABLE_ZAP_DEAD_LOCALS
1232 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1233 # endif
1234 continue;
1235 }
1236 } // End synchronization
1238 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1239 current_offset);
1240 Process_OopMap_Node(mach, current_offset);
1241 } // End if safepoint
1243 // If this is a null check, then add the start of the previous instruction to the list
1244 else if( mach->is_MachNullCheck() ) {
1245 inct_starts[inct_cnt++] = previous_offset;
1246 }
1248 // If this is a branch, then fill in the label with the target BB's label
1249 else if ( mach->is_Branch() ) {
1251 if ( mach->ideal_Opcode() == Op_Jump ) {
1252 for (uint h = 0; h < b->_num_succs; h++ ) {
1253 Block* succs_block = b->_succs[h];
1254 for (uint j = 1; j < succs_block->num_preds(); j++) {
1255 Node* jpn = succs_block->pred(j);
1256 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1257 uint block_num = succs_block->non_connector()->_pre_order;
1258 Label *blkLabel = &blk_labels[block_num];
1259 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1260 }
1261 }
1262 }
1263 } else {
1264 // For Branchs
1265 // This requires the TRUE branch target be in succs[0]
1266 uint block_num = b->non_connector_successor(0)->_pre_order;
1267 mach->label_set( blk_labels[block_num], block_num );
1268 }
1269 }
1271 #ifdef ASSERT
1272 // Check that oop-store preceeds the card-mark
1273 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1274 uint storeCM_idx = j;
1275 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1276 assert( oop_store != NULL, "storeCM expects a precedence edge");
1277 uint i4;
1278 for( i4 = 0; i4 < last_inst; ++i4 ) {
1279 if( b->_nodes[i4] == oop_store ) break;
1280 }
1281 // Note: This test can provide a false failure if other precedence
1282 // edges have been added to the storeCMNode.
1283 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1284 }
1285 #endif
1287 else if( !n->is_Proj() ) {
1288 // Remember the begining of the previous instruction, in case
1289 // it's followed by a flag-kill and a null-check. Happens on
1290 // Intel all the time, with add-to-memory kind of opcodes.
1291 previous_offset = current_offset;
1292 }
1293 }
1295 // Verify that there is sufficient space remaining
1296 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1297 if (cb->blob() == NULL) {
1298 turn_off_compiler(this);
1299 return;
1300 }
1302 // Save the offset for the listing
1303 #ifndef PRODUCT
1304 if( node_offsets && n->_idx < node_offset_limit )
1305 node_offsets[n->_idx] = cb->code_size();
1306 #endif
1308 // "Normal" instruction case
1309 n->emit(*cb, _regalloc);
1310 current_offset = cb->code_size();
1311 non_safepoints.observe_instruction(n, current_offset);
1313 // mcall is last "call" that can be a safepoint
1314 // record it so we can see if a poll will directly follow it
1315 // in which case we'll need a pad to make the PcDesc sites unique
1316 // see 5010568. This can be slightly inaccurate but conservative
1317 // in the case that return address is not actually at current_offset.
1318 // This is a small price to pay.
1320 if (is_mcall) {
1321 last_call_offset = current_offset;
1322 }
1324 // See if this instruction has a delay slot
1325 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1326 assert(delay_slot != NULL, "expecting delay slot node");
1328 // Back up 1 instruction
1329 cb->set_code_end(
1330 cb->code_end()-Pipeline::instr_unit_size());
1332 // Save the offset for the listing
1333 #ifndef PRODUCT
1334 if( node_offsets && delay_slot->_idx < node_offset_limit )
1335 node_offsets[delay_slot->_idx] = cb->code_size();
1336 #endif
1338 // Support a SafePoint in the delay slot
1339 if( delay_slot->is_MachSafePoint() ) {
1340 MachNode *mach = delay_slot->as_Mach();
1341 // !!!!! Stubs only need an oopmap right now, so bail out
1342 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1343 // Write the oopmap directly to the code blob??!!
1344 # ifdef ENABLE_ZAP_DEAD_LOCALS
1345 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1346 # endif
1347 delay_slot = NULL;
1348 continue;
1349 }
1351 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1352 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1353 adjusted_offset);
1354 // Generate an OopMap entry
1355 Process_OopMap_Node(mach, adjusted_offset);
1356 }
1358 // Insert the delay slot instruction
1359 delay_slot->emit(*cb, _regalloc);
1361 // Don't reuse it
1362 delay_slot = NULL;
1363 }
1365 } // End for all instructions in block
1367 // If the next block _starts_ a loop, pad this block out to align
1368 // the loop start a little. Helps prevent pipe stalls at loop starts
1369 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1370 if( i<_cfg->_num_blocks-1 ) {
1371 Block *nb = _cfg->_blocks[i+1];
1372 uint padding = nb->alignment_padding(current_offset);
1373 if( padding > 0 ) {
1374 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1375 b->_nodes.insert( b->_nodes.size(), nop );
1376 _cfg->_bbs.map( nop->_idx, b );
1377 nop->emit(*cb, _regalloc);
1378 current_offset = cb->code_size();
1379 }
1380 }
1382 } // End of for all blocks
1384 non_safepoints.flush_at_end();
1386 // Offset too large?
1387 if (failing()) return;
1389 // Define a pseudo-label at the end of the code
1390 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1392 // Compute the size of the first block
1393 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1395 assert(cb->code_size() < 500000, "method is unreasonably large");
1397 // ------------------
1399 #ifndef PRODUCT
1400 // Information on the size of the method, without the extraneous code
1401 Scheduling::increment_method_size(cb->code_size());
1402 #endif
1404 // ------------------
1405 // Fill in exception table entries.
1406 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1408 // Only java methods have exception handlers and deopt handlers
1409 if (_method) {
1410 // Emit the exception handler code.
1411 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1412 // Emit the deopt handler code.
1413 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1414 }
1416 // One last check for failed CodeBuffer::expand:
1417 if (cb->blob() == NULL) {
1418 turn_off_compiler(this);
1419 return;
1420 }
1422 #ifndef PRODUCT
1423 // Dump the assembly code, including basic-block numbers
1424 if (print_assembly()) {
1425 ttyLocker ttyl; // keep the following output all in one block
1426 if (!VMThread::should_terminate()) { // test this under the tty lock
1427 // This output goes directly to the tty, not the compiler log.
1428 // To enable tools to match it up with the compilation activity,
1429 // be sure to tag this tty output with the compile ID.
1430 if (xtty != NULL) {
1431 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1432 is_osr_compilation() ? " compile_kind='osr'" :
1433 "");
1434 }
1435 if (method() != NULL) {
1436 method()->print_oop();
1437 print_codes();
1438 }
1439 dump_asm(node_offsets, node_offset_limit);
1440 if (xtty != NULL) {
1441 xtty->tail("opto_assembly");
1442 }
1443 }
1444 }
1445 #endif
1447 }
1449 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1450 _inc_table.set_size(cnt);
1452 uint inct_cnt = 0;
1453 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1454 Block *b = _cfg->_blocks[i];
1455 Node *n = NULL;
1456 int j;
1458 // Find the branch; ignore trailing NOPs.
1459 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1460 n = b->_nodes[j];
1461 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1462 break;
1463 }
1465 // If we didn't find anything, continue
1466 if( j < 0 ) continue;
1468 // Compute ExceptionHandlerTable subtable entry and add it
1469 // (skip empty blocks)
1470 if( n->is_Catch() ) {
1472 // Get the offset of the return from the call
1473 uint call_return = call_returns[b->_pre_order];
1474 #ifdef ASSERT
1475 assert( call_return > 0, "no call seen for this basic block" );
1476 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1477 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1478 #endif
1479 // last instruction is a CatchNode, find it's CatchProjNodes
1480 int nof_succs = b->_num_succs;
1481 // allocate space
1482 GrowableArray<intptr_t> handler_bcis(nof_succs);
1483 GrowableArray<intptr_t> handler_pcos(nof_succs);
1484 // iterate through all successors
1485 for (int j = 0; j < nof_succs; j++) {
1486 Block* s = b->_succs[j];
1487 bool found_p = false;
1488 for( uint k = 1; k < s->num_preds(); k++ ) {
1489 Node *pk = s->pred(k);
1490 if( pk->is_CatchProj() && pk->in(0) == n ) {
1491 const CatchProjNode* p = pk->as_CatchProj();
1492 found_p = true;
1493 // add the corresponding handler bci & pco information
1494 if( p->_con != CatchProjNode::fall_through_index ) {
1495 // p leads to an exception handler (and is not fall through)
1496 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1497 // no duplicates, please
1498 if( !handler_bcis.contains(p->handler_bci()) ) {
1499 uint block_num = s->non_connector()->_pre_order;
1500 handler_bcis.append(p->handler_bci());
1501 handler_pcos.append(blk_labels[block_num].loc_pos());
1502 }
1503 }
1504 }
1505 }
1506 assert(found_p, "no matching predecessor found");
1507 // Note: Due to empty block removal, one block may have
1508 // several CatchProj inputs, from the same Catch.
1509 }
1511 // Set the offset of the return from the call
1512 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1513 continue;
1514 }
1516 // Handle implicit null exception table updates
1517 if( n->is_MachNullCheck() ) {
1518 uint block_num = b->non_connector_successor(0)->_pre_order;
1519 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1520 continue;
1521 }
1522 } // End of for all blocks fill in exception table entries
1523 }
1525 // Static Variables
1526 #ifndef PRODUCT
1527 uint Scheduling::_total_nop_size = 0;
1528 uint Scheduling::_total_method_size = 0;
1529 uint Scheduling::_total_branches = 0;
1530 uint Scheduling::_total_unconditional_delays = 0;
1531 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1532 #endif
1534 // Initializer for class Scheduling
1536 Scheduling::Scheduling(Arena *arena, Compile &compile)
1537 : _arena(arena),
1538 _cfg(compile.cfg()),
1539 _bbs(compile.cfg()->_bbs),
1540 _regalloc(compile.regalloc()),
1541 _reg_node(arena),
1542 _bundle_instr_count(0),
1543 _bundle_cycle_number(0),
1544 _scheduled(arena),
1545 _available(arena),
1546 _next_node(NULL),
1547 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1548 _pinch_free_list(arena)
1549 #ifndef PRODUCT
1550 , _branches(0)
1551 , _unconditional_delays(0)
1552 #endif
1553 {
1554 // Create a MachNopNode
1555 _nop = new (&compile) MachNopNode();
1557 // Now that the nops are in the array, save the count
1558 // (but allow entries for the nops)
1559 _node_bundling_limit = compile.unique();
1560 uint node_max = _regalloc->node_regs_max_index();
1562 compile.set_node_bundling_limit(_node_bundling_limit);
1564 // This one is persistant within the Compile class
1565 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1567 // Allocate space for fixed-size arrays
1568 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1569 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1570 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1572 // Clear the arrays
1573 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1574 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1575 memset(_uses, 0, node_max * sizeof(short));
1576 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1578 // Clear the bundling information
1579 memcpy(_bundle_use_elements,
1580 Pipeline_Use::elaborated_elements,
1581 sizeof(Pipeline_Use::elaborated_elements));
1583 // Get the last node
1584 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1586 _next_node = bb->_nodes[bb->_nodes.size()-1];
1587 }
1589 #ifndef PRODUCT
1590 // Scheduling destructor
1591 Scheduling::~Scheduling() {
1592 _total_branches += _branches;
1593 _total_unconditional_delays += _unconditional_delays;
1594 }
1595 #endif
1597 // Step ahead "i" cycles
1598 void Scheduling::step(uint i) {
1600 Bundle *bundle = node_bundling(_next_node);
1601 bundle->set_starts_bundle();
1603 // Update the bundle record, but leave the flags information alone
1604 if (_bundle_instr_count > 0) {
1605 bundle->set_instr_count(_bundle_instr_count);
1606 bundle->set_resources_used(_bundle_use.resourcesUsed());
1607 }
1609 // Update the state information
1610 _bundle_instr_count = 0;
1611 _bundle_cycle_number += i;
1612 _bundle_use.step(i);
1613 }
1615 void Scheduling::step_and_clear() {
1616 Bundle *bundle = node_bundling(_next_node);
1617 bundle->set_starts_bundle();
1619 // Update the bundle record
1620 if (_bundle_instr_count > 0) {
1621 bundle->set_instr_count(_bundle_instr_count);
1622 bundle->set_resources_used(_bundle_use.resourcesUsed());
1624 _bundle_cycle_number += 1;
1625 }
1627 // Clear the bundling information
1628 _bundle_instr_count = 0;
1629 _bundle_use.reset();
1631 memcpy(_bundle_use_elements,
1632 Pipeline_Use::elaborated_elements,
1633 sizeof(Pipeline_Use::elaborated_elements));
1634 }
1636 //------------------------------ScheduleAndBundle------------------------------
1637 // Perform instruction scheduling and bundling over the sequence of
1638 // instructions in backwards order.
1639 void Compile::ScheduleAndBundle() {
1641 // Don't optimize this if it isn't a method
1642 if (!_method)
1643 return;
1645 // Don't optimize this if scheduling is disabled
1646 if (!do_scheduling())
1647 return;
1649 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1651 // Create a data structure for all the scheduling information
1652 Scheduling scheduling(Thread::current()->resource_area(), *this);
1654 // Walk backwards over each basic block, computing the needed alignment
1655 // Walk over all the basic blocks
1656 scheduling.DoScheduling();
1657 }
1659 //------------------------------ComputeLocalLatenciesForward-------------------
1660 // Compute the latency of all the instructions. This is fairly simple,
1661 // because we already have a legal ordering. Walk over the instructions
1662 // from first to last, and compute the latency of the instruction based
1663 // on the latency of the preceeding instruction(s).
1664 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1665 #ifndef PRODUCT
1666 if (_cfg->C->trace_opto_output())
1667 tty->print("# -> ComputeLocalLatenciesForward\n");
1668 #endif
1670 // Walk over all the schedulable instructions
1671 for( uint j=_bb_start; j < _bb_end; j++ ) {
1673 // This is a kludge, forcing all latency calculations to start at 1.
1674 // Used to allow latency 0 to force an instruction to the beginning
1675 // of the bb
1676 uint latency = 1;
1677 Node *use = bb->_nodes[j];
1678 uint nlen = use->len();
1680 // Walk over all the inputs
1681 for ( uint k=0; k < nlen; k++ ) {
1682 Node *def = use->in(k);
1683 if (!def)
1684 continue;
1686 uint l = _node_latency[def->_idx] + use->latency(k);
1687 if (latency < l)
1688 latency = l;
1689 }
1691 _node_latency[use->_idx] = latency;
1693 #ifndef PRODUCT
1694 if (_cfg->C->trace_opto_output()) {
1695 tty->print("# latency %4d: ", latency);
1696 use->dump();
1697 }
1698 #endif
1699 }
1701 #ifndef PRODUCT
1702 if (_cfg->C->trace_opto_output())
1703 tty->print("# <- ComputeLocalLatenciesForward\n");
1704 #endif
1706 } // end ComputeLocalLatenciesForward
1708 // See if this node fits into the present instruction bundle
1709 bool Scheduling::NodeFitsInBundle(Node *n) {
1710 uint n_idx = n->_idx;
1712 // If this is the unconditional delay instruction, then it fits
1713 if (n == _unconditional_delay_slot) {
1714 #ifndef PRODUCT
1715 if (_cfg->C->trace_opto_output())
1716 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1717 #endif
1718 return (true);
1719 }
1721 // If the node cannot be scheduled this cycle, skip it
1722 if (_current_latency[n_idx] > _bundle_cycle_number) {
1723 #ifndef PRODUCT
1724 if (_cfg->C->trace_opto_output())
1725 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1726 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1727 #endif
1728 return (false);
1729 }
1731 const Pipeline *node_pipeline = n->pipeline();
1733 uint instruction_count = node_pipeline->instructionCount();
1734 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1735 instruction_count = 0;
1736 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1737 instruction_count++;
1739 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1740 #ifndef PRODUCT
1741 if (_cfg->C->trace_opto_output())
1742 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1743 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1744 #endif
1745 return (false);
1746 }
1748 // Don't allow non-machine nodes to be handled this way
1749 if (!n->is_Mach() && instruction_count == 0)
1750 return (false);
1752 // See if there is any overlap
1753 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1755 if (delay > 0) {
1756 #ifndef PRODUCT
1757 if (_cfg->C->trace_opto_output())
1758 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1759 #endif
1760 return false;
1761 }
1763 #ifndef PRODUCT
1764 if (_cfg->C->trace_opto_output())
1765 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1766 #endif
1768 return true;
1769 }
1771 Node * Scheduling::ChooseNodeToBundle() {
1772 uint siz = _available.size();
1774 if (siz == 0) {
1776 #ifndef PRODUCT
1777 if (_cfg->C->trace_opto_output())
1778 tty->print("# ChooseNodeToBundle: NULL\n");
1779 #endif
1780 return (NULL);
1781 }
1783 // Fast path, if only 1 instruction in the bundle
1784 if (siz == 1) {
1785 #ifndef PRODUCT
1786 if (_cfg->C->trace_opto_output()) {
1787 tty->print("# ChooseNodeToBundle (only 1): ");
1788 _available[0]->dump();
1789 }
1790 #endif
1791 return (_available[0]);
1792 }
1794 // Don't bother, if the bundle is already full
1795 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1796 for ( uint i = 0; i < siz; i++ ) {
1797 Node *n = _available[i];
1799 // Skip projections, we'll handle them another way
1800 if (n->is_Proj())
1801 continue;
1803 // This presupposed that instructions are inserted into the
1804 // available list in a legality order; i.e. instructions that
1805 // must be inserted first are at the head of the list
1806 if (NodeFitsInBundle(n)) {
1807 #ifndef PRODUCT
1808 if (_cfg->C->trace_opto_output()) {
1809 tty->print("# ChooseNodeToBundle: ");
1810 n->dump();
1811 }
1812 #endif
1813 return (n);
1814 }
1815 }
1816 }
1818 // Nothing fits in this bundle, choose the highest priority
1819 #ifndef PRODUCT
1820 if (_cfg->C->trace_opto_output()) {
1821 tty->print("# ChooseNodeToBundle: ");
1822 _available[0]->dump();
1823 }
1824 #endif
1826 return _available[0];
1827 }
1829 //------------------------------AddNodeToAvailableList-------------------------
1830 void Scheduling::AddNodeToAvailableList(Node *n) {
1831 assert( !n->is_Proj(), "projections never directly made available" );
1832 #ifndef PRODUCT
1833 if (_cfg->C->trace_opto_output()) {
1834 tty->print("# AddNodeToAvailableList: ");
1835 n->dump();
1836 }
1837 #endif
1839 int latency = _current_latency[n->_idx];
1841 // Insert in latency order (insertion sort)
1842 uint i;
1843 for ( i=0; i < _available.size(); i++ )
1844 if (_current_latency[_available[i]->_idx] > latency)
1845 break;
1847 // Special Check for compares following branches
1848 if( n->is_Mach() && _scheduled.size() > 0 ) {
1849 int op = n->as_Mach()->ideal_Opcode();
1850 Node *last = _scheduled[0];
1851 if( last->is_MachIf() && last->in(1) == n &&
1852 ( op == Op_CmpI ||
1853 op == Op_CmpU ||
1854 op == Op_CmpP ||
1855 op == Op_CmpF ||
1856 op == Op_CmpD ||
1857 op == Op_CmpL ) ) {
1859 // Recalculate position, moving to front of same latency
1860 for ( i=0 ; i < _available.size(); i++ )
1861 if (_current_latency[_available[i]->_idx] >= latency)
1862 break;
1863 }
1864 }
1866 // Insert the node in the available list
1867 _available.insert(i, n);
1869 #ifndef PRODUCT
1870 if (_cfg->C->trace_opto_output())
1871 dump_available();
1872 #endif
1873 }
1875 //------------------------------DecrementUseCounts-----------------------------
1876 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1877 for ( uint i=0; i < n->len(); i++ ) {
1878 Node *def = n->in(i);
1879 if (!def) continue;
1880 if( def->is_Proj() ) // If this is a machine projection, then
1881 def = def->in(0); // propagate usage thru to the base instruction
1883 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1884 continue;
1886 // Compute the latency
1887 uint l = _bundle_cycle_number + n->latency(i);
1888 if (_current_latency[def->_idx] < l)
1889 _current_latency[def->_idx] = l;
1891 // If this does not have uses then schedule it
1892 if ((--_uses[def->_idx]) == 0)
1893 AddNodeToAvailableList(def);
1894 }
1895 }
1897 //------------------------------AddNodeToBundle--------------------------------
1898 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1899 #ifndef PRODUCT
1900 if (_cfg->C->trace_opto_output()) {
1901 tty->print("# AddNodeToBundle: ");
1902 n->dump();
1903 }
1904 #endif
1906 // Remove this from the available list
1907 uint i;
1908 for (i = 0; i < _available.size(); i++)
1909 if (_available[i] == n)
1910 break;
1911 assert(i < _available.size(), "entry in _available list not found");
1912 _available.remove(i);
1914 // See if this fits in the current bundle
1915 const Pipeline *node_pipeline = n->pipeline();
1916 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1918 // Check for instructions to be placed in the delay slot. We
1919 // do this before we actually schedule the current instruction,
1920 // because the delay slot follows the current instruction.
1921 if (Pipeline::_branch_has_delay_slot &&
1922 node_pipeline->hasBranchDelay() &&
1923 !_unconditional_delay_slot) {
1925 uint siz = _available.size();
1927 // Conditional branches can support an instruction that
1928 // is unconditionally executed and not dependant by the
1929 // branch, OR a conditionally executed instruction if
1930 // the branch is taken. In practice, this means that
1931 // the first instruction at the branch target is
1932 // copied to the delay slot, and the branch goes to
1933 // the instruction after that at the branch target
1934 if ( n->is_Mach() && n->is_Branch() ) {
1936 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1937 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1939 #ifndef PRODUCT
1940 _branches++;
1941 #endif
1943 // At least 1 instruction is on the available list
1944 // that is not dependant on the branch
1945 for (uint i = 0; i < siz; i++) {
1946 Node *d = _available[i];
1947 const Pipeline *avail_pipeline = d->pipeline();
1949 // Don't allow safepoints in the branch shadow, that will
1950 // cause a number of difficulties
1951 if ( avail_pipeline->instructionCount() == 1 &&
1952 !avail_pipeline->hasMultipleBundles() &&
1953 !avail_pipeline->hasBranchDelay() &&
1954 Pipeline::instr_has_unit_size() &&
1955 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1956 NodeFitsInBundle(d) &&
1957 !node_bundling(d)->used_in_delay()) {
1959 if (d->is_Mach() && !d->is_MachSafePoint()) {
1960 // A node that fits in the delay slot was found, so we need to
1961 // set the appropriate bits in the bundle pipeline information so
1962 // that it correctly indicates resource usage. Later, when we
1963 // attempt to add this instruction to the bundle, we will skip
1964 // setting the resource usage.
1965 _unconditional_delay_slot = d;
1966 node_bundling(n)->set_use_unconditional_delay();
1967 node_bundling(d)->set_used_in_unconditional_delay();
1968 _bundle_use.add_usage(avail_pipeline->resourceUse());
1969 _current_latency[d->_idx] = _bundle_cycle_number;
1970 _next_node = d;
1971 ++_bundle_instr_count;
1972 #ifndef PRODUCT
1973 _unconditional_delays++;
1974 #endif
1975 break;
1976 }
1977 }
1978 }
1979 }
1981 // No delay slot, add a nop to the usage
1982 if (!_unconditional_delay_slot) {
1983 // See if adding an instruction in the delay slot will overflow
1984 // the bundle.
1985 if (!NodeFitsInBundle(_nop)) {
1986 #ifndef PRODUCT
1987 if (_cfg->C->trace_opto_output())
1988 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
1989 #endif
1990 step(1);
1991 }
1993 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
1994 _next_node = _nop;
1995 ++_bundle_instr_count;
1996 }
1998 // See if the instruction in the delay slot requires a
1999 // step of the bundles
2000 if (!NodeFitsInBundle(n)) {
2001 #ifndef PRODUCT
2002 if (_cfg->C->trace_opto_output())
2003 tty->print("# *** STEP(branch won't fit) ***\n");
2004 #endif
2005 // Update the state information
2006 _bundle_instr_count = 0;
2007 _bundle_cycle_number += 1;
2008 _bundle_use.step(1);
2009 }
2010 }
2012 // Get the number of instructions
2013 uint instruction_count = node_pipeline->instructionCount();
2014 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2015 instruction_count = 0;
2017 // Compute the latency information
2018 uint delay = 0;
2020 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2021 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2022 if (relative_latency < 0)
2023 relative_latency = 0;
2025 delay = _bundle_use.full_latency(relative_latency, node_usage);
2027 // Does not fit in this bundle, start a new one
2028 if (delay > 0) {
2029 step(delay);
2031 #ifndef PRODUCT
2032 if (_cfg->C->trace_opto_output())
2033 tty->print("# *** STEP(%d) ***\n", delay);
2034 #endif
2035 }
2036 }
2038 // If this was placed in the delay slot, ignore it
2039 if (n != _unconditional_delay_slot) {
2041 if (delay == 0) {
2042 if (node_pipeline->hasMultipleBundles()) {
2043 #ifndef PRODUCT
2044 if (_cfg->C->trace_opto_output())
2045 tty->print("# *** STEP(multiple instructions) ***\n");
2046 #endif
2047 step(1);
2048 }
2050 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2051 #ifndef PRODUCT
2052 if (_cfg->C->trace_opto_output())
2053 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2054 instruction_count + _bundle_instr_count,
2055 Pipeline::_max_instrs_per_cycle);
2056 #endif
2057 step(1);
2058 }
2059 }
2061 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2062 _bundle_instr_count++;
2064 // Set the node's latency
2065 _current_latency[n->_idx] = _bundle_cycle_number;
2067 // Now merge the functional unit information
2068 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2069 _bundle_use.add_usage(node_usage);
2071 // Increment the number of instructions in this bundle
2072 _bundle_instr_count += instruction_count;
2074 // Remember this node for later
2075 if (n->is_Mach())
2076 _next_node = n;
2077 }
2079 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2080 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2081 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2082 // into the block. All other scheduled nodes get put in the schedule here.
2083 int op = n->Opcode();
2084 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2085 (op != Op_Node && // Not an unused antidepedence node and
2086 // not an unallocated boxlock
2087 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2089 // Push any trailing projections
2090 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2091 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2092 Node *foi = n->fast_out(i);
2093 if( foi->is_Proj() )
2094 _scheduled.push(foi);
2095 }
2096 }
2098 // Put the instruction in the schedule list
2099 _scheduled.push(n);
2100 }
2102 #ifndef PRODUCT
2103 if (_cfg->C->trace_opto_output())
2104 dump_available();
2105 #endif
2107 // Walk all the definitions, decrementing use counts, and
2108 // if a definition has a 0 use count, place it in the available list.
2109 DecrementUseCounts(n,bb);
2110 }
2112 //------------------------------ComputeUseCount--------------------------------
2113 // This method sets the use count within a basic block. We will ignore all
2114 // uses outside the current basic block. As we are doing a backwards walk,
2115 // any node we reach that has a use count of 0 may be scheduled. This also
2116 // avoids the problem of cyclic references from phi nodes, as long as phi
2117 // nodes are at the front of the basic block. This method also initializes
2118 // the available list to the set of instructions that have no uses within this
2119 // basic block.
2120 void Scheduling::ComputeUseCount(const Block *bb) {
2121 #ifndef PRODUCT
2122 if (_cfg->C->trace_opto_output())
2123 tty->print("# -> ComputeUseCount\n");
2124 #endif
2126 // Clear the list of available and scheduled instructions, just in case
2127 _available.clear();
2128 _scheduled.clear();
2130 // No delay slot specified
2131 _unconditional_delay_slot = NULL;
2133 #ifdef ASSERT
2134 for( uint i=0; i < bb->_nodes.size(); i++ )
2135 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2136 #endif
2138 // Force the _uses count to never go to zero for unscheduable pieces
2139 // of the block
2140 for( uint k = 0; k < _bb_start; k++ )
2141 _uses[bb->_nodes[k]->_idx] = 1;
2142 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2143 _uses[bb->_nodes[l]->_idx] = 1;
2145 // Iterate backwards over the instructions in the block. Don't count the
2146 // branch projections at end or the block header instructions.
2147 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2148 Node *n = bb->_nodes[j];
2149 if( n->is_Proj() ) continue; // Projections handled another way
2151 // Account for all uses
2152 for ( uint k = 0; k < n->len(); k++ ) {
2153 Node *inp = n->in(k);
2154 if (!inp) continue;
2155 assert(inp != n, "no cycles allowed" );
2156 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2157 if( inp->is_Proj() ) // Skip through Proj's
2158 inp = inp->in(0);
2159 ++_uses[inp->_idx]; // Count 1 block-local use
2160 }
2161 }
2163 // If this instruction has a 0 use count, then it is available
2164 if (!_uses[n->_idx]) {
2165 _current_latency[n->_idx] = _bundle_cycle_number;
2166 AddNodeToAvailableList(n);
2167 }
2169 #ifndef PRODUCT
2170 if (_cfg->C->trace_opto_output()) {
2171 tty->print("# uses: %3d: ", _uses[n->_idx]);
2172 n->dump();
2173 }
2174 #endif
2175 }
2177 #ifndef PRODUCT
2178 if (_cfg->C->trace_opto_output())
2179 tty->print("# <- ComputeUseCount\n");
2180 #endif
2181 }
2183 // This routine performs scheduling on each basic block in reverse order,
2184 // using instruction latencies and taking into account function unit
2185 // availability.
2186 void Scheduling::DoScheduling() {
2187 #ifndef PRODUCT
2188 if (_cfg->C->trace_opto_output())
2189 tty->print("# -> DoScheduling\n");
2190 #endif
2192 Block *succ_bb = NULL;
2193 Block *bb;
2195 // Walk over all the basic blocks in reverse order
2196 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2197 bb = _cfg->_blocks[i];
2199 #ifndef PRODUCT
2200 if (_cfg->C->trace_opto_output()) {
2201 tty->print("# Schedule BB#%03d (initial)\n", i);
2202 for (uint j = 0; j < bb->_nodes.size(); j++)
2203 bb->_nodes[j]->dump();
2204 }
2205 #endif
2207 // On the head node, skip processing
2208 if( bb == _cfg->_broot )
2209 continue;
2211 // Skip empty, connector blocks
2212 if (bb->is_connector())
2213 continue;
2215 // If the following block is not the sole successor of
2216 // this one, then reset the pipeline information
2217 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2218 #ifndef PRODUCT
2219 if (_cfg->C->trace_opto_output()) {
2220 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2221 _next_node->_idx, _bundle_instr_count);
2222 }
2223 #endif
2224 step_and_clear();
2225 }
2227 // Leave untouched the starting instruction, any Phis, a CreateEx node
2228 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2229 _bb_end = bb->_nodes.size()-1;
2230 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2231 Node *n = bb->_nodes[_bb_start];
2232 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2233 // Also, MachIdealNodes do not get scheduled
2234 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2235 MachNode *mach = n->as_Mach();
2236 int iop = mach->ideal_Opcode();
2237 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2238 if( iop == Op_Con ) continue; // Do not schedule Top
2239 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2240 mach->pipeline() == MachNode::pipeline_class() &&
2241 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2242 continue;
2243 break; // Funny loop structure to be sure...
2244 }
2245 // Compute last "interesting" instruction in block - last instruction we
2246 // might schedule. _bb_end points just after last schedulable inst. We
2247 // normally schedule conditional branches (despite them being forced last
2248 // in the block), because they have delay slots we can fill. Calls all
2249 // have their delay slots filled in the template expansions, so we don't
2250 // bother scheduling them.
2251 Node *last = bb->_nodes[_bb_end];
2252 if( last->is_Catch() ||
2253 (last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2254 // There must be a prior call. Skip it.
2255 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2256 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2257 }
2258 } else if( last->is_MachNullCheck() ) {
2259 // Backup so the last null-checked memory instruction is
2260 // outside the schedulable range. Skip over the nullcheck,
2261 // projection, and the memory nodes.
2262 Node *mem = last->in(1);
2263 do {
2264 _bb_end--;
2265 } while (mem != bb->_nodes[_bb_end]);
2266 } else {
2267 // Set _bb_end to point after last schedulable inst.
2268 _bb_end++;
2269 }
2271 assert( _bb_start <= _bb_end, "inverted block ends" );
2273 // Compute the register antidependencies for the basic block
2274 ComputeRegisterAntidependencies(bb);
2275 if (_cfg->C->failing()) return; // too many D-U pinch points
2277 // Compute intra-bb latencies for the nodes
2278 ComputeLocalLatenciesForward(bb);
2280 // Compute the usage within the block, and set the list of all nodes
2281 // in the block that have no uses within the block.
2282 ComputeUseCount(bb);
2284 // Schedule the remaining instructions in the block
2285 while ( _available.size() > 0 ) {
2286 Node *n = ChooseNodeToBundle();
2287 AddNodeToBundle(n,bb);
2288 }
2290 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2291 #ifdef ASSERT
2292 for( uint l = _bb_start; l < _bb_end; l++ ) {
2293 Node *n = bb->_nodes[l];
2294 uint m;
2295 for( m = 0; m < _bb_end-_bb_start; m++ )
2296 if( _scheduled[m] == n )
2297 break;
2298 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2299 }
2300 #endif
2302 // Now copy the instructions (in reverse order) back to the block
2303 for ( uint k = _bb_start; k < _bb_end; k++ )
2304 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2306 #ifndef PRODUCT
2307 if (_cfg->C->trace_opto_output()) {
2308 tty->print("# Schedule BB#%03d (final)\n", i);
2309 uint current = 0;
2310 for (uint j = 0; j < bb->_nodes.size(); j++) {
2311 Node *n = bb->_nodes[j];
2312 if( valid_bundle_info(n) ) {
2313 Bundle *bundle = node_bundling(n);
2314 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2315 tty->print("*** Bundle: ");
2316 bundle->dump();
2317 }
2318 n->dump();
2319 }
2320 }
2321 }
2322 #endif
2323 #ifdef ASSERT
2324 verify_good_schedule(bb,"after block local scheduling");
2325 #endif
2326 }
2328 #ifndef PRODUCT
2329 if (_cfg->C->trace_opto_output())
2330 tty->print("# <- DoScheduling\n");
2331 #endif
2333 // Record final node-bundling array location
2334 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2336 } // end DoScheduling
2338 //------------------------------verify_good_schedule---------------------------
2339 // Verify that no live-range used in the block is killed in the block by a
2340 // wrong DEF. This doesn't verify live-ranges that span blocks.
2342 // Check for edge existence. Used to avoid adding redundant precedence edges.
2343 static bool edge_from_to( Node *from, Node *to ) {
2344 for( uint i=0; i<from->len(); i++ )
2345 if( from->in(i) == to )
2346 return true;
2347 return false;
2348 }
2350 #ifdef ASSERT
2351 //------------------------------verify_do_def----------------------------------
2352 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2353 // Check for bad kills
2354 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2355 Node *prior_use = _reg_node[def];
2356 if( prior_use && !edge_from_to(prior_use,n) ) {
2357 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2358 n->dump();
2359 tty->print_cr("...");
2360 prior_use->dump();
2361 assert_msg(edge_from_to(prior_use,n),msg);
2362 }
2363 _reg_node.map(def,NULL); // Kill live USEs
2364 }
2365 }
2367 //------------------------------verify_good_schedule---------------------------
2368 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2370 // Zap to something reasonable for the verify code
2371 _reg_node.clear();
2373 // Walk over the block backwards. Check to make sure each DEF doesn't
2374 // kill a live value (other than the one it's supposed to). Add each
2375 // USE to the live set.
2376 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2377 Node *n = b->_nodes[i];
2378 int n_op = n->Opcode();
2379 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2380 // Fat-proj kills a slew of registers
2381 RegMask rm = n->out_RegMask();// Make local copy
2382 while( rm.is_NotEmpty() ) {
2383 OptoReg::Name kill = rm.find_first_elem();
2384 rm.Remove(kill);
2385 verify_do_def( n, kill, msg );
2386 }
2387 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2388 // Get DEF'd registers the normal way
2389 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2390 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2391 }
2393 // Now make all USEs live
2394 for( uint i=1; i<n->req(); i++ ) {
2395 Node *def = n->in(i);
2396 assert(def != 0, "input edge required");
2397 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2398 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2399 if( OptoReg::is_valid(reg_lo) ) {
2400 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2401 _reg_node.map(reg_lo,n);
2402 }
2403 if( OptoReg::is_valid(reg_hi) ) {
2404 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2405 _reg_node.map(reg_hi,n);
2406 }
2407 }
2409 }
2411 // Zap to something reasonable for the Antidependence code
2412 _reg_node.clear();
2413 }
2414 #endif
2416 // Conditionally add precedence edges. Avoid putting edges on Projs.
2417 static void add_prec_edge_from_to( Node *from, Node *to ) {
2418 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2419 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2420 from = from->in(0);
2421 }
2422 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2423 !edge_from_to( from, to ) ) // Avoid duplicate edge
2424 from->add_prec(to);
2425 }
2427 //------------------------------anti_do_def------------------------------------
2428 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2429 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2430 return;
2432 Node *pinch = _reg_node[def_reg]; // Get pinch point
2433 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2434 is_def ) { // Check for a true def (not a kill)
2435 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2436 return;
2437 }
2439 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2440 debug_only( def = (Node*)0xdeadbeef; )
2442 // After some number of kills there _may_ be a later def
2443 Node *later_def = NULL;
2445 // Finding a kill requires a real pinch-point.
2446 // Check for not already having a pinch-point.
2447 // Pinch points are Op_Node's.
2448 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2449 later_def = pinch; // Must be def/kill as optimistic pinch-point
2450 if ( _pinch_free_list.size() > 0) {
2451 pinch = _pinch_free_list.pop();
2452 } else {
2453 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2454 }
2455 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2456 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2457 return;
2458 }
2459 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2460 _reg_node.map(def_reg,pinch); // Record pinch-point
2461 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2462 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2463 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2464 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2465 later_def = NULL; // and no later def
2466 }
2467 pinch->set_req(0,later_def); // Hook later def so we can find it
2468 } else { // Else have valid pinch point
2469 if( pinch->in(0) ) // If there is a later-def
2470 later_def = pinch->in(0); // Get it
2471 }
2473 // Add output-dependence edge from later def to kill
2474 if( later_def ) // If there is some original def
2475 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2477 // See if current kill is also a use, and so is forced to be the pinch-point.
2478 if( pinch->Opcode() == Op_Node ) {
2479 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2480 for( uint i=1; i<uses->req(); i++ ) {
2481 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2482 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2483 // Yes, found a use/kill pinch-point
2484 pinch->set_req(0,NULL); //
2485 pinch->replace_by(kill); // Move anti-dep edges up
2486 pinch = kill;
2487 _reg_node.map(def_reg,pinch);
2488 return;
2489 }
2490 }
2491 }
2493 // Add edge from kill to pinch-point
2494 add_prec_edge_from_to(kill,pinch);
2495 }
2497 //------------------------------anti_do_use------------------------------------
2498 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2499 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2500 return;
2501 Node *pinch = _reg_node[use_reg]; // Get pinch point
2502 // Check for no later def_reg/kill in block
2503 if( pinch && _bbs[pinch->_idx] == b &&
2504 // Use has to be block-local as well
2505 _bbs[use->_idx] == b ) {
2506 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2507 pinch->req() == 1 ) { // pinch not yet in block?
2508 pinch->del_req(0); // yank pointer to later-def, also set flag
2509 // Insert the pinch-point in the block just after the last use
2510 b->_nodes.insert(b->find_node(use)+1,pinch);
2511 _bb_end++; // Increase size scheduled region in block
2512 }
2514 add_prec_edge_from_to(pinch,use);
2515 }
2516 }
2518 //------------------------------ComputeRegisterAntidependences-----------------
2519 // We insert antidependences between the reads and following write of
2520 // allocated registers to prevent illegal code motion. Hopefully, the
2521 // number of added references should be fairly small, especially as we
2522 // are only adding references within the current basic block.
2523 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2525 #ifdef ASSERT
2526 verify_good_schedule(b,"before block local scheduling");
2527 #endif
2529 // A valid schedule, for each register independently, is an endless cycle
2530 // of: a def, then some uses (connected to the def by true dependencies),
2531 // then some kills (defs with no uses), finally the cycle repeats with a new
2532 // def. The uses are allowed to float relative to each other, as are the
2533 // kills. No use is allowed to slide past a kill (or def). This requires
2534 // antidependencies between all uses of a single def and all kills that
2535 // follow, up to the next def. More edges are redundant, because later defs
2536 // & kills are already serialized with true or antidependencies. To keep
2537 // the edge count down, we add a 'pinch point' node if there's more than
2538 // one use or more than one kill/def.
2540 // We add dependencies in one bottom-up pass.
2542 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2544 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2545 // register. If not, we record the DEF/KILL in _reg_node, the
2546 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2547 // "pinch point", a new Node that's in the graph but not in the block.
2548 // We put edges from the prior and current DEF/KILLs to the pinch point.
2549 // We put the pinch point in _reg_node. If there's already a pinch point
2550 // we merely add an edge from the current DEF/KILL to the pinch point.
2552 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2553 // put an edge from the pinch point to the USE.
2555 // To be expedient, the _reg_node array is pre-allocated for the whole
2556 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2557 // or a valid def/kill/pinch-point, or a leftover node from some prior
2558 // block. Leftover node from some prior block is treated like a NULL (no
2559 // prior def, so no anti-dependence needed). Valid def is distinguished by
2560 // it being in the current block.
2561 bool fat_proj_seen = false;
2562 uint last_safept = _bb_end-1;
2563 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2564 Node* last_safept_node = end_node;
2565 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2566 Node *n = b->_nodes[i];
2567 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2568 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2569 // Fat-proj kills a slew of registers
2570 // This can add edges to 'n' and obscure whether or not it was a def,
2571 // hence the is_def flag.
2572 fat_proj_seen = true;
2573 RegMask rm = n->out_RegMask();// Make local copy
2574 while( rm.is_NotEmpty() ) {
2575 OptoReg::Name kill = rm.find_first_elem();
2576 rm.Remove(kill);
2577 anti_do_def( b, n, kill, is_def );
2578 }
2579 } else {
2580 // Get DEF'd registers the normal way
2581 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2582 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2583 }
2585 // Check each register used by this instruction for a following DEF/KILL
2586 // that must occur afterward and requires an anti-dependence edge.
2587 for( uint j=0; j<n->req(); j++ ) {
2588 Node *def = n->in(j);
2589 if( def ) {
2590 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2591 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2592 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2593 }
2594 }
2595 // Do not allow defs of new derived values to float above GC
2596 // points unless the base is definitely available at the GC point.
2598 Node *m = b->_nodes[i];
2600 // Add precedence edge from following safepoint to use of derived pointer
2601 if( last_safept_node != end_node &&
2602 m != last_safept_node) {
2603 for (uint k = 1; k < m->req(); k++) {
2604 const Type *t = m->in(k)->bottom_type();
2605 if( t->isa_oop_ptr() &&
2606 t->is_ptr()->offset() != 0 ) {
2607 last_safept_node->add_prec( m );
2608 break;
2609 }
2610 }
2611 }
2613 if( n->jvms() ) { // Precedence edge from derived to safept
2614 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2615 if( b->_nodes[last_safept] != last_safept_node ) {
2616 last_safept = b->find_node(last_safept_node);
2617 }
2618 for( uint j=last_safept; j > i; j-- ) {
2619 Node *mach = b->_nodes[j];
2620 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2621 mach->add_prec( n );
2622 }
2623 last_safept = i;
2624 last_safept_node = m;
2625 }
2626 }
2628 if (fat_proj_seen) {
2629 // Garbage collect pinch nodes that were not consumed.
2630 // They are usually created by a fat kill MachProj for a call.
2631 garbage_collect_pinch_nodes();
2632 }
2633 }
2635 //------------------------------garbage_collect_pinch_nodes-------------------------------
2637 // Garbage collect pinch nodes for reuse by other blocks.
2638 //
2639 // The block scheduler's insertion of anti-dependence
2640 // edges creates many pinch nodes when the block contains
2641 // 2 or more Calls. A pinch node is used to prevent a
2642 // combinatorial explosion of edges. If a set of kills for a
2643 // register is anti-dependent on a set of uses (or defs), rather
2644 // than adding an edge in the graph between each pair of kill
2645 // and use (or def), a pinch is inserted between them:
2646 //
2647 // use1 use2 use3
2648 // \ | /
2649 // \ | /
2650 // pinch
2651 // / | \
2652 // / | \
2653 // kill1 kill2 kill3
2654 //
2655 // One pinch node is created per register killed when
2656 // the second call is encountered during a backwards pass
2657 // over the block. Most of these pinch nodes are never
2658 // wired into the graph because the register is never
2659 // used or def'ed in the block.
2660 //
2661 void Scheduling::garbage_collect_pinch_nodes() {
2662 #ifndef PRODUCT
2663 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2664 #endif
2665 int trace_cnt = 0;
2666 for (uint k = 0; k < _reg_node.Size(); k++) {
2667 Node* pinch = _reg_node[k];
2668 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2669 // no predecence input edges
2670 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2671 cleanup_pinch(pinch);
2672 _pinch_free_list.push(pinch);
2673 _reg_node.map(k, NULL);
2674 #ifndef PRODUCT
2675 if (_cfg->C->trace_opto_output()) {
2676 trace_cnt++;
2677 if (trace_cnt > 40) {
2678 tty->print("\n");
2679 trace_cnt = 0;
2680 }
2681 tty->print(" %d", pinch->_idx);
2682 }
2683 #endif
2684 }
2685 }
2686 #ifndef PRODUCT
2687 if (_cfg->C->trace_opto_output()) tty->print("\n");
2688 #endif
2689 }
2691 // Clean up a pinch node for reuse.
2692 void Scheduling::cleanup_pinch( Node *pinch ) {
2693 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2695 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2696 Node* use = pinch->last_out(i);
2697 uint uses_found = 0;
2698 for (uint j = use->req(); j < use->len(); j++) {
2699 if (use->in(j) == pinch) {
2700 use->rm_prec(j);
2701 uses_found++;
2702 }
2703 }
2704 assert(uses_found > 0, "must be a precedence edge");
2705 i -= uses_found; // we deleted 1 or more copies of this edge
2706 }
2707 // May have a later_def entry
2708 pinch->set_req(0, NULL);
2709 }
2711 //------------------------------print_statistics-------------------------------
2712 #ifndef PRODUCT
2714 void Scheduling::dump_available() const {
2715 tty->print("#Availist ");
2716 for (uint i = 0; i < _available.size(); i++)
2717 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2718 tty->cr();
2719 }
2721 // Print Scheduling Statistics
2722 void Scheduling::print_statistics() {
2723 // Print the size added by nops for bundling
2724 tty->print("Nops added %d bytes to total of %d bytes",
2725 _total_nop_size, _total_method_size);
2726 if (_total_method_size > 0)
2727 tty->print(", for %.2f%%",
2728 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2729 tty->print("\n");
2731 // Print the number of branch shadows filled
2732 if (Pipeline::_branch_has_delay_slot) {
2733 tty->print("Of %d branches, %d had unconditional delay slots filled",
2734 _total_branches, _total_unconditional_delays);
2735 if (_total_branches > 0)
2736 tty->print(", for %.2f%%",
2737 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2738 tty->print("\n");
2739 }
2741 uint total_instructions = 0, total_bundles = 0;
2743 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2744 uint bundle_count = _total_instructions_per_bundle[i];
2745 total_instructions += bundle_count * i;
2746 total_bundles += bundle_count;
2747 }
2749 if (total_bundles > 0)
2750 tty->print("Average ILP (excluding nops) is %.2f\n",
2751 ((double)total_instructions) / ((double)total_bundles));
2752 }
2753 #endif