Fri, 30 Apr 2010 08:37:24 -0700
6943304: remove tagged stack interpreter
Reviewed-by: coleenp, never, gbenson
1 /*
2 * Copyright 1997-2010 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
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23 */
25 #include "incls/_precompiled.incl"
26 #include "incls/_interp_masm_sparc.cpp.incl"
28 #ifndef CC_INTERP
29 #ifndef FAST_DISPATCH
30 #define FAST_DISPATCH 1
31 #endif
32 #undef FAST_DISPATCH
34 // Implementation of InterpreterMacroAssembler
36 // This file specializes the assember with interpreter-specific macros
38 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
39 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
41 #else // CC_INTERP
42 #ifndef STATE
43 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
44 #endif // STATE
46 #endif // CC_INTERP
48 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
49 // Note: this algorithm is also used by C1's OSR entry sequence.
50 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
51 assert_different_registers(args_size, locals_size);
52 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
53 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
54 // Use br/mov combination because it works on both V8 and V9 and is
55 // faster.
56 Label skip_move;
57 br(Assembler::negative, true, Assembler::pt, skip_move);
58 delayed()->mov(G0, delta);
59 bind(skip_move);
60 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
61 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
62 }
64 #ifndef CC_INTERP
66 // Dispatch code executed in the prolog of a bytecode which does not do it's
67 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
68 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
69 assert_not_delayed();
70 #ifdef FAST_DISPATCH
71 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
72 // they both use I2.
73 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
74 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
75 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
76 // add offset to correct dispatch table
77 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
78 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
79 #else
80 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
81 // dispatch table to use
82 AddressLiteral tbl(Interpreter::dispatch_table(state));
83 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
84 set(tbl, G3_scratch); // compute addr of table
85 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
86 #endif
87 }
90 // Dispatch code executed in the epilog of a bytecode which does not do it's
91 // own dispatch. The dispatch address in IdispatchAddress is used for the
92 // dispatch.
93 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
94 assert_not_delayed();
95 verify_FPU(1, state);
96 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
97 jmp( IdispatchAddress, 0 );
98 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
99 else delayed()->nop();
100 }
103 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
104 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
105 assert_not_delayed();
106 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
107 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
108 }
111 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
112 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
113 assert_not_delayed();
114 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
115 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
116 }
119 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
120 // load current bytecode
121 assert_not_delayed();
122 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
123 dispatch_base(state, table);
124 }
127 void InterpreterMacroAssembler::call_VM_leaf_base(
128 Register java_thread,
129 address entry_point,
130 int number_of_arguments
131 ) {
132 if (!java_thread->is_valid())
133 java_thread = L7_thread_cache;
134 // super call
135 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
136 }
139 void InterpreterMacroAssembler::call_VM_base(
140 Register oop_result,
141 Register java_thread,
142 Register last_java_sp,
143 address entry_point,
144 int number_of_arguments,
145 bool check_exception
146 ) {
147 if (!java_thread->is_valid())
148 java_thread = L7_thread_cache;
149 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
150 // takes responsibility for setting its own thread-state on call-out.
151 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
153 //save_bcp(); // save bcp
154 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
155 //restore_bcp(); // restore bcp
156 //restore_locals(); // restore locals pointer
157 }
160 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
161 if (JvmtiExport::can_pop_frame()) {
162 Label L;
164 // Check the "pending popframe condition" flag in the current thread
165 ld(G2_thread, JavaThread::popframe_condition_offset(), scratch_reg);
167 // Initiate popframe handling only if it is not already being processed. If the flag
168 // has the popframe_processing bit set, it means that this code is called *during* popframe
169 // handling - we don't want to reenter.
170 btst(JavaThread::popframe_pending_bit, scratch_reg);
171 br(zero, false, pt, L);
172 delayed()->nop();
173 btst(JavaThread::popframe_processing_bit, scratch_reg);
174 br(notZero, false, pt, L);
175 delayed()->nop();
177 // Call Interpreter::remove_activation_preserving_args_entry() to get the
178 // address of the same-named entrypoint in the generated interpreter code.
179 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
181 // Jump to Interpreter::_remove_activation_preserving_args_entry
182 jmpl(O0, G0, G0);
183 delayed()->nop();
184 bind(L);
185 }
186 }
189 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
190 Register thr_state = G4_scratch;
191 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
192 const Address tos_addr(thr_state, JvmtiThreadState::earlyret_tos_offset());
193 const Address oop_addr(thr_state, JvmtiThreadState::earlyret_oop_offset());
194 const Address val_addr(thr_state, JvmtiThreadState::earlyret_value_offset());
195 switch (state) {
196 case ltos: ld_long(val_addr, Otos_l); break;
197 case atos: ld_ptr(oop_addr, Otos_l);
198 st_ptr(G0, oop_addr); break;
199 case btos: // fall through
200 case ctos: // fall through
201 case stos: // fall through
202 case itos: ld(val_addr, Otos_l1); break;
203 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
204 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
205 case vtos: /* nothing to do */ break;
206 default : ShouldNotReachHere();
207 }
208 // Clean up tos value in the jvmti thread state
209 or3(G0, ilgl, G3_scratch);
210 stw(G3_scratch, tos_addr);
211 st_long(G0, val_addr);
212 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
213 }
216 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
217 if (JvmtiExport::can_force_early_return()) {
218 Label L;
219 Register thr_state = G3_scratch;
220 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
221 tst(thr_state);
222 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
223 delayed()->nop();
225 // Initiate earlyret handling only if it is not already being processed.
226 // If the flag has the earlyret_processing bit set, it means that this code
227 // is called *during* earlyret handling - we don't want to reenter.
228 ld(thr_state, JvmtiThreadState::earlyret_state_offset(), G4_scratch);
229 cmp(G4_scratch, JvmtiThreadState::earlyret_pending);
230 br(Assembler::notEqual, false, pt, L);
231 delayed()->nop();
233 // Call Interpreter::remove_activation_early_entry() to get the address of the
234 // same-named entrypoint in the generated interpreter code
235 ld(thr_state, JvmtiThreadState::earlyret_tos_offset(), Otos_l1);
236 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
238 // Jump to Interpreter::_remove_activation_early_entry
239 jmpl(O0, G0, G0);
240 delayed()->nop();
241 bind(L);
242 }
243 }
246 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
247 mov(arg_1, O0);
248 mov(arg_2, O1);
249 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 2);
250 }
251 #endif /* CC_INTERP */
254 #ifndef CC_INTERP
256 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
257 assert_not_delayed();
258 dispatch_Lbyte_code(state, table);
259 }
262 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
263 dispatch_base(state, Interpreter::normal_table(state));
264 }
267 void InterpreterMacroAssembler::dispatch_only(TosState state) {
268 dispatch_base(state, Interpreter::dispatch_table(state));
269 }
272 // common code to dispatch and dispatch_only
273 // dispatch value in Lbyte_code and increment Lbcp
275 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
276 verify_FPU(1, state);
277 // %%%%% maybe implement +VerifyActivationFrameSize here
278 //verify_thread(); //too slow; we will just verify on method entry & exit
279 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
280 #ifdef FAST_DISPATCH
281 if (table == Interpreter::dispatch_table(state)) {
282 // use IdispatchTables
283 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
284 // add offset to correct dispatch table
285 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
286 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
287 } else {
288 #endif
289 // dispatch table to use
290 AddressLiteral tbl(table);
291 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
292 set(tbl, G3_scratch); // compute addr of table
293 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
294 #ifdef FAST_DISPATCH
295 }
296 #endif
297 jmp( G3_scratch, 0 );
298 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
299 else delayed()->nop();
300 }
303 // Helpers for expression stack
305 // Longs and doubles are Category 2 computational types in the
306 // JVM specification (section 3.11.1) and take 2 expression stack or
307 // local slots.
308 // Aligning them on 32 bit with tagged stacks is hard because the code generated
309 // for the dup* bytecodes depends on what types are already on the stack.
310 // If the types are split into the two stack/local slots, that is much easier
311 // (and we can use 0 for non-reference tags).
313 // Known good alignment in _LP64 but unknown otherwise
314 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
315 assert_not_delayed();
317 #ifdef _LP64
318 ldf(FloatRegisterImpl::D, r1, offset, d);
319 #else
320 ldf(FloatRegisterImpl::S, r1, offset, d);
321 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize, d->successor());
322 #endif
323 }
325 // Known good alignment in _LP64 but unknown otherwise
326 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
327 assert_not_delayed();
329 #ifdef _LP64
330 stf(FloatRegisterImpl::D, d, r1, offset);
331 // store something more useful here
332 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
333 #else
334 stf(FloatRegisterImpl::S, d, r1, offset);
335 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize);
336 #endif
337 }
340 // Known good alignment in _LP64 but unknown otherwise
341 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
342 assert_not_delayed();
343 #ifdef _LP64
344 ldx(r1, offset, rd);
345 #else
346 ld(r1, offset, rd);
347 ld(r1, offset + Interpreter::stackElementSize, rd->successor());
348 #endif
349 }
351 // Known good alignment in _LP64 but unknown otherwise
352 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
353 assert_not_delayed();
355 #ifdef _LP64
356 stx(l, r1, offset);
357 // store something more useful here
358 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
359 #else
360 st(l, r1, offset);
361 st(l->successor(), r1, offset + Interpreter::stackElementSize);
362 #endif
363 }
365 void InterpreterMacroAssembler::pop_i(Register r) {
366 assert_not_delayed();
367 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
368 inc(Lesp, Interpreter::stackElementSize);
369 debug_only(verify_esp(Lesp));
370 }
372 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
373 assert_not_delayed();
374 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
375 inc(Lesp, Interpreter::stackElementSize);
376 debug_only(verify_esp(Lesp));
377 }
379 void InterpreterMacroAssembler::pop_l(Register r) {
380 assert_not_delayed();
381 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
382 inc(Lesp, 2*Interpreter::stackElementSize);
383 debug_only(verify_esp(Lesp));
384 }
387 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
388 assert_not_delayed();
389 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
390 inc(Lesp, Interpreter::stackElementSize);
391 debug_only(verify_esp(Lesp));
392 }
395 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
396 assert_not_delayed();
397 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
398 inc(Lesp, 2*Interpreter::stackElementSize);
399 debug_only(verify_esp(Lesp));
400 }
403 void InterpreterMacroAssembler::push_i(Register r) {
404 assert_not_delayed();
405 debug_only(verify_esp(Lesp));
406 st(r, Lesp, 0);
407 dec(Lesp, Interpreter::stackElementSize);
408 }
410 void InterpreterMacroAssembler::push_ptr(Register r) {
411 assert_not_delayed();
412 st_ptr(r, Lesp, 0);
413 dec(Lesp, Interpreter::stackElementSize);
414 }
416 // remember: our convention for longs in SPARC is:
417 // O0 (Otos_l1) has high-order part in first word,
418 // O1 (Otos_l2) has low-order part in second word
420 void InterpreterMacroAssembler::push_l(Register r) {
421 assert_not_delayed();
422 debug_only(verify_esp(Lesp));
423 // Longs are stored in memory-correct order, even if unaligned.
424 int offset = -Interpreter::stackElementSize;
425 store_unaligned_long(r, Lesp, offset);
426 dec(Lesp, 2 * Interpreter::stackElementSize);
427 }
430 void InterpreterMacroAssembler::push_f(FloatRegister f) {
431 assert_not_delayed();
432 debug_only(verify_esp(Lesp));
433 stf(FloatRegisterImpl::S, f, Lesp, 0);
434 dec(Lesp, Interpreter::stackElementSize);
435 }
438 void InterpreterMacroAssembler::push_d(FloatRegister d) {
439 assert_not_delayed();
440 debug_only(verify_esp(Lesp));
441 // Longs are stored in memory-correct order, even if unaligned.
442 int offset = -Interpreter::stackElementSize;
443 store_unaligned_double(d, Lesp, offset);
444 dec(Lesp, 2 * Interpreter::stackElementSize);
445 }
448 void InterpreterMacroAssembler::push(TosState state) {
449 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
450 switch (state) {
451 case atos: push_ptr(); break;
452 case btos: push_i(); break;
453 case ctos:
454 case stos: push_i(); break;
455 case itos: push_i(); break;
456 case ltos: push_l(); break;
457 case ftos: push_f(); break;
458 case dtos: push_d(); break;
459 case vtos: /* nothing to do */ break;
460 default : ShouldNotReachHere();
461 }
462 }
465 void InterpreterMacroAssembler::pop(TosState state) {
466 switch (state) {
467 case atos: pop_ptr(); break;
468 case btos: pop_i(); break;
469 case ctos:
470 case stos: pop_i(); break;
471 case itos: pop_i(); break;
472 case ltos: pop_l(); break;
473 case ftos: pop_f(); break;
474 case dtos: pop_d(); break;
475 case vtos: /* nothing to do */ break;
476 default : ShouldNotReachHere();
477 }
478 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
479 }
482 // Helpers for swap and dup
483 void InterpreterMacroAssembler::load_ptr(int n, Register val) {
484 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
485 }
486 void InterpreterMacroAssembler::store_ptr(int n, Register val) {
487 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
488 }
491 void InterpreterMacroAssembler::load_receiver(Register param_count,
492 Register recv) {
493 sll(param_count, Interpreter::logStackElementSize, param_count);
494 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
495 }
497 void InterpreterMacroAssembler::empty_expression_stack() {
498 // Reset Lesp.
499 sub( Lmonitors, wordSize, Lesp );
501 // Reset SP by subtracting more space from Lesp.
502 Label done;
503 verify_oop(Lmethod);
504 assert(G4_scratch != Gframe_size, "Only you can prevent register aliasing!");
506 // A native does not need to do this, since its callee does not change SP.
507 ld(Lmethod, methodOopDesc::access_flags_offset(), Gframe_size); // Load access flags.
508 btst(JVM_ACC_NATIVE, Gframe_size);
509 br(Assembler::notZero, false, Assembler::pt, done);
510 delayed()->nop();
512 // Compute max expression stack+register save area
513 lduh(Lmethod, in_bytes(methodOopDesc::max_stack_offset()), Gframe_size); // Load max stack.
514 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
516 //
517 // now set up a stack frame with the size computed above
518 //
519 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
520 sll( Gframe_size, LogBytesPerWord, Gframe_size );
521 sub( Lesp, Gframe_size, Gframe_size );
522 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
523 debug_only(verify_sp(Gframe_size, G4_scratch));
524 #ifdef _LP64
525 sub(Gframe_size, STACK_BIAS, Gframe_size );
526 #endif
527 mov(Gframe_size, SP);
529 bind(done);
530 }
533 #ifdef ASSERT
534 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
535 Label Bad, OK;
537 // Saved SP must be aligned.
538 #ifdef _LP64
539 btst(2*BytesPerWord-1, Rsp);
540 #else
541 btst(LongAlignmentMask, Rsp);
542 #endif
543 br(Assembler::notZero, false, Assembler::pn, Bad);
544 delayed()->nop();
546 // Saved SP, plus register window size, must not be above FP.
547 add(Rsp, frame::register_save_words * wordSize, Rtemp);
548 #ifdef _LP64
549 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
550 #endif
551 cmp(Rtemp, FP);
552 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad);
553 delayed()->nop();
555 // Saved SP must not be ridiculously below current SP.
556 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
557 set(maxstack, Rtemp);
558 sub(SP, Rtemp, Rtemp);
559 #ifdef _LP64
560 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
561 #endif
562 cmp(Rsp, Rtemp);
563 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad);
564 delayed()->nop();
566 br(Assembler::always, false, Assembler::pn, OK);
567 delayed()->nop();
569 bind(Bad);
570 stop("on return to interpreted call, restored SP is corrupted");
572 bind(OK);
573 }
576 void InterpreterMacroAssembler::verify_esp(Register Resp) {
577 // about to read or write Resp[0]
578 // make sure it is not in the monitors or the register save area
579 Label OK1, OK2;
581 cmp(Resp, Lmonitors);
582 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
583 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
584 stop("too many pops: Lesp points into monitor area");
585 bind(OK1);
586 #ifdef _LP64
587 sub(Resp, STACK_BIAS, Resp);
588 #endif
589 cmp(Resp, SP);
590 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
591 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
592 stop("too many pushes: Lesp points into register window");
593 bind(OK2);
594 }
595 #endif // ASSERT
597 // Load compiled (i2c) or interpreter entry when calling from interpreted and
598 // do the call. Centralized so that all interpreter calls will do the same actions.
599 // If jvmti single stepping is on for a thread we must not call compiled code.
600 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
602 // Assume we want to go compiled if available
604 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
606 if (JvmtiExport::can_post_interpreter_events()) {
607 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
608 // compiled code in threads for which the event is enabled. Check here for
609 // interp_only_mode if these events CAN be enabled.
610 verify_thread();
611 Label skip_compiled_code;
613 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
614 ld(interp_only, scratch);
615 tst(scratch);
616 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code);
617 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
618 bind(skip_compiled_code);
619 }
621 // the i2c_adapters need methodOop in G5_method (right? %%%)
622 // do the call
623 #ifdef ASSERT
624 {
625 Label ok;
626 br_notnull(target, false, Assembler::pt, ok);
627 delayed()->nop();
628 stop("null entry point");
629 bind(ok);
630 }
631 #endif // ASSERT
633 // Adjust Rret first so Llast_SP can be same as Rret
634 add(Rret, -frame::pc_return_offset, O7);
635 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
636 // Record SP so we can remove any stack space allocated by adapter transition
637 jmp(target, 0);
638 delayed()->mov(SP, Llast_SP);
639 }
641 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
642 assert_not_delayed();
644 Label not_taken;
645 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
646 else br (cc, false, Assembler::pn, not_taken);
647 delayed()->nop();
649 TemplateTable::branch(false,false);
651 bind(not_taken);
653 profile_not_taken_branch(G3_scratch);
654 }
657 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
658 int bcp_offset,
659 Register Rtmp,
660 Register Rdst,
661 signedOrNot is_signed,
662 setCCOrNot should_set_CC ) {
663 assert(Rtmp != Rdst, "need separate temp register");
664 assert_not_delayed();
665 switch (is_signed) {
666 default: ShouldNotReachHere();
668 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
669 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
670 }
671 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
672 sll( Rdst, BitsPerByte, Rdst);
673 switch (should_set_CC ) {
674 default: ShouldNotReachHere();
676 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
677 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
678 }
679 }
682 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
683 int bcp_offset,
684 Register Rtmp,
685 Register Rdst,
686 setCCOrNot should_set_CC ) {
687 assert(Rtmp != Rdst, "need separate temp register");
688 assert_not_delayed();
689 add( Lbcp, bcp_offset, Rtmp);
690 andcc( Rtmp, 3, G0);
691 Label aligned;
692 switch (should_set_CC ) {
693 default: ShouldNotReachHere();
695 case set_CC: break;
696 case dont_set_CC: break;
697 }
699 br(Assembler::zero, true, Assembler::pn, aligned);
700 #ifdef _LP64
701 delayed()->ldsw(Rtmp, 0, Rdst);
702 #else
703 delayed()->ld(Rtmp, 0, Rdst);
704 #endif
706 ldub(Lbcp, bcp_offset + 3, Rdst);
707 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
708 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
709 #ifdef _LP64
710 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
711 #else
712 // Unsigned load is faster than signed on some implementations
713 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
714 #endif
715 or3(Rtmp, Rdst, Rdst );
717 bind(aligned);
718 if (should_set_CC == set_CC) tst(Rdst);
719 }
722 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register cache, Register tmp,
723 int bcp_offset, bool giant_index) {
724 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
725 if (!giant_index) {
726 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
727 } else {
728 assert(EnableInvokeDynamic, "giant index used only for EnableInvokeDynamic");
729 get_4_byte_integer_at_bcp(bcp_offset, cache, tmp);
730 assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
731 xor3(tmp, -1, tmp); // convert to plain index
732 }
733 }
736 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
737 int bcp_offset, bool giant_index) {
738 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
739 assert_different_registers(cache, tmp);
740 assert_not_delayed();
741 get_cache_index_at_bcp(cache, tmp, bcp_offset, giant_index);
742 // convert from field index to ConstantPoolCacheEntry index and from
743 // word index to byte offset
744 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
745 add(LcpoolCache, tmp, cache);
746 }
749 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
750 int bcp_offset, bool giant_index) {
751 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
752 assert_different_registers(cache, tmp);
753 assert_not_delayed();
754 assert(!giant_index,"NYI");
755 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
756 // convert from field index to ConstantPoolCacheEntry index
757 // and from word index to byte offset
758 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
759 // skip past the header
760 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
761 // construct pointer to cache entry
762 add(LcpoolCache, tmp, cache);
763 }
766 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
767 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
768 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
769 Register Rsuper_klass,
770 Register Rtmp1,
771 Register Rtmp2,
772 Register Rtmp3,
773 Label &ok_is_subtype ) {
774 Label not_subtype;
776 // Profile the not-null value's klass.
777 profile_typecheck(Rsub_klass, Rtmp1);
779 check_klass_subtype_fast_path(Rsub_klass, Rsuper_klass,
780 Rtmp1, Rtmp2,
781 &ok_is_subtype, ¬_subtype, NULL);
783 check_klass_subtype_slow_path(Rsub_klass, Rsuper_klass,
784 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
785 &ok_is_subtype, NULL);
787 bind(not_subtype);
788 profile_typecheck_failed(Rtmp1);
789 }
791 // Separate these two to allow for delay slot in middle
792 // These are used to do a test and full jump to exception-throwing code.
794 // %%%%% Could possibly reoptimize this by testing to see if could use
795 // a single conditional branch (i.e. if span is small enough.
796 // If you go that route, than get rid of the split and give up
797 // on the delay-slot hack.
799 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
800 Label& ok ) {
801 assert_not_delayed();
802 br(ok_condition, true, pt, ok);
803 // DELAY SLOT
804 }
806 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
807 Label& ok ) {
808 assert_not_delayed();
809 bp( ok_condition, true, Assembler::xcc, pt, ok);
810 // DELAY SLOT
811 }
813 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
814 Label& ok ) {
815 assert_not_delayed();
816 brx(ok_condition, true, pt, ok);
817 // DELAY SLOT
818 }
820 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
821 Register Rscratch,
822 Label& ok ) {
823 assert(throw_entry_point != NULL, "entry point must be generated by now");
824 AddressLiteral dest(throw_entry_point);
825 jump_to(dest, Rscratch);
826 delayed()->nop();
827 bind(ok);
828 }
831 // And if you cannot use the delay slot, here is a shorthand:
833 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
834 address throw_entry_point,
835 Register Rscratch ) {
836 Label ok;
837 if (ok_condition != never) {
838 throw_if_not_1_icc( ok_condition, ok);
839 delayed()->nop();
840 }
841 throw_if_not_2( throw_entry_point, Rscratch, ok);
842 }
843 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
844 address throw_entry_point,
845 Register Rscratch ) {
846 Label ok;
847 if (ok_condition != never) {
848 throw_if_not_1_xcc( ok_condition, ok);
849 delayed()->nop();
850 }
851 throw_if_not_2( throw_entry_point, Rscratch, ok);
852 }
853 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
854 address throw_entry_point,
855 Register Rscratch ) {
856 Label ok;
857 if (ok_condition != never) {
858 throw_if_not_1_x( ok_condition, ok);
859 delayed()->nop();
860 }
861 throw_if_not_2( throw_entry_point, Rscratch, ok);
862 }
864 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
865 // Note: res is still shy of address by array offset into object.
867 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
868 assert_not_delayed();
870 verify_oop(array);
871 #ifdef _LP64
872 // sign extend since tos (index) can be a 32bit value
873 sra(index, G0, index);
874 #endif // _LP64
876 // check array
877 Label ptr_ok;
878 tst(array);
879 throw_if_not_1_x( notZero, ptr_ok );
880 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
881 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
883 Label index_ok;
884 cmp(index, tmp);
885 throw_if_not_1_icc( lessUnsigned, index_ok );
886 if (index_shift > 0) delayed()->sll(index, index_shift, index);
887 else delayed()->add(array, index, res); // addr - const offset in index
888 // convention: move aberrant index into G3_scratch for exception message
889 mov(index, G3_scratch);
890 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
892 // add offset if didn't do it in delay slot
893 if (index_shift > 0) add(array, index, res); // addr - const offset in index
894 }
897 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
898 assert_not_delayed();
900 // pop array
901 pop_ptr(array);
903 // check array
904 index_check_without_pop(array, index, index_shift, tmp, res);
905 }
908 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
909 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
910 }
913 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
914 get_constant_pool(Rdst);
915 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
916 }
919 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
920 get_constant_pool(Rcpool);
921 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
922 }
925 // unlock if synchronized method
926 //
927 // Unlock the receiver if this is a synchronized method.
928 // Unlock any Java monitors from syncronized blocks.
929 //
930 // If there are locked Java monitors
931 // If throw_monitor_exception
932 // throws IllegalMonitorStateException
933 // Else if install_monitor_exception
934 // installs IllegalMonitorStateException
935 // Else
936 // no error processing
937 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
938 bool throw_monitor_exception,
939 bool install_monitor_exception) {
940 Label unlocked, unlock, no_unlock;
942 // get the value of _do_not_unlock_if_synchronized into G1_scratch
943 const Address do_not_unlock_if_synchronized(G2_thread,
944 JavaThread::do_not_unlock_if_synchronized_offset());
945 ldbool(do_not_unlock_if_synchronized, G1_scratch);
946 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
948 // check if synchronized method
949 const Address access_flags(Lmethod, methodOopDesc::access_flags_offset());
950 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
951 push(state); // save tos
952 ld(access_flags, G3_scratch); // Load access flags.
953 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
954 br(zero, false, pt, unlocked);
955 delayed()->nop();
957 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
958 // is set.
959 tstbool(G1_scratch);
960 br(Assembler::notZero, false, pn, no_unlock);
961 delayed()->nop();
963 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
964 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
966 //Intel: if (throw_monitor_exception) ... else ...
967 // Entry already unlocked, need to throw exception
968 //...
970 // pass top-most monitor elem
971 add( top_most_monitor(), O1 );
973 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
974 br_notnull(G3_scratch, false, pt, unlock);
975 delayed()->nop();
977 if (throw_monitor_exception) {
978 // Entry already unlocked need to throw an exception
979 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
980 should_not_reach_here();
981 } else {
982 // Monitor already unlocked during a stack unroll.
983 // If requested, install an illegal_monitor_state_exception.
984 // Continue with stack unrolling.
985 if (install_monitor_exception) {
986 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
987 }
988 ba(false, unlocked);
989 delayed()->nop();
990 }
992 bind(unlock);
994 unlock_object(O1);
996 bind(unlocked);
998 // I0, I1: Might contain return value
1000 // Check that all monitors are unlocked
1001 { Label loop, exception, entry, restart;
1003 Register Rmptr = O0;
1004 Register Rtemp = O1;
1005 Register Rlimit = Lmonitors;
1006 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1007 assert( (delta & LongAlignmentMask) == 0,
1008 "sizeof BasicObjectLock must be even number of doublewords");
1010 #ifdef ASSERT
1011 add(top_most_monitor(), Rmptr, delta);
1012 { Label L;
1013 // ensure that Rmptr starts out above (or at) Rlimit
1014 cmp(Rmptr, Rlimit);
1015 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1016 delayed()->nop();
1017 stop("monitor stack has negative size");
1018 bind(L);
1019 }
1020 #endif
1021 bind(restart);
1022 ba(false, entry);
1023 delayed()->
1024 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1026 // Entry is still locked, need to throw exception
1027 bind(exception);
1028 if (throw_monitor_exception) {
1029 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1030 should_not_reach_here();
1031 } else {
1032 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1033 // Unlock does not block, so don't have to worry about the frame
1034 unlock_object(Rmptr);
1035 if (install_monitor_exception) {
1036 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1037 }
1038 ba(false, restart);
1039 delayed()->nop();
1040 }
1042 bind(loop);
1043 cmp(Rtemp, G0); // check if current entry is used
1044 brx(Assembler::notEqual, false, pn, exception);
1045 delayed()->
1046 dec(Rmptr, delta); // otherwise advance to next entry
1047 #ifdef ASSERT
1048 { Label L;
1049 // ensure that Rmptr has not somehow stepped below Rlimit
1050 cmp(Rmptr, Rlimit);
1051 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1052 delayed()->nop();
1053 stop("ran off the end of the monitor stack");
1054 bind(L);
1055 }
1056 #endif
1057 bind(entry);
1058 cmp(Rmptr, Rlimit); // check if bottom reached
1059 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1060 delayed()->
1061 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1062 }
1064 bind(no_unlock);
1065 pop(state);
1066 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1067 }
1070 // remove activation
1071 //
1072 // Unlock the receiver if this is a synchronized method.
1073 // Unlock any Java monitors from syncronized blocks.
1074 // Remove the activation from the stack.
1075 //
1076 // If there are locked Java monitors
1077 // If throw_monitor_exception
1078 // throws IllegalMonitorStateException
1079 // Else if install_monitor_exception
1080 // installs IllegalMonitorStateException
1081 // Else
1082 // no error processing
1083 void InterpreterMacroAssembler::remove_activation(TosState state,
1084 bool throw_monitor_exception,
1085 bool install_monitor_exception) {
1087 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1089 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1090 notify_method_exit(false, state, NotifyJVMTI);
1092 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1093 verify_oop(Lmethod);
1094 verify_thread();
1096 // return tos
1097 assert(Otos_l1 == Otos_i, "adjust code below");
1098 switch (state) {
1099 #ifdef _LP64
1100 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1101 #else
1102 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1103 #endif
1104 case btos: // fall through
1105 case ctos:
1106 case stos: // fall through
1107 case atos: // fall through
1108 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1109 case ftos: // fall through
1110 case dtos: // fall through
1111 case vtos: /* nothing to do */ break;
1112 default : ShouldNotReachHere();
1113 }
1115 #if defined(COMPILER2) && !defined(_LP64)
1116 if (state == ltos) {
1117 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1118 // or compiled so just be safe use G1 and O0/O1
1120 // Shift bits into high (msb) of G1
1121 sllx(Otos_l1->after_save(), 32, G1);
1122 // Zero extend low bits
1123 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1124 or3 (Otos_l2->after_save(), G1, G1);
1125 }
1126 #endif /* COMPILER2 */
1128 }
1129 #endif /* CC_INTERP */
1132 // Lock object
1133 //
1134 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1135 // it must be initialized with the object to lock
1136 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1137 if (UseHeavyMonitors) {
1138 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1139 }
1140 else {
1141 Register obj_reg = Object;
1142 Register mark_reg = G4_scratch;
1143 Register temp_reg = G1_scratch;
1144 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1145 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1146 Label done;
1148 Label slow_case;
1150 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1152 // load markOop from object into mark_reg
1153 ld_ptr(mark_addr, mark_reg);
1155 if (UseBiasedLocking) {
1156 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1157 }
1159 // get the address of basicLock on stack that will be stored in the object
1160 // we need a temporary register here as we do not want to clobber lock_reg
1161 // (cas clobbers the destination register)
1162 mov(lock_reg, temp_reg);
1163 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1164 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1165 // initialize the box (Must happen before we update the object mark!)
1166 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1167 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1168 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1169 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1170 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1172 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1173 cmp(mark_reg, temp_reg);
1174 brx(Assembler::equal, true, Assembler::pt, done);
1175 delayed()->nop();
1177 // We did not see an unlocked object so try the fast recursive case
1179 // Check if owner is self by comparing the value in the markOop of object
1180 // with the stack pointer
1181 sub(temp_reg, SP, temp_reg);
1182 #ifdef _LP64
1183 sub(temp_reg, STACK_BIAS, temp_reg);
1184 #endif
1185 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1187 // Composite "andcc" test:
1188 // (a) %sp -vs- markword proximity check, and,
1189 // (b) verify mark word LSBs == 0 (Stack-locked).
1190 //
1191 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1192 // Note that the page size used for %sp proximity testing is arbitrary and is
1193 // unrelated to the actual MMU page size. We use a 'logical' page size of
1194 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1195 // field of the andcc instruction.
1196 andcc (temp_reg, 0xFFFFF003, G0) ;
1198 // if condition is true we are done and hence we can store 0 in the displaced
1199 // header indicating it is a recursive lock and be done
1200 brx(Assembler::zero, true, Assembler::pt, done);
1201 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1203 // none of the above fast optimizations worked so we have to get into the
1204 // slow case of monitor enter
1205 bind(slow_case);
1206 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1208 bind(done);
1209 }
1210 }
1212 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1213 //
1214 // Argument - lock_reg points to the BasicObjectLock for lock
1215 // Throw IllegalMonitorException if object is not locked by current thread
1216 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1217 if (UseHeavyMonitors) {
1218 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1219 } else {
1220 Register obj_reg = G3_scratch;
1221 Register mark_reg = G4_scratch;
1222 Register displaced_header_reg = G1_scratch;
1223 Address lockobj_addr(lock_reg, BasicObjectLock::obj_offset_in_bytes());
1224 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1225 Label done;
1227 if (UseBiasedLocking) {
1228 // load the object out of the BasicObjectLock
1229 ld_ptr(lockobj_addr, obj_reg);
1230 biased_locking_exit(mark_addr, mark_reg, done, true);
1231 st_ptr(G0, lockobj_addr); // free entry
1232 }
1234 // Test first if we are in the fast recursive case
1235 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes() + BasicLock::displaced_header_offset_in_bytes());
1236 ld_ptr(lock_addr, displaced_header_reg);
1237 br_null(displaced_header_reg, true, Assembler::pn, done);
1238 delayed()->st_ptr(G0, lockobj_addr); // free entry
1240 // See if it is still a light weight lock, if so we just unlock
1241 // the object and we are done
1243 if (!UseBiasedLocking) {
1244 // load the object out of the BasicObjectLock
1245 ld_ptr(lockobj_addr, obj_reg);
1246 }
1248 // we have the displaced header in displaced_header_reg
1249 // we expect to see the stack address of the basicLock in case the
1250 // lock is still a light weight lock (lock_reg)
1251 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1252 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1253 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1254 cmp(lock_reg, displaced_header_reg);
1255 brx(Assembler::equal, true, Assembler::pn, done);
1256 delayed()->st_ptr(G0, lockobj_addr); // free entry
1258 // The lock has been converted into a heavy lock and hence
1259 // we need to get into the slow case
1261 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1263 bind(done);
1264 }
1265 }
1267 #ifndef CC_INTERP
1269 // Get the method data pointer from the methodOop and set the
1270 // specified register to its value.
1272 void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) {
1273 assert(ProfileInterpreter, "must be profiling interpreter");
1274 Label get_continue;
1276 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1277 test_method_data_pointer(get_continue);
1278 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1279 if (Roff != noreg)
1280 // Roff contains a method data index ("mdi"). It defaults to zero.
1281 add(ImethodDataPtr, Roff, ImethodDataPtr);
1282 bind(get_continue);
1283 }
1285 // Set the method data pointer for the current bcp.
1287 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1288 assert(ProfileInterpreter, "must be profiling interpreter");
1289 Label zero_continue;
1291 // Test MDO to avoid the call if it is NULL.
1292 ld_ptr(Lmethod, methodOopDesc::method_data_offset(), ImethodDataPtr);
1293 test_method_data_pointer(zero_continue);
1294 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1295 set_method_data_pointer_offset(O0);
1296 bind(zero_continue);
1297 }
1299 // Test ImethodDataPtr. If it is null, continue at the specified label
1301 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1302 assert(ProfileInterpreter, "must be profiling interpreter");
1303 #ifdef _LP64
1304 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue);
1305 #else
1306 tst(ImethodDataPtr);
1307 br(Assembler::zero, false, Assembler::pn, zero_continue);
1308 #endif
1309 delayed()->nop();
1310 }
1312 void InterpreterMacroAssembler::verify_method_data_pointer() {
1313 assert(ProfileInterpreter, "must be profiling interpreter");
1314 #ifdef ASSERT
1315 Label verify_continue;
1316 test_method_data_pointer(verify_continue);
1318 // If the mdp is valid, it will point to a DataLayout header which is
1319 // consistent with the bcp. The converse is highly probable also.
1320 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1321 ld_ptr(Lmethod, methodOopDesc::const_offset(), O5);
1322 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1323 add(G3_scratch, O5, G3_scratch);
1324 cmp(Lbcp, G3_scratch);
1325 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1327 Register temp_reg = O5;
1328 delayed()->mov(ImethodDataPtr, temp_reg);
1329 // %%% should use call_VM_leaf here?
1330 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1331 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1332 Address d_save(FP, -sizeof(jdouble) + STACK_BIAS);
1333 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1334 mov(temp_reg->after_save(), O2);
1335 save_thread(L7_thread_cache);
1336 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1337 delayed()->nop();
1338 restore_thread(L7_thread_cache);
1339 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1340 restore();
1341 bind(verify_continue);
1342 #endif // ASSERT
1343 }
1345 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1346 Register cur_bcp,
1347 Register Rtmp,
1348 Label &profile_continue) {
1349 assert(ProfileInterpreter, "must be profiling interpreter");
1350 // Control will flow to "profile_continue" if the counter is less than the
1351 // limit or if we call profile_method()
1353 Label done;
1355 // if no method data exists, and the counter is high enough, make one
1356 #ifdef _LP64
1357 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done);
1358 #else
1359 tst(ImethodDataPtr);
1360 br(Assembler::notZero, false, Assembler::pn, done);
1361 #endif
1363 // Test to see if we should create a method data oop
1364 AddressLiteral profile_limit((address) &InvocationCounter::InterpreterProfileLimit);
1365 #ifdef _LP64
1366 delayed()->nop();
1367 sethi(profile_limit, Rtmp);
1368 #else
1369 delayed()->sethi(profile_limit, Rtmp);
1370 #endif
1371 ld(Rtmp, profile_limit.low10(), Rtmp);
1372 cmp(invocation_count, Rtmp);
1373 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue);
1374 delayed()->nop();
1376 // Build it now.
1377 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp);
1378 set_method_data_pointer_offset(O0);
1379 ba(false, profile_continue);
1380 delayed()->nop();
1381 bind(done);
1382 }
1384 // Store a value at some constant offset from the method data pointer.
1386 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1387 assert(ProfileInterpreter, "must be profiling interpreter");
1388 st_ptr(value, ImethodDataPtr, constant);
1389 }
1391 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1392 Register bumped_count,
1393 bool decrement) {
1394 assert(ProfileInterpreter, "must be profiling interpreter");
1396 // Load the counter.
1397 ld_ptr(counter, bumped_count);
1399 if (decrement) {
1400 // Decrement the register. Set condition codes.
1401 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1403 // If the decrement causes the counter to overflow, stay negative
1404 Label L;
1405 brx(Assembler::negative, true, Assembler::pn, L);
1407 // Store the decremented counter, if it is still negative.
1408 delayed()->st_ptr(bumped_count, counter);
1409 bind(L);
1410 } else {
1411 // Increment the register. Set carry flag.
1412 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1414 // If the increment causes the counter to overflow, pull back by 1.
1415 assert(DataLayout::counter_increment == 1, "subc works");
1416 subc(bumped_count, G0, bumped_count);
1418 // Store the incremented counter.
1419 st_ptr(bumped_count, counter);
1420 }
1421 }
1423 // Increment the value at some constant offset from the method data pointer.
1425 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1426 Register bumped_count,
1427 bool decrement) {
1428 // Locate the counter at a fixed offset from the mdp:
1429 Address counter(ImethodDataPtr, constant);
1430 increment_mdp_data_at(counter, bumped_count, decrement);
1431 }
1433 // Increment the value at some non-fixed (reg + constant) offset from
1434 // the method data pointer.
1436 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1437 int constant,
1438 Register bumped_count,
1439 Register scratch2,
1440 bool decrement) {
1441 // Add the constant to reg to get the offset.
1442 add(ImethodDataPtr, reg, scratch2);
1443 Address counter(scratch2, constant);
1444 increment_mdp_data_at(counter, bumped_count, decrement);
1445 }
1447 // Set a flag value at the current method data pointer position.
1448 // Updates a single byte of the header, to avoid races with other header bits.
1450 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1451 Register scratch) {
1452 assert(ProfileInterpreter, "must be profiling interpreter");
1453 // Load the data header
1454 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1456 // Set the flag
1457 or3(scratch, flag_constant, scratch);
1459 // Store the modified header.
1460 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1461 }
1463 // Test the location at some offset from the method data pointer.
1464 // If it is not equal to value, branch to the not_equal_continue Label.
1465 // Set condition codes to match the nullness of the loaded value.
1467 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1468 Register value,
1469 Label& not_equal_continue,
1470 Register scratch) {
1471 assert(ProfileInterpreter, "must be profiling interpreter");
1472 ld_ptr(ImethodDataPtr, offset, scratch);
1473 cmp(value, scratch);
1474 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1475 delayed()->tst(scratch);
1476 }
1478 // Update the method data pointer by the displacement located at some fixed
1479 // offset from the method data pointer.
1481 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1482 Register scratch) {
1483 assert(ProfileInterpreter, "must be profiling interpreter");
1484 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1485 add(ImethodDataPtr, scratch, ImethodDataPtr);
1486 }
1488 // Update the method data pointer by the displacement located at the
1489 // offset (reg + offset_of_disp).
1491 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1492 int offset_of_disp,
1493 Register scratch) {
1494 assert(ProfileInterpreter, "must be profiling interpreter");
1495 add(reg, offset_of_disp, scratch);
1496 ld_ptr(ImethodDataPtr, scratch, scratch);
1497 add(ImethodDataPtr, scratch, ImethodDataPtr);
1498 }
1500 // Update the method data pointer by a simple constant displacement.
1502 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1503 assert(ProfileInterpreter, "must be profiling interpreter");
1504 add(ImethodDataPtr, constant, ImethodDataPtr);
1505 }
1507 // Update the method data pointer for a _ret bytecode whose target
1508 // was not among our cached targets.
1510 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1511 Register return_bci) {
1512 assert(ProfileInterpreter, "must be profiling interpreter");
1513 push(state);
1514 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1515 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1516 ld_ptr(l_tmp, return_bci);
1517 pop(state);
1518 }
1520 // Count a taken branch in the bytecodes.
1522 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1523 if (ProfileInterpreter) {
1524 Label profile_continue;
1526 // If no method data exists, go to profile_continue.
1527 test_method_data_pointer(profile_continue);
1529 // We are taking a branch. Increment the taken count.
1530 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1532 // The method data pointer needs to be updated to reflect the new target.
1533 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1534 bind (profile_continue);
1535 }
1536 }
1539 // Count a not-taken branch in the bytecodes.
1541 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1542 if (ProfileInterpreter) {
1543 Label profile_continue;
1545 // If no method data exists, go to profile_continue.
1546 test_method_data_pointer(profile_continue);
1548 // We are taking a branch. Increment the not taken count.
1549 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1551 // The method data pointer needs to be updated to correspond to the
1552 // next bytecode.
1553 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1554 bind (profile_continue);
1555 }
1556 }
1559 // Count a non-virtual call in the bytecodes.
1561 void InterpreterMacroAssembler::profile_call(Register scratch) {
1562 if (ProfileInterpreter) {
1563 Label profile_continue;
1565 // If no method data exists, go to profile_continue.
1566 test_method_data_pointer(profile_continue);
1568 // We are making a call. Increment the count.
1569 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1571 // The method data pointer needs to be updated to reflect the new target.
1572 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1573 bind (profile_continue);
1574 }
1575 }
1578 // Count a final call in the bytecodes.
1580 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1581 if (ProfileInterpreter) {
1582 Label profile_continue;
1584 // If no method data exists, go to profile_continue.
1585 test_method_data_pointer(profile_continue);
1587 // We are making a call. Increment the count.
1588 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1590 // The method data pointer needs to be updated to reflect the new target.
1591 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1592 bind (profile_continue);
1593 }
1594 }
1597 // Count a virtual call in the bytecodes.
1599 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1600 Register scratch,
1601 bool receiver_can_be_null) {
1602 if (ProfileInterpreter) {
1603 Label profile_continue;
1605 // If no method data exists, go to profile_continue.
1606 test_method_data_pointer(profile_continue);
1609 Label skip_receiver_profile;
1610 if (receiver_can_be_null) {
1611 Label not_null;
1612 tst(receiver);
1613 brx(Assembler::notZero, false, Assembler::pt, not_null);
1614 delayed()->nop();
1615 // We are making a call. Increment the count for null receiver.
1616 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1617 ba(false, skip_receiver_profile);
1618 delayed()->nop();
1619 bind(not_null);
1620 }
1622 // Record the receiver type.
1623 record_klass_in_profile(receiver, scratch, true);
1624 bind(skip_receiver_profile);
1626 // The method data pointer needs to be updated to reflect the new target.
1627 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1628 bind (profile_continue);
1629 }
1630 }
1632 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1633 Register receiver, Register scratch,
1634 int start_row, Label& done, bool is_virtual_call) {
1635 if (TypeProfileWidth == 0) {
1636 if (is_virtual_call) {
1637 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1638 }
1639 return;
1640 }
1642 int last_row = VirtualCallData::row_limit() - 1;
1643 assert(start_row <= last_row, "must be work left to do");
1644 // Test this row for both the receiver and for null.
1645 // Take any of three different outcomes:
1646 // 1. found receiver => increment count and goto done
1647 // 2. found null => keep looking for case 1, maybe allocate this cell
1648 // 3. found something else => keep looking for cases 1 and 2
1649 // Case 3 is handled by a recursive call.
1650 for (int row = start_row; row <= last_row; row++) {
1651 Label next_test;
1652 bool test_for_null_also = (row == start_row);
1654 // See if the receiver is receiver[n].
1655 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1656 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1657 // delayed()->tst(scratch);
1659 // The receiver is receiver[n]. Increment count[n].
1660 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1661 increment_mdp_data_at(count_offset, scratch);
1662 ba(false, done);
1663 delayed()->nop();
1664 bind(next_test);
1666 if (test_for_null_also) {
1667 Label found_null;
1668 // Failed the equality check on receiver[n]... Test for null.
1669 if (start_row == last_row) {
1670 // The only thing left to do is handle the null case.
1671 if (is_virtual_call) {
1672 brx(Assembler::zero, false, Assembler::pn, found_null);
1673 delayed()->nop();
1674 // Receiver did not match any saved receiver and there is no empty row for it.
1675 // Increment total counter to indicate polymorphic case.
1676 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1677 ba(false, done);
1678 delayed()->nop();
1679 bind(found_null);
1680 } else {
1681 brx(Assembler::notZero, false, Assembler::pt, done);
1682 delayed()->nop();
1683 }
1684 break;
1685 }
1686 // Since null is rare, make it be the branch-taken case.
1687 brx(Assembler::zero, false, Assembler::pn, found_null);
1688 delayed()->nop();
1690 // Put all the "Case 3" tests here.
1691 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call);
1693 // Found a null. Keep searching for a matching receiver,
1694 // but remember that this is an empty (unused) slot.
1695 bind(found_null);
1696 }
1697 }
1699 // In the fall-through case, we found no matching receiver, but we
1700 // observed the receiver[start_row] is NULL.
1702 // Fill in the receiver field and increment the count.
1703 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1704 set_mdp_data_at(recvr_offset, receiver);
1705 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1706 mov(DataLayout::counter_increment, scratch);
1707 set_mdp_data_at(count_offset, scratch);
1708 if (start_row > 0) {
1709 ba(false, done);
1710 delayed()->nop();
1711 }
1712 }
1714 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1715 Register scratch, bool is_virtual_call) {
1716 assert(ProfileInterpreter, "must be profiling");
1717 Label done;
1719 record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call);
1721 bind (done);
1722 }
1725 // Count a ret in the bytecodes.
1727 void InterpreterMacroAssembler::profile_ret(TosState state,
1728 Register return_bci,
1729 Register scratch) {
1730 if (ProfileInterpreter) {
1731 Label profile_continue;
1732 uint row;
1734 // If no method data exists, go to profile_continue.
1735 test_method_data_pointer(profile_continue);
1737 // Update the total ret count.
1738 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1740 for (row = 0; row < RetData::row_limit(); row++) {
1741 Label next_test;
1743 // See if return_bci is equal to bci[n]:
1744 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1745 return_bci, next_test, scratch);
1747 // return_bci is equal to bci[n]. Increment the count.
1748 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1750 // The method data pointer needs to be updated to reflect the new target.
1751 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1752 ba(false, profile_continue);
1753 delayed()->nop();
1754 bind(next_test);
1755 }
1757 update_mdp_for_ret(state, return_bci);
1759 bind (profile_continue);
1760 }
1761 }
1763 // Profile an unexpected null in the bytecodes.
1764 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1765 if (ProfileInterpreter) {
1766 Label profile_continue;
1768 // If no method data exists, go to profile_continue.
1769 test_method_data_pointer(profile_continue);
1771 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1773 // The method data pointer needs to be updated.
1774 int mdp_delta = in_bytes(BitData::bit_data_size());
1775 if (TypeProfileCasts) {
1776 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1777 }
1778 update_mdp_by_constant(mdp_delta);
1780 bind (profile_continue);
1781 }
1782 }
1784 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1785 Register scratch) {
1786 if (ProfileInterpreter) {
1787 Label profile_continue;
1789 // If no method data exists, go to profile_continue.
1790 test_method_data_pointer(profile_continue);
1792 int mdp_delta = in_bytes(BitData::bit_data_size());
1793 if (TypeProfileCasts) {
1794 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1796 // Record the object type.
1797 record_klass_in_profile(klass, scratch, false);
1798 }
1800 // The method data pointer needs to be updated.
1801 update_mdp_by_constant(mdp_delta);
1803 bind (profile_continue);
1804 }
1805 }
1807 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1808 if (ProfileInterpreter && TypeProfileCasts) {
1809 Label profile_continue;
1811 // If no method data exists, go to profile_continue.
1812 test_method_data_pointer(profile_continue);
1814 int count_offset = in_bytes(CounterData::count_offset());
1815 // Back up the address, since we have already bumped the mdp.
1816 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1818 // *Decrement* the counter. We expect to see zero or small negatives.
1819 increment_mdp_data_at(count_offset, scratch, true);
1821 bind (profile_continue);
1822 }
1823 }
1825 // Count the default case of a switch construct.
1827 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1828 if (ProfileInterpreter) {
1829 Label profile_continue;
1831 // If no method data exists, go to profile_continue.
1832 test_method_data_pointer(profile_continue);
1834 // Update the default case count
1835 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1836 scratch);
1838 // The method data pointer needs to be updated.
1839 update_mdp_by_offset(
1840 in_bytes(MultiBranchData::default_displacement_offset()),
1841 scratch);
1843 bind (profile_continue);
1844 }
1845 }
1847 // Count the index'th case of a switch construct.
1849 void InterpreterMacroAssembler::profile_switch_case(Register index,
1850 Register scratch,
1851 Register scratch2,
1852 Register scratch3) {
1853 if (ProfileInterpreter) {
1854 Label profile_continue;
1856 // If no method data exists, go to profile_continue.
1857 test_method_data_pointer(profile_continue);
1859 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1860 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1861 smul(index, scratch, scratch);
1862 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1864 // Update the case count
1865 increment_mdp_data_at(scratch,
1866 in_bytes(MultiBranchData::relative_count_offset()),
1867 scratch2,
1868 scratch3);
1870 // The method data pointer needs to be updated.
1871 update_mdp_by_offset(scratch,
1872 in_bytes(MultiBranchData::relative_displacement_offset()),
1873 scratch2);
1875 bind (profile_continue);
1876 }
1877 }
1879 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1881 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1882 Register Rtemp,
1883 Register Rtemp2 ) {
1885 Register Rlimit = Lmonitors;
1886 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1887 assert( (delta & LongAlignmentMask) == 0,
1888 "sizeof BasicObjectLock must be even number of doublewords");
1890 sub( SP, delta, SP);
1891 sub( Lesp, delta, Lesp);
1892 sub( Lmonitors, delta, Lmonitors);
1894 if (!stack_is_empty) {
1896 // must copy stack contents down
1898 Label start_copying, next;
1900 // untested("monitor stack expansion");
1901 compute_stack_base(Rtemp);
1902 ba( false, start_copying );
1903 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below
1905 // note: must copy from low memory upwards
1906 // On entry to loop,
1907 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
1908 // Loop mutates Rtemp
1910 bind( next);
1912 st_ptr(Rtemp2, Rtemp, 0);
1913 inc(Rtemp, wordSize);
1914 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
1916 bind( start_copying );
1918 brx( notEqual, true, pn, next );
1919 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
1921 // done copying stack
1922 }
1923 }
1925 // Locals
1926 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
1927 assert_not_delayed();
1928 sll(index, Interpreter::logStackElementSize, index);
1929 sub(Llocals, index, index);
1930 ld_ptr(index, 0, dst);
1931 // Note: index must hold the effective address--the iinc template uses it
1932 }
1934 // Just like access_local_ptr but the tag is a returnAddress
1935 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
1936 Register dst ) {
1937 assert_not_delayed();
1938 sll(index, Interpreter::logStackElementSize, index);
1939 sub(Llocals, index, index);
1940 ld_ptr(index, 0, dst);
1941 }
1943 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
1944 assert_not_delayed();
1945 sll(index, Interpreter::logStackElementSize, index);
1946 sub(Llocals, index, index);
1947 ld(index, 0, dst);
1948 // Note: index must hold the effective address--the iinc template uses it
1949 }
1952 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
1953 assert_not_delayed();
1954 sll(index, Interpreter::logStackElementSize, index);
1955 sub(Llocals, index, index);
1956 // First half stored at index n+1 (which grows down from Llocals[n])
1957 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
1958 }
1961 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
1962 assert_not_delayed();
1963 sll(index, Interpreter::logStackElementSize, index);
1964 sub(Llocals, index, index);
1965 ldf(FloatRegisterImpl::S, index, 0, dst);
1966 }
1969 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
1970 assert_not_delayed();
1971 sll(index, Interpreter::logStackElementSize, index);
1972 sub(Llocals, index, index);
1973 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
1974 }
1977 #ifdef ASSERT
1978 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
1979 Label L;
1981 assert(Rindex != Rscratch, "Registers cannot be same");
1982 assert(Rindex != Rscratch1, "Registers cannot be same");
1983 assert(Rlimit != Rscratch, "Registers cannot be same");
1984 assert(Rlimit != Rscratch1, "Registers cannot be same");
1985 assert(Rscratch1 != Rscratch, "Registers cannot be same");
1987 // untested("reg area corruption");
1988 add(Rindex, offset, Rscratch);
1989 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
1990 cmp(Rscratch, Rscratch1);
1991 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1992 delayed()->nop();
1993 stop("regsave area is being clobbered");
1994 bind(L);
1995 }
1996 #endif // ASSERT
1999 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
2000 assert_not_delayed();
2001 sll(index, Interpreter::logStackElementSize, index);
2002 sub(Llocals, index, index);
2003 debug_only(check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);)
2004 st(src, index, 0);
2005 }
2007 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src ) {
2008 assert_not_delayed();
2009 sll(index, Interpreter::logStackElementSize, index);
2010 sub(Llocals, index, index);
2011 #ifdef ASSERT
2012 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
2013 #endif
2014 st_ptr(src, index, 0);
2015 }
2019 void InterpreterMacroAssembler::store_local_ptr( int n, Register src ) {
2020 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2021 }
2023 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2024 assert_not_delayed();
2025 sll(index, Interpreter::logStackElementSize, index);
2026 sub(Llocals, index, index);
2027 #ifdef ASSERT
2028 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2029 #endif
2030 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2031 }
2034 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2035 assert_not_delayed();
2036 sll(index, Interpreter::logStackElementSize, index);
2037 sub(Llocals, index, index);
2038 #ifdef ASSERT
2039 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
2040 #endif
2041 stf(FloatRegisterImpl::S, src, index, 0);
2042 }
2045 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2046 assert_not_delayed();
2047 sll(index, Interpreter::logStackElementSize, index);
2048 sub(Llocals, index, index);
2049 #ifdef ASSERT
2050 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2051 #endif
2052 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2053 }
2056 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2057 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2058 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2059 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2060 }
2063 Address InterpreterMacroAssembler::top_most_monitor() {
2064 return Address(FP, top_most_monitor_byte_offset());
2065 }
2068 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2069 add( Lesp, wordSize, Rdest );
2070 }
2072 #endif /* CC_INTERP */
2074 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2075 assert(UseCompiler, "incrementing must be useful");
2076 #ifdef CC_INTERP
2077 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2078 InvocationCounter::counter_offset());
2079 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2080 InvocationCounter::counter_offset());
2081 #else
2082 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2083 InvocationCounter::counter_offset());
2084 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2085 InvocationCounter::counter_offset());
2086 #endif /* CC_INTERP */
2087 int delta = InvocationCounter::count_increment;
2089 // Load each counter in a register
2090 ld( inv_counter, Rtmp );
2091 ld( be_counter, Rtmp2 );
2093 assert( is_simm13( delta ), " delta too large.");
2095 // Add the delta to the invocation counter and store the result
2096 add( Rtmp, delta, Rtmp );
2098 // Mask the backedge counter
2099 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2101 // Store value
2102 st( Rtmp, inv_counter);
2104 // Add invocation counter + backedge counter
2105 add( Rtmp, Rtmp2, Rtmp);
2107 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2108 }
2110 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2111 assert(UseCompiler, "incrementing must be useful");
2112 #ifdef CC_INTERP
2113 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2114 InvocationCounter::counter_offset());
2115 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2116 InvocationCounter::counter_offset());
2117 #else
2118 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2119 InvocationCounter::counter_offset());
2120 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2121 InvocationCounter::counter_offset());
2122 #endif /* CC_INTERP */
2123 int delta = InvocationCounter::count_increment;
2124 // Load each counter in a register
2125 ld( be_counter, Rtmp );
2126 ld( inv_counter, Rtmp2 );
2128 // Add the delta to the backedge counter
2129 add( Rtmp, delta, Rtmp );
2131 // Mask the invocation counter, add to backedge counter
2132 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2134 // and store the result to memory
2135 st( Rtmp, be_counter );
2137 // Add backedge + invocation counter
2138 add( Rtmp, Rtmp2, Rtmp );
2140 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2141 }
2143 #ifndef CC_INTERP
2144 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2145 Register branch_bcp,
2146 Register Rtmp ) {
2147 Label did_not_overflow;
2148 Label overflow_with_error;
2149 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2150 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2152 AddressLiteral limit(&InvocationCounter::InterpreterBackwardBranchLimit);
2153 load_contents(limit, Rtmp);
2154 cmp(backedge_count, Rtmp);
2155 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow);
2156 delayed()->nop();
2158 // When ProfileInterpreter is on, the backedge_count comes from the
2159 // methodDataOop, which value does not get reset on the call to
2160 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2161 // routine while the method is being compiled, add a second test to make sure
2162 // the overflow function is called only once every overflow_frequency.
2163 if (ProfileInterpreter) {
2164 const int overflow_frequency = 1024;
2165 andcc(backedge_count, overflow_frequency-1, Rtmp);
2166 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2167 delayed()->nop();
2168 }
2170 // overflow in loop, pass branch bytecode
2171 set(6,Rtmp);
2172 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2174 // Was an OSR adapter generated?
2175 // O0 = osr nmethod
2176 tst(O0);
2177 brx(Assembler::zero, false, Assembler::pn, overflow_with_error);
2178 delayed()->nop();
2180 // Has the nmethod been invalidated already?
2181 ld(O0, nmethod::entry_bci_offset(), O2);
2182 cmp(O2, InvalidOSREntryBci);
2183 br(Assembler::equal, false, Assembler::pn, overflow_with_error);
2184 delayed()->nop();
2186 // migrate the interpreter frame off of the stack
2188 mov(G2_thread, L7);
2189 // save nmethod
2190 mov(O0, L6);
2191 set_last_Java_frame(SP, noreg);
2192 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2193 reset_last_Java_frame();
2194 mov(L7, G2_thread);
2196 // move OSR nmethod to I1
2197 mov(L6, I1);
2199 // OSR buffer to I0
2200 mov(O0, I0);
2202 // remove the interpreter frame
2203 restore(I5_savedSP, 0, SP);
2205 // Jump to the osr code.
2206 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2207 jmp(O2, G0);
2208 delayed()->nop();
2210 bind(overflow_with_error);
2212 bind(did_not_overflow);
2213 }
2217 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2218 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2219 }
2222 // local helper function for the verify_oop_or_return_address macro
2223 static bool verify_return_address(methodOopDesc* m, int bci) {
2224 #ifndef PRODUCT
2225 address pc = (address)(m->constMethod())
2226 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2227 // assume it is a valid return address if it is inside m and is preceded by a jsr
2228 if (!m->contains(pc)) return false;
2229 address jsr_pc;
2230 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2231 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2232 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2233 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2234 #endif // PRODUCT
2235 return false;
2236 }
2239 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2240 if (!VerifyOops) return;
2241 // the VM documentation for the astore[_wide] bytecode allows
2242 // the TOS to be not only an oop but also a return address
2243 Label test;
2244 Label skip;
2245 // See if it is an address (in the current method):
2247 mov(reg, Rtmp);
2248 const int log2_bytecode_size_limit = 16;
2249 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2250 br_notnull( Rtmp, false, pt, test );
2251 delayed()->nop();
2253 // %%% should use call_VM_leaf here?
2254 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2255 save_thread(L7_thread_cache);
2256 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2257 delayed()->nop();
2258 restore_thread(L7_thread_cache);
2259 br_notnull( O0, false, pt, skip );
2260 delayed()->restore();
2262 // Perform a more elaborate out-of-line call
2263 // Not an address; verify it:
2264 bind(test);
2265 verify_oop(reg);
2266 bind(skip);
2267 }
2270 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2271 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2272 }
2273 #endif /* CC_INTERP */
2275 // Inline assembly for:
2276 //
2277 // if (thread is in interp_only_mode) {
2278 // InterpreterRuntime::post_method_entry();
2279 // }
2280 // if (DTraceMethodProbes) {
2281 // SharedRuntime::dtrace_method_entry(method, receiver);
2282 // }
2283 // if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2284 // SharedRuntime::rc_trace_method_entry(method, receiver);
2285 // }
2287 void InterpreterMacroAssembler::notify_method_entry() {
2289 // C++ interpreter only uses this for native methods.
2291 // Whenever JVMTI puts a thread in interp_only_mode, method
2292 // entry/exit events are sent for that thread to track stack
2293 // depth. If it is possible to enter interp_only_mode we add
2294 // the code to check if the event should be sent.
2295 if (JvmtiExport::can_post_interpreter_events()) {
2296 Label L;
2297 Register temp_reg = O5;
2298 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2299 ld(interp_only, temp_reg);
2300 tst(temp_reg);
2301 br(zero, false, pt, L);
2302 delayed()->nop();
2303 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2304 bind(L);
2305 }
2307 {
2308 Register temp_reg = O5;
2309 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2310 call_VM_leaf(noreg,
2311 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2312 G2_thread, Lmethod);
2313 }
2315 // RedefineClasses() tracing support for obsolete method entry
2316 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2317 call_VM_leaf(noreg,
2318 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2319 G2_thread, Lmethod);
2320 }
2321 }
2324 // Inline assembly for:
2325 //
2326 // if (thread is in interp_only_mode) {
2327 // // save result
2328 // InterpreterRuntime::post_method_exit();
2329 // // restore result
2330 // }
2331 // if (DTraceMethodProbes) {
2332 // SharedRuntime::dtrace_method_exit(thread, method);
2333 // }
2334 //
2335 // Native methods have their result stored in d_tmp and l_tmp
2336 // Java methods have their result stored in the expression stack
2338 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2339 TosState state,
2340 NotifyMethodExitMode mode) {
2341 // C++ interpreter only uses this for native methods.
2343 // Whenever JVMTI puts a thread in interp_only_mode, method
2344 // entry/exit events are sent for that thread to track stack
2345 // depth. If it is possible to enter interp_only_mode we add
2346 // the code to check if the event should be sent.
2347 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2348 Label L;
2349 Register temp_reg = O5;
2350 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2351 ld(interp_only, temp_reg);
2352 tst(temp_reg);
2353 br(zero, false, pt, L);
2354 delayed()->nop();
2356 // Note: frame::interpreter_frame_result has a dependency on how the
2357 // method result is saved across the call to post_method_exit. For
2358 // native methods it assumes the result registers are saved to
2359 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2360 // implementation will need to be updated too.
2362 save_return_value(state, is_native_method);
2363 call_VM(noreg,
2364 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2365 restore_return_value(state, is_native_method);
2366 bind(L);
2367 }
2369 {
2370 Register temp_reg = O5;
2371 // Dtrace notification
2372 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2373 save_return_value(state, is_native_method);
2374 call_VM_leaf(
2375 noreg,
2376 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2377 G2_thread, Lmethod);
2378 restore_return_value(state, is_native_method);
2379 }
2380 }
2382 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2383 #ifdef CC_INTERP
2384 // result potentially in O0/O1: save it across calls
2385 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2386 #ifdef _LP64
2387 stx(O0, STATE(_native_lresult));
2388 #else
2389 std(O0, STATE(_native_lresult));
2390 #endif
2391 #else // CC_INTERP
2392 if (is_native_call) {
2393 stf(FloatRegisterImpl::D, F0, d_tmp);
2394 #ifdef _LP64
2395 stx(O0, l_tmp);
2396 #else
2397 std(O0, l_tmp);
2398 #endif
2399 } else {
2400 push(state);
2401 }
2402 #endif // CC_INTERP
2403 }
2405 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2406 #ifdef CC_INTERP
2407 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2408 #ifdef _LP64
2409 ldx(STATE(_native_lresult), O0);
2410 #else
2411 ldd(STATE(_native_lresult), O0);
2412 #endif
2413 #else // CC_INTERP
2414 if (is_native_call) {
2415 ldf(FloatRegisterImpl::D, d_tmp, F0);
2416 #ifdef _LP64
2417 ldx(l_tmp, O0);
2418 #else
2419 ldd(l_tmp, O0);
2420 #endif
2421 } else {
2422 pop(state);
2423 }
2424 #endif // CC_INTERP
2425 }