Tue, 24 Jul 2012 10:51:00 -0700
7023639: JSR 292 method handle invocation needs a fast path for compiled code
6984705: JSR 292 method handle creation should not go through JNI
Summary: remove assembly code for JDK 7 chained method handles
Reviewed-by: jrose, twisti, kvn, mhaupt
Contributed-by: John Rose <john.r.rose@oracle.com>, Christian Thalinger <christian.thalinger@oracle.com>, Michael Haupt <michael.haupt@oracle.com>
1 /*
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #ifndef SHARE_VM_ASM_ASSEMBLER_HPP
26 #define SHARE_VM_ASM_ASSEMBLER_HPP
28 #include "code/oopRecorder.hpp"
29 #include "code/relocInfo.hpp"
30 #include "memory/allocation.hpp"
31 #include "utilities/debug.hpp"
32 #include "utilities/growableArray.hpp"
33 #include "utilities/top.hpp"
34 #ifdef TARGET_ARCH_x86
35 # include "register_x86.hpp"
36 # include "vm_version_x86.hpp"
37 #endif
38 #ifdef TARGET_ARCH_sparc
39 # include "register_sparc.hpp"
40 # include "vm_version_sparc.hpp"
41 #endif
42 #ifdef TARGET_ARCH_zero
43 # include "register_zero.hpp"
44 # include "vm_version_zero.hpp"
45 #endif
46 #ifdef TARGET_ARCH_arm
47 # include "register_arm.hpp"
48 # include "vm_version_arm.hpp"
49 #endif
50 #ifdef TARGET_ARCH_ppc
51 # include "register_ppc.hpp"
52 # include "vm_version_ppc.hpp"
53 #endif
55 // This file contains platform-independent assembler declarations.
57 class CodeBuffer;
58 class MacroAssembler;
59 class AbstractAssembler;
60 class Label;
62 /**
63 * Labels represent destinations for control transfer instructions. Such
64 * instructions can accept a Label as their target argument. A Label is
65 * bound to the current location in the code stream by calling the
66 * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind'
67 * method. A Label may be referenced by an instruction before it's bound
68 * (i.e., 'forward referenced'). 'bind' stores the current code offset
69 * in the Label object.
70 *
71 * If an instruction references a bound Label, the offset field(s) within
72 * the instruction are immediately filled in based on the Label's code
73 * offset. If an instruction references an unbound label, that
74 * instruction is put on a list of instructions that must be patched
75 * (i.e., 'resolved') when the Label is bound.
76 *
77 * 'bind' will call the platform-specific 'patch_instruction' method to
78 * fill in the offset field(s) for each unresolved instruction (if there
79 * are any). 'patch_instruction' lives in one of the
80 * cpu/<arch>/vm/assembler_<arch>* files.
81 *
82 * Instead of using a linked list of unresolved instructions, a Label has
83 * an array of unresolved instruction code offsets. _patch_index
84 * contains the total number of forward references. If the Label's array
85 * overflows (i.e., _patch_index grows larger than the array size), a
86 * GrowableArray is allocated to hold the remaining offsets. (The cache
87 * size is 4 for now, which handles over 99.5% of the cases)
88 *
89 * Labels may only be used within a single CodeSection. If you need
90 * to create references between code sections, use explicit relocations.
91 */
92 class Label VALUE_OBJ_CLASS_SPEC {
93 private:
94 enum { PatchCacheSize = 4 };
96 // _loc encodes both the binding state (via its sign)
97 // and the binding locator (via its value) of a label.
98 //
99 // _loc >= 0 bound label, loc() encodes the target (jump) position
100 // _loc == -1 unbound label
101 int _loc;
103 // References to instructions that jump to this unresolved label.
104 // These instructions need to be patched when the label is bound
105 // using the platform-specific patchInstruction() method.
106 //
107 // To avoid having to allocate from the C-heap each time, we provide
108 // a local cache and use the overflow only if we exceed the local cache
109 int _patches[PatchCacheSize];
110 int _patch_index;
111 GrowableArray<int>* _patch_overflow;
113 Label(const Label&) { ShouldNotReachHere(); }
115 public:
117 /**
118 * After binding, be sure 'patch_instructions' is called later to link
119 */
120 void bind_loc(int loc) {
121 assert(loc >= 0, "illegal locator");
122 assert(_loc == -1, "already bound");
123 _loc = loc;
124 }
125 void bind_loc(int pos, int sect); // = bind_loc(locator(pos, sect))
127 #ifndef PRODUCT
128 // Iterates over all unresolved instructions for printing
129 void print_instructions(MacroAssembler* masm) const;
130 #endif // PRODUCT
132 /**
133 * Returns the position of the the Label in the code buffer
134 * The position is a 'locator', which encodes both offset and section.
135 */
136 int loc() const {
137 assert(_loc >= 0, "unbound label");
138 return _loc;
139 }
140 int loc_pos() const; // == locator_pos(loc())
141 int loc_sect() const; // == locator_sect(loc())
143 bool is_bound() const { return _loc >= 0; }
144 bool is_unbound() const { return _loc == -1 && _patch_index > 0; }
145 bool is_unused() const { return _loc == -1 && _patch_index == 0; }
147 /**
148 * Adds a reference to an unresolved displacement instruction to
149 * this unbound label
150 *
151 * @param cb the code buffer being patched
152 * @param branch_loc the locator of the branch instruction in the code buffer
153 */
154 void add_patch_at(CodeBuffer* cb, int branch_loc);
156 /**
157 * Iterate over the list of patches, resolving the instructions
158 * Call patch_instruction on each 'branch_loc' value
159 */
160 void patch_instructions(MacroAssembler* masm);
162 void init() {
163 _loc = -1;
164 _patch_index = 0;
165 _patch_overflow = NULL;
166 }
168 Label() {
169 init();
170 }
171 };
173 // A union type for code which has to assemble both constant and
174 // non-constant operands, when the distinction cannot be made
175 // statically.
176 class RegisterOrConstant VALUE_OBJ_CLASS_SPEC {
177 private:
178 Register _r;
179 intptr_t _c;
181 public:
182 RegisterOrConstant(): _r(noreg), _c(0) {}
183 RegisterOrConstant(Register r): _r(r), _c(0) {}
184 RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {}
186 Register as_register() const { assert(is_register(),""); return _r; }
187 intptr_t as_constant() const { assert(is_constant(),""); return _c; }
189 Register register_or_noreg() const { return _r; }
190 intptr_t constant_or_zero() const { return _c; }
192 bool is_register() const { return _r != noreg; }
193 bool is_constant() const { return _r == noreg; }
194 };
196 // The Abstract Assembler: Pure assembler doing NO optimizations on the
197 // instruction level; i.e., what you write is what you get.
198 // The Assembler is generating code into a CodeBuffer.
199 class AbstractAssembler : public ResourceObj {
200 friend class Label;
202 protected:
203 CodeSection* _code_section; // section within the code buffer
204 address _code_begin; // first byte of code buffer
205 address _code_limit; // first byte after code buffer
206 address _code_pos; // current code generation position
207 OopRecorder* _oop_recorder; // support for relocInfo::oop_type
209 // Code emission & accessing
210 address addr_at(int pos) const { return _code_begin + pos; }
212 // This routine is called with a label is used for an address.
213 // Labels and displacements truck in offsets, but target must return a PC.
214 address target(Label& L); // return _code_section->target(L)
216 bool is8bit(int x) const { return -0x80 <= x && x < 0x80; }
217 bool isByte(int x) const { return 0 <= x && x < 0x100; }
218 bool isShiftCount(int x) const { return 0 <= x && x < 32; }
220 void emit_byte(int x); // emit a single byte
221 void emit_word(int x); // emit a 16-bit word (not a wordSize word!)
222 void emit_long(jint x); // emit a 32-bit word (not a longSize word!)
223 void emit_address(address x); // emit an address (not a longSize word!)
225 // Instruction boundaries (required when emitting relocatable values).
226 class InstructionMark: public StackObj {
227 private:
228 AbstractAssembler* _assm;
230 public:
231 InstructionMark(AbstractAssembler* assm) : _assm(assm) {
232 assert(assm->inst_mark() == NULL, "overlapping instructions");
233 _assm->set_inst_mark();
234 }
235 ~InstructionMark() {
236 _assm->clear_inst_mark();
237 }
238 };
239 friend class InstructionMark;
240 #ifdef ASSERT
241 // Make it return true on platforms which need to verify
242 // instruction boundaries for some operations.
243 inline static bool pd_check_instruction_mark();
245 // Add delta to short branch distance to verify that it still fit into imm8.
246 int _short_branch_delta;
248 int short_branch_delta() const { return _short_branch_delta; }
249 void set_short_branch_delta() { _short_branch_delta = 32; }
250 void clear_short_branch_delta() { _short_branch_delta = 0; }
252 class ShortBranchVerifier: public StackObj {
253 private:
254 AbstractAssembler* _assm;
256 public:
257 ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) {
258 assert(assm->short_branch_delta() == 0, "overlapping instructions");
259 _assm->set_short_branch_delta();
260 }
261 ~ShortBranchVerifier() {
262 _assm->clear_short_branch_delta();
263 }
264 };
265 #else
266 // Dummy in product.
267 class ShortBranchVerifier: public StackObj {
268 public:
269 ShortBranchVerifier(AbstractAssembler* assm) {}
270 };
271 #endif
273 // Label functions
274 void print(Label& L);
276 public:
278 // Creation
279 AbstractAssembler(CodeBuffer* code);
281 // save end pointer back to code buf.
282 void sync();
284 // ensure buf contains all code (call this before using/copying the code)
285 void flush();
287 // min and max values for signed immediate ranges
288 static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1)) ; }
289 static int max_simm(int nbits) { return (intptr_t(1) << (nbits - 1)) - 1; }
291 // Define some:
292 static int min_simm10() { return min_simm(10); }
293 static int min_simm13() { return min_simm(13); }
294 static int min_simm16() { return min_simm(16); }
296 // Test if x is within signed immediate range for nbits
297 static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); }
299 // Define some:
300 static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); }
301 static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); }
302 static bool is_simm10(intptr_t x) { return is_simm(x, 10); }
303 static bool is_simm11(intptr_t x) { return is_simm(x, 11); }
304 static bool is_simm12(intptr_t x) { return is_simm(x, 12); }
305 static bool is_simm13(intptr_t x) { return is_simm(x, 13); }
306 static bool is_simm16(intptr_t x) { return is_simm(x, 16); }
307 static bool is_simm26(intptr_t x) { return is_simm(x, 26); }
308 static bool is_simm32(intptr_t x) { return is_simm(x, 32); }
310 // Accessors
311 CodeBuffer* code() const; // _code_section->outer()
312 CodeSection* code_section() const { return _code_section; }
313 int sect() const; // return _code_section->index()
314 address pc() const { return _code_pos; }
315 int offset() const { return _code_pos - _code_begin; }
316 int locator() const; // CodeBuffer::locator(offset(), sect())
317 OopRecorder* oop_recorder() const { return _oop_recorder; }
318 void set_oop_recorder(OopRecorder* r) { _oop_recorder = r; }
320 address inst_mark() const;
321 void set_inst_mark();
322 void clear_inst_mark();
324 // Constants in code
325 void a_byte(int x);
326 void a_long(jint x);
327 void relocate(RelocationHolder const& rspec, int format = 0);
328 void relocate( relocInfo::relocType rtype, int format = 0) {
329 if (rtype != relocInfo::none)
330 relocate(Relocation::spec_simple(rtype), format);
331 }
333 static int code_fill_byte(); // used to pad out odd-sized code buffers
335 // Associate a comment with the current offset. It will be printed
336 // along with the disassembly when printing nmethods. Currently
337 // only supported in the instruction section of the code buffer.
338 void block_comment(const char* comment);
340 // Label functions
341 void bind(Label& L); // binds an unbound label L to the current code position
343 // Move to a different section in the same code buffer.
344 void set_code_section(CodeSection* cs);
346 // Inform assembler when generating stub code and relocation info
347 address start_a_stub(int required_space);
348 void end_a_stub();
349 // Ditto for constants.
350 address start_a_const(int required_space, int required_align = sizeof(double));
351 void end_a_const();
353 // constants support
354 address long_constant(jlong c) {
355 address ptr = start_a_const(sizeof(c), sizeof(c));
356 if (ptr != NULL) {
357 *(jlong*)ptr = c;
358 _code_pos = ptr + sizeof(c);
359 end_a_const();
360 }
361 return ptr;
362 }
363 address double_constant(jdouble c) {
364 address ptr = start_a_const(sizeof(c), sizeof(c));
365 if (ptr != NULL) {
366 *(jdouble*)ptr = c;
367 _code_pos = ptr + sizeof(c);
368 end_a_const();
369 }
370 return ptr;
371 }
372 address float_constant(jfloat c) {
373 address ptr = start_a_const(sizeof(c), sizeof(c));
374 if (ptr != NULL) {
375 *(jfloat*)ptr = c;
376 _code_pos = ptr + sizeof(c);
377 end_a_const();
378 }
379 return ptr;
380 }
381 address address_constant(address c) {
382 address ptr = start_a_const(sizeof(c), sizeof(c));
383 if (ptr != NULL) {
384 *(address*)ptr = c;
385 _code_pos = ptr + sizeof(c);
386 end_a_const();
387 }
388 return ptr;
389 }
390 address address_constant(address c, RelocationHolder const& rspec) {
391 address ptr = start_a_const(sizeof(c), sizeof(c));
392 if (ptr != NULL) {
393 relocate(rspec);
394 *(address*)ptr = c;
395 _code_pos = ptr + sizeof(c);
396 end_a_const();
397 }
398 return ptr;
399 }
401 // Bootstrapping aid to cope with delayed determination of constants.
402 // Returns a static address which will eventually contain the constant.
403 // The value zero (NULL) stands instead of a constant which is still uncomputed.
404 // Thus, the eventual value of the constant must not be zero.
405 // This is fine, since this is designed for embedding object field
406 // offsets in code which must be generated before the object class is loaded.
407 // Field offsets are never zero, since an object's header (mark word)
408 // is located at offset zero.
409 RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0);
410 RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0);
411 virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0;
412 // Last overloading is platform-dependent; look in assembler_<arch>.cpp.
413 static intptr_t* delayed_value_addr(int(*constant_fn)());
414 static intptr_t* delayed_value_addr(address(*constant_fn)());
415 static void update_delayed_values();
417 // Bang stack to trigger StackOverflowError at a safe location
418 // implementation delegates to machine-specific bang_stack_with_offset
419 void generate_stack_overflow_check( int frame_size_in_bytes );
420 virtual void bang_stack_with_offset(int offset) = 0;
423 /**
424 * A platform-dependent method to patch a jump instruction that refers
425 * to this label.
426 *
427 * @param branch the location of the instruction to patch
428 * @param masm the assembler which generated the branch
429 */
430 void pd_patch_instruction(address branch, address target);
432 #ifndef PRODUCT
433 /**
434 * Platform-dependent method of printing an instruction that needs to be
435 * patched.
436 *
437 * @param branch the instruction to be patched in the buffer.
438 */
439 static void pd_print_patched_instruction(address branch);
440 #endif // PRODUCT
441 };
443 #ifdef TARGET_ARCH_x86
444 # include "assembler_x86.hpp"
445 #endif
446 #ifdef TARGET_ARCH_sparc
447 # include "assembler_sparc.hpp"
448 #endif
449 #ifdef TARGET_ARCH_zero
450 # include "assembler_zero.hpp"
451 #endif
452 #ifdef TARGET_ARCH_arm
453 # include "assembler_arm.hpp"
454 #endif
455 #ifdef TARGET_ARCH_ppc
456 # include "assembler_ppc.hpp"
457 #endif
460 #endif // SHARE_VM_ASM_ASSEMBLER_HPP