Mercurial > jdk8-mips64-public > hotspot / file revision
src/cpu/sparc/vm/c1_FrameMap_sparc.hpp@1d7922586cf6
src/cpu/sparc/vm/c1_FrameMap_sparc.hpp
Tue, 24 Jul 2012 10:51:00 -0700
- author
- twisti
- date
- Tue, 24 Jul 2012 10:51:00 -0700
- changeset 3969
- 1d7922586cf6
- parent 2344
- ac637b7220d1
- child 4051
- 8a02ca5e5576
- permissions
- -rw-r--r--
7023639: JSR 292 method handle invocation needs a fast path for compiled code
6984705: JSR 292 method handle creation should not go through JNI
Summary: remove assembly code for JDK 7 chained method handles
Reviewed-by: jrose, twisti, kvn, mhaupt
Contributed-by: John Rose <john.r.rose@oracle.com>, Christian Thalinger <christian.thalinger@oracle.com>, Michael Haupt <michael.haupt@oracle.com>
1 /*
2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
26 #define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
28 public:
30 enum {
31 nof_reg_args = 6, // registers o0-o5 are available for parameter passing
32 first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord,
33 frame_pad_in_bytes = 0
34 };
36 static const int pd_c_runtime_reserved_arg_size;
38 static LIR_Opr G0_opr;
39 static LIR_Opr G1_opr;
40 static LIR_Opr G2_opr;
41 static LIR_Opr G3_opr;
42 static LIR_Opr G4_opr;
43 static LIR_Opr G5_opr;
44 static LIR_Opr G6_opr;
45 static LIR_Opr G7_opr;
46 static LIR_Opr O0_opr;
47 static LIR_Opr O1_opr;
48 static LIR_Opr O2_opr;
49 static LIR_Opr O3_opr;
50 static LIR_Opr O4_opr;
51 static LIR_Opr O5_opr;
52 static LIR_Opr O6_opr;
53 static LIR_Opr O7_opr;
54 static LIR_Opr L0_opr;
55 static LIR_Opr L1_opr;
56 static LIR_Opr L2_opr;
57 static LIR_Opr L3_opr;
58 static LIR_Opr L4_opr;
59 static LIR_Opr L5_opr;
60 static LIR_Opr L6_opr;
61 static LIR_Opr L7_opr;
62 static LIR_Opr I0_opr;
63 static LIR_Opr I1_opr;
64 static LIR_Opr I2_opr;
65 static LIR_Opr I3_opr;
66 static LIR_Opr I4_opr;
67 static LIR_Opr I5_opr;
68 static LIR_Opr I6_opr;
69 static LIR_Opr I7_opr;
71 static LIR_Opr SP_opr;
72 static LIR_Opr FP_opr;
74 static LIR_Opr G0_oop_opr;
75 static LIR_Opr G1_oop_opr;
76 static LIR_Opr G2_oop_opr;
77 static LIR_Opr G3_oop_opr;
78 static LIR_Opr G4_oop_opr;
79 static LIR_Opr G5_oop_opr;
80 static LIR_Opr G6_oop_opr;
81 static LIR_Opr G7_oop_opr;
82 static LIR_Opr O0_oop_opr;
83 static LIR_Opr O1_oop_opr;
84 static LIR_Opr O2_oop_opr;
85 static LIR_Opr O3_oop_opr;
86 static LIR_Opr O4_oop_opr;
87 static LIR_Opr O5_oop_opr;
88 static LIR_Opr O6_oop_opr;
89 static LIR_Opr O7_oop_opr;
90 static LIR_Opr L0_oop_opr;
91 static LIR_Opr L1_oop_opr;
92 static LIR_Opr L2_oop_opr;
93 static LIR_Opr L3_oop_opr;
94 static LIR_Opr L4_oop_opr;
95 static LIR_Opr L5_oop_opr;
96 static LIR_Opr L6_oop_opr;
97 static LIR_Opr L7_oop_opr;
98 static LIR_Opr I0_oop_opr;
99 static LIR_Opr I1_oop_opr;
100 static LIR_Opr I2_oop_opr;
101 static LIR_Opr I3_oop_opr;
102 static LIR_Opr I4_oop_opr;
103 static LIR_Opr I5_oop_opr;
104 static LIR_Opr I6_oop_opr;
105 static LIR_Opr I7_oop_opr;
107 static LIR_Opr in_long_opr;
108 static LIR_Opr out_long_opr;
109 static LIR_Opr g1_long_single_opr;
111 static LIR_Opr F0_opr;
112 static LIR_Opr F0_double_opr;
114 static LIR_Opr Oexception_opr;
115 static LIR_Opr Oissuing_pc_opr;
117 private:
118 static FloatRegister _fpu_regs [nof_fpu_regs];
120 static LIR_Opr as_long_single_opr(Register r) {
121 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
122 }
123 static LIR_Opr as_long_pair_opr(Register r) {
124 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
125 }
127 public:
129 #ifdef _LP64
130 static LIR_Opr as_long_opr(Register r) {
131 return as_long_single_opr(r);
132 }
133 static LIR_Opr as_pointer_opr(Register r) {
134 return as_long_single_opr(r);
135 }
136 #else
137 static LIR_Opr as_long_opr(Register r) {
138 return as_long_pair_opr(r);
139 }
140 static LIR_Opr as_pointer_opr(Register r) {
141 return as_opr(r);
142 }
143 #endif
144 static LIR_Opr as_float_opr(FloatRegister r) {
145 return LIR_OprFact::single_fpu(r->encoding());
146 }
147 static LIR_Opr as_double_opr(FloatRegister r) {
148 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
149 }
151 static FloatRegister nr2floatreg (int rnr);
153 static VMReg fpu_regname (int n);
155 static bool is_caller_save_register (LIR_Opr reg);
156 static bool is_caller_save_register (Register r);
158 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
159 static int last_cpu_reg() { return pd_last_cpu_reg; }
161 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
