Tue, 28 May 2019 16:35:59 +0800
#9224 Backport of #9173 Refactor read_cpu_info and supported 3A4000/3B4000
Reviewed-by: jiefu
1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "memory/resourceArea.hpp"
30 #include "runtime/java.hpp"
31 #include "runtime/stubCodeGenerator.hpp"
32 #include "vm_version_mips.hpp"
33 #ifdef TARGET_OS_FAMILY_linux
34 # include "os_linux.inline.hpp"
35 #endif
36 #ifdef TARGET_OS_FAMILY_solaris
37 # include "os_solaris.inline.hpp"
38 #endif
39 #ifdef TARGET_OS_FAMILY_windows
40 # include "os_windows.inline.hpp"
41 #endif
42 #ifdef TARGET_OS_FAMILY_bsd
43 # include "os_bsd.inline.hpp"
44 #endif
45 int VM_Version::_features = VM_Version::unknown_m;
46 const char* VM_Version::_features_str = "";
47 void VM_Version::initialize() {
49 _features = determine_features();
50 //no need, Abstract_VM_Version already define it as false
51 _supports_cx8 = true;
53 //////////////////////add some other feature here//////////////////
55 if (UseG1GC && FLAG_IS_DEFAULT(MaxGCPauseMillis)) {
56 FLAG_SET_CMDLINE(uintx, MaxGCPauseMillis, 650);
57 }
59 #ifdef COMPILER2
60 if (MaxVectorSize > 0) {
61 if (!is_power_of_2(MaxVectorSize)) {
62 warning("MaxVectorSize must be a power of 2");
63 MaxVectorSize = 8;
64 }
65 if (MaxVectorSize > 0 && supports_ps()) {
66 MaxVectorSize = 8;
67 }
68 }
69 //
70 // Vector optimization of MIPS works in most cases, but cannot pass hotspot/test/compiler/6340864/TestFloatVect.java.
71 // Vector optimization was closed by default.
72 // The reasons:
73 // 1. The kernel does not have emulation of PS instructions yet, so the emulation of PS instructions must be done in JVM, see JVM_handle_linux_signal.
74 // 2. It seems the gcc4.4.7 had some bug related to ucontext_t, which is used in signal handler to emulate PS instructions.
75 //
76 if (FLAG_IS_DEFAULT(MaxVectorSize)) {
77 MaxVectorSize = 0;
78 }
80 if (is_gs464e()) {
81 if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionMIPS64)) {
82 FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionMIPS64, 1);
83 }
84 } else if (UseCountTrailingZerosInstructionMIPS64) {
85 if (!FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionMIPS64))
86 warning("Only 3A2000/3000 CPUs support UseCountTrailingZerosInstructionMIPS64");
87 FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionMIPS64, 0);
88 }
89 #endif
90 UseSSE = 0; // Only on x86 and x64
92 if (is_loongson()) {
93 if (FLAG_IS_DEFAULT(UseLoongsonISA)) {
94 FLAG_SET_DEFAULT(UseLoongsonISA, 1);
95 }
96 } else if (UseLoongsonISA) {
97 if (!FLAG_IS_DEFAULT(UseLoongsonISA))
98 warning("Only Loongson CPUs support LoongISA");
99 FLAG_SET_DEFAULT(UseLoongsonISA, 0);
100 }
102 if (is_gs464e()) {
103 if (FLAG_IS_DEFAULT(Use3A2000)) {
104 FLAG_SET_DEFAULT(Use3A2000, 1);
105 }
106 } else if (Use3A2000) {
107 if (!FLAG_IS_DEFAULT(Use3A2000))
108 warning("Only 3A2000/3000 CPUs support this option");
109 FLAG_SET_DEFAULT(Use3A2000, 0);
110 }
112 if (is_gs464()) {
113 if (FLAG_IS_DEFAULT(UseSyncLevel)) {
114 FLAG_SET_DEFAULT(UseSyncLevel, 1000);
115 }
116 }
118 if (is_gs464e() || is_gs464v()) {
119 if (FLAG_IS_DEFAULT(UseSyncLevel)) {
120 FLAG_SET_DEFAULT(UseSyncLevel, 2000);
121 }
122 }
124 if (TieredCompilation) {
125 if (!FLAG_IS_DEFAULT(TieredCompilation))
126 warning("TieredCompilation not supported");
127 FLAG_SET_DEFAULT(TieredCompilation, false);
128 }
130 char buf[256];
131 bool is_unknown_loongson_cpu = is_loongson() && !is_gs464() && !is_gs464e() && !is_gs464v() && !is_gs264();
132 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s, UseSyncLevel:%d",
133 (has_l2_cache() ? ", has_l2_cache" : ""),
134 (has_16k_page() ? ", has_16k_page" : ""),
135 (is_loongson() ? ", MIPS-compatible Loongson CPU" : "MIPS"),
136 (is_gs464() ? ", GS464 (3A1000/3B1500)" : ""),
137 (is_gs464e() ? ", GS464E (3A2000/3A3000/3B2000/3B3000)" : ""),
138 (is_gs464v() ? ", GS464V (3A4000/3B4000)" : ""),
139 (is_gs264() ? ", GS264 (2K1000)" : ""),
140 (is_unknown_loongson_cpu ? ", Unknown Loongson CPU" : ""),
141 (UseLoongsonISA ? ", UseLoongsonISA" : ""),
142 (UseCountTrailingZerosInstructionMIPS64 ? ", UseCountTrailingZerosInstructionMIPS64" : ""),
143 (Use3A2000 ? ", Use3A2000" : ""),
144 UseSyncLevel);
146 // buf is started with ", " or is empty
147 _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf);
149 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
150 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
151 }
153 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) {
154 FLAG_SET_DEFAULT(AllocatePrefetchLines, 1);
155 }
157 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize)) {
158 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, 64);
159 }
161 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
162 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64);
163 }
165 if (FLAG_IS_DEFAULT(AllocateInstancePrefetchLines)) {
166 FLAG_SET_DEFAULT(AllocateInstancePrefetchLines, 1);
167 }
169 if (UseSHA) {
170 warning("SHA instructions are not available on this CPU");
171 FLAG_SET_DEFAULT(UseSHA, false);
172 }
174 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
175 warning("SHA intrinsics are not available on this CPU");
176 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
177 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
178 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
179 }
181 NOT_PRODUCT( if (PrintMiscellaneous && Verbose) print_features(); );
182 }
184 void VM_Version::print_features() {
185 tty->print_cr("Version: %s", cpu_features());
186 }
188 int VM_Version::determine_features() {
189 //////////////////////add some other feature here//////////////////
190 int features = platform_features(unknown_m);
191 //spt_16k_page_m;
192 return features;
193 }
195 static int saved_features = 0;
197 void VM_Version::allow_all() {
198 saved_features = _features;
199 _features = all_features_m;
200 }
202 void VM_Version::revert() {
203 _features = saved_features;
204 }