jdk8-mips64-public/hotspot: src/share/vm/opto/machnode.cpp@15120a36272d

8028767: PPC64: (part 121): smaller shared changes needed to build C2
Summary: smaller shared changes required to build the C2 compiler on PPC64.
Reviewed-by: kvn

     1 /*

     2  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    20  * or visit www.oracle.com if you need additional information or have any

    21  * questions.

    22  *

    23  */

    25 #include "precompiled.hpp"

    26 #include "gc_interface/collectedHeap.hpp"

    27 #include "opto/machnode.hpp"

    28 #include "opto/regalloc.hpp"

    30 //=============================================================================

    31 // Return the value requested

    32 // result register lookup, corresponding to int_format

    33 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {

    34   return (int)ra_->get_encode(node);

    35 }

    36 // input register lookup, corresponding to ext_format

    37 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {

    38   return (int)(ra_->get_encode(node->in(idx)));

    39 }

    40 intptr_t  MachOper::constant() const { return 0x00; }

    41 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; }

    42 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }

    43 jfloat  MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }

    44 jlong   MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }

    45 TypeOopPtr *MachOper::oop() const { return NULL; }

    46 int MachOper::ccode() const { return 0x00; }

    47 // A zero, default, indicates this value is not needed.

    48 // May need to lookup the base register, as done in int_ and ext_format

    49 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    50 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    51 int MachOper::scale()  const { return 0x00; }

    52 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }

    53 int MachOper::constant_disp()  const { return 0; }

    54 int MachOper::base_position()  const { return -1; }  // no base input

    55 int MachOper::index_position() const { return -1; }  // no index input

    56 // Check for PC-Relative displacement

    57 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; }

    58 // Return the label

    59 Label*   MachOper::label()  const { ShouldNotReachHere(); return 0; }

    60 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }

    63 //------------------------------negate-----------------------------------------

    64 // Negate conditional branches.  Error for non-branch operands

    65 void MachOper::negate() {

    66   ShouldNotCallThis();

    67 }

    69 //-----------------------------type--------------------------------------------

    70 const Type *MachOper::type() const {

    71   return Type::BOTTOM;

    72 }

    74 //------------------------------in_RegMask-------------------------------------

    75 const RegMask *MachOper::in_RegMask(int index) const {

    76   ShouldNotReachHere();

    77   return NULL;

    78 }

    80 //------------------------------dump_spec--------------------------------------

    81 // Print any per-operand special info

    82 #ifndef PRODUCT

    83 void MachOper::dump_spec(outputStream *st) const { }

    84 #endif

    86 //------------------------------hash-------------------------------------------

    87 // Print any per-operand special info

    88 uint MachOper::hash() const {

    89   ShouldNotCallThis();

    90   return 5;

    91 }

    93 //------------------------------cmp--------------------------------------------

    94 // Print any per-operand special info

    95 uint MachOper::cmp( const MachOper &oper ) const {

    96   ShouldNotCallThis();

    97   return opcode() == oper.opcode();

    98 }

   100 //------------------------------hash-------------------------------------------

   101 // Print any per-operand special info

   102 uint labelOper::hash() const {

   103   return _block_num;

   104 }

   106 //------------------------------cmp--------------------------------------------

   107 // Print any per-operand special info

   108 uint labelOper::cmp( const MachOper &oper ) const {

   109   return (opcode() == oper.opcode()) && (_label == oper.label());

   110 }

   112 //------------------------------hash-------------------------------------------

   113 // Print any per-operand special info

   114 uint methodOper::hash() const {

   115   return (uint)_method;

   116 }

   118 //------------------------------cmp--------------------------------------------

   119 // Print any per-operand special info

   120 uint methodOper::cmp( const MachOper &oper ) const {

   121   return (opcode() == oper.opcode()) && (_method == oper.method());

   122 }

   125 //=============================================================================

   126 //------------------------------MachNode---------------------------------------

   128 //------------------------------emit-------------------------------------------

   129 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {

   130   #ifdef ASSERT

   131   tty->print("missing MachNode emit function: ");

   132   dump();

   133   #endif

   134   ShouldNotCallThis();

   135 }

   137 //---------------------------postalloc_expand----------------------------------

   138 // Expand node after register allocation.

   139 void MachNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {}

   141 //------------------------------size-------------------------------------------

   142 // Size of instruction in bytes

   143 uint MachNode::size(PhaseRegAlloc *ra_) const {

   144   // If a virtual was not defined for this specific instruction,

   145   // Call the helper which finds the size by emitting the bits.

   146   return MachNode::emit_size(ra_);

   147 }

   149 //------------------------------size-------------------------------------------

   150 // Helper function that computes size by emitting code

   151 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {

   152   // Emit into a trash buffer and count bytes emitted.

   153   assert(ra_ == ra_->C->regalloc(), "sanity");

   154   return ra_->C->scratch_emit_size(this);

   155 }

   159 //------------------------------hash-------------------------------------------

   160 uint MachNode::hash() const {

   161   uint no = num_opnds();

   162   uint sum = rule();

   163   for( uint i=0; i<no; i++ )

   164     sum += _opnds[i]->hash();

   165   return sum+Node::hash();

   166 }

   168 //-----------------------------cmp---------------------------------------------

   169 uint MachNode::cmp( const Node &node ) const {

   170   MachNode& n = *((Node&)node).as_Mach();

   171   uint no = num_opnds();

   172   if( no != n.num_opnds() ) return 0;

   173   if( rule() != n.rule() ) return 0;

   174   for( uint i=0; i<no; i++ )    // All operands must match

   175     if( !_opnds[i]->cmp( *n._opnds[i] ) )

   176       return 0;                 // mis-matched operands

   177   return 1;                     // match

   178 }

   180 // Return an equivalent instruction using memory for cisc_operand position

   181 MachNode *MachNode::cisc_version(int offset, Compile* C) {

   182   ShouldNotCallThis();

   183   return NULL;

   184 }

   186 void MachNode::use_cisc_RegMask() {

   187   ShouldNotReachHere();

   188 }

   191 //-----------------------------in_RegMask--------------------------------------

   192 const RegMask &MachNode::in_RegMask( uint idx ) const {

   193   uint numopnds = num_opnds();        // Virtual call for number of operands

   194   uint skipped   = oper_input_base(); // Sum of leaves skipped so far

   195   if( idx < skipped ) {

   196     assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );

   197     assert( idx == 1, "expected base ptr here" );

   198     // debug info can be anywhere

   199     return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];

   200   }

   201   uint opcnt     = 1;                 // First operand

   202   uint num_edges = _opnds[1]->num_edges(); // leaves for first operand

   203   while( idx >= skipped+num_edges ) {

   204     skipped += num_edges;

   205     opcnt++;                          // Bump operand count

   206     assert( opcnt < numopnds, "Accessing non-existent operand" );

   207     num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand

   208   }

   210   const RegMask *rm = cisc_RegMask();

   211   if( rm == NULL || (int)opcnt != cisc_operand() ) {

   212     rm = _opnds[opcnt]->in_RegMask(idx-skipped);

   213   }

   214   return *rm;

   215 }

   217 //-----------------------------memory_inputs--------------------------------

   218 const MachOper*  MachNode::memory_inputs(Node* &base, Node* &index) const {

   219   const MachOper* oper = memory_operand();

   221   if (oper == (MachOper*)-1) {

   222     base = NodeSentinel;

   223     index = NodeSentinel;

   224   } else {

   225     base = NULL;

   226     index = NULL;

   227     if (oper != NULL) {

   228       // It has a unique memory operand.  Find its index.

   229       int oper_idx = num_opnds();

   230       while (--oper_idx >= 0) {

   231         if (_opnds[oper_idx] == oper)  break;

   232       }

   233       int oper_pos = operand_index(oper_idx);

   234       int base_pos = oper->base_position();

   235       if (base_pos >= 0) {

   236         base = _in[oper_pos+base_pos];

   237       }

   238       int index_pos = oper->index_position();

   239       if (index_pos >= 0) {

   240         index = _in[oper_pos+index_pos];

   241       }

   242     }

   243   }

   245   return oper;

   246 }

   248 //-----------------------------get_base_and_disp----------------------------

   249 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {

   251   // Find the memory inputs using our helper function

   252   Node* base;

   253   Node* index;

   254   const MachOper* oper = memory_inputs(base, index);

   256   if (oper == NULL) {

   257     // Base has been set to NULL

   258     offset = 0;

   259   } else if (oper == (MachOper*)-1) {

   260     // Base has been set to NodeSentinel

   261     // There is not a unique memory use here.  We will fall to AliasIdxBot.

   262     offset = Type::OffsetBot;

   263   } else {

   264     // Base may be NULL, even if offset turns out to be != 0

   266     intptr_t disp = oper->constant_disp();

   267     int scale = oper->scale();

   268     // Now we have collected every part of the ADLC MEMORY_INTER.

   269     // See if it adds up to a base + offset.

   270     if (index != NULL) {

   271       const Type* t_index = index->bottom_type();

   272       if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass,

   273                                                                     // EncodeNKlass, LoadConNklass.

   274         // Memory references through narrow oops have a

   275         // funny base so grab the type from the index:

   276         // [R12 + narrow_oop_reg<<3 + offset]

   277         assert(base == NULL, "Memory references through narrow oops have no base");

   278         offset = disp;

   279         adr_type = t_index->make_ptr()->add_offset(offset);

   280         return NULL;

   281       } else if (!index->is_Con()) {

   282         disp = Type::OffsetBot;

   283       } else if (disp != Type::OffsetBot) {

   284         const TypeX* ti = t_index->isa_intptr_t();

   285         if (ti == NULL) {

   286           disp = Type::OffsetBot;  // a random constant??

   287         } else {

   288           disp += ti->get_con() << scale;

   289         }

   290       }

   291     }

   292     offset = disp;

   294     // In i486.ad, indOffset32X uses base==RegI and disp==RegP,

   295     // this will prevent alias analysis without the following support:

   296     // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,

   297     // Add the offset determined by the "base", or use Type::OffsetBot.

   298     if( adr_type == TYPE_PTR_SENTINAL ) {

   299       const TypePtr *t_disp = oper->disp_as_type();  // only !NULL for indOffset32X

   300       if (t_disp != NULL) {

   301         offset = Type::OffsetBot;

   302         const Type* t_base = base->bottom_type();

   303         if (t_base->isa_intptr_t()) {

   304           const TypeX *t_offset = t_base->is_intptr_t();

   305           if( t_offset->is_con() ) {

   306             offset = t_offset->get_con();

   307           }

   308         }

   309         adr_type = t_disp->add_offset(offset);

   310       } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) {

   311         // Use ideal type if it is oop ptr.

   312         const TypePtr *tp = oper->type()->isa_ptr();

   313         if( tp != NULL) {

   314           adr_type = tp;

   315         }

   316       }

   317     }

   319   }

   320   return base;

   321 }

   324 //---------------------------------adr_type---------------------------------

   325 const class TypePtr *MachNode::adr_type() const {

   326   intptr_t offset = 0;

   327   const TypePtr *adr_type = TYPE_PTR_SENTINAL;  // attempt computing adr_type

   328   const Node *base = get_base_and_disp(offset, adr_type);

   329   if( adr_type != TYPE_PTR_SENTINAL ) {

   330     return adr_type;      // get_base_and_disp has the answer

   331   }

   333   // Direct addressing modes have no base node, simply an indirect

   334   // offset, which is always to raw memory.

   335   // %%%%% Someday we'd like to allow constant oop offsets which

   336   // would let Intel load from static globals in 1 instruction.

   337   // Currently Intel requires 2 instructions and a register temp.

   338   if (base == NULL) {

   339     // NULL base, zero offset means no memory at all (a null pointer!)

   340     if (offset == 0) {

   341       return NULL;

   342     }

   343     // NULL base, any offset means any pointer whatever

   344     if (offset == Type::OffsetBot) {

   345       return TypePtr::BOTTOM;

   346     }

   347     // %%% make offset be intptr_t

   348     assert(!Universe::heap()->is_in_reserved(cast_to_oop(offset)), "must be a raw ptr");

   349     return TypeRawPtr::BOTTOM;

   350   }

   352   // base of -1 with no particular offset means all of memory

   353   if (base == NodeSentinel)  return TypePtr::BOTTOM;

   355   const Type* t = base->bottom_type();

   356   if (t->isa_narrowoop() && Universe::narrow_oop_shift() == 0) {

   357     // 32-bit unscaled narrow oop can be the base of any address expression

   358     t = t->make_ptr();

   359   }

   360   if (t->isa_narrowklass() && Universe::narrow_klass_shift() == 0) {

   361     // 32-bit unscaled narrow oop can be the base of any address expression

   362     t = t->make_ptr();

   363   }

   364   if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {

   365     // We cannot assert that the offset does not look oop-ish here.

   366     // Depending on the heap layout the cardmark base could land

   367     // inside some oopish region.  It definitely does for Win2K.

   368     // The sum of cardmark-base plus shift-by-9-oop lands outside

   369     // the oop-ish area but we can't assert for that statically.

   370     return TypeRawPtr::BOTTOM;

   371   }

   373   const TypePtr *tp = t->isa_ptr();

   375   // be conservative if we do not recognize the type

   376   if (tp == NULL) {

   377     assert(false, "this path may produce not optimal code");

   378     return TypePtr::BOTTOM;

   379   }

   380   assert(tp->base() != Type::AnyPtr, "not a bare pointer");

   382   return tp->add_offset(offset);

   383 }

   386 //-----------------------------operand_index---------------------------------

   387 int MachNode::operand_index( uint operand ) const {

   388   if( operand < 1 )  return -1;

   389   assert(operand < num_opnds(), "oob");

   390   if( _opnds[operand]->num_edges() == 0 )  return -1;

   392   uint skipped   = oper_input_base(); // Sum of leaves skipped so far

   393   for (uint opcnt = 1; opcnt < operand; opcnt++) {

   394     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand

   395     skipped += num_edges;

   396   }

   397   return skipped;

   398 }

   400 int MachNode::operand_index(const MachOper *oper) const {

   401   uint skipped = oper_input_base(); // Sum of leaves skipped so far

   402   uint opcnt;

   403   for (opcnt = 1; opcnt < num_opnds(); opcnt++) {

   404     if (_opnds[opcnt] == oper) break;

   405     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand

   406     skipped += num_edges;

   407   }

   408   if (_opnds[opcnt] != oper) return -1;

   409   return skipped;

   410 }

   412 //------------------------------peephole---------------------------------------

   413 // Apply peephole rule(s) to this instruction

   414 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {

   415   return NULL;

   416 }

   418 //------------------------------add_case_label---------------------------------

   419 // Adds the label for the case

   420 void MachNode::add_case_label( int index_num, Label* blockLabel) {

   421   ShouldNotCallThis();

   422 }

   424 //------------------------------method_set-------------------------------------

   425 // Set the absolute address of a method

   426 void MachNode::method_set( intptr_t addr ) {

   427   ShouldNotCallThis();

   428 }

   430 //------------------------------rematerialize----------------------------------

   431 bool MachNode::rematerialize() const {

   432   // Temps are always rematerializable

   433   if (is_MachTemp()) return true;

   435   uint r = rule();              // Match rule

   436   if( r <  Matcher::_begin_rematerialize ||

   437       r >= Matcher::_end_rematerialize )

   438     return false;

   440   // For 2-address instructions, the input live range is also the output

   441   // live range.  Remateralizing does not make progress on the that live range.

   442   if( two_adr() )  return false;

   444   // Check for rematerializing float constants, or not

   445   if( !Matcher::rematerialize_float_constants ) {

   446     int op = ideal_Opcode();

   447     if( op == Op_ConF || op == Op_ConD )

   448       return false;

   449   }

   451   // Defining flags - can't spill these!  Must remateralize.

   452   if( ideal_reg() == Op_RegFlags )

   453     return true;

   455   // Stretching lots of inputs - don't do it.

   456   if( req() > 2 )

   457     return false;

   459   // Don't remateralize somebody with bound inputs - it stretches a

   460   // fixed register lifetime.

   461   uint idx = oper_input_base();

   462   if (req() > idx) {

   463     const RegMask &rm = in_RegMask(idx);

   464     if (rm.is_bound(ideal_reg()))

   465       return false;

   466   }

   468   return true;

   469 }

   471 #ifndef PRODUCT

   472 //------------------------------dump_spec--------------------------------------

   473 // Print any per-operand special info

   474 void MachNode::dump_spec(outputStream *st) const {

   475   uint cnt = num_opnds();

   476   for( uint i=0; i<cnt; i++ )

   477     _opnds[i]->dump_spec(st);

   478   const TypePtr *t = adr_type();

   479   if( t ) {

   480     Compile* C = Compile::current();

   481     if( C->alias_type(t)->is_volatile() )

   482       st->print(" Volatile!");

   483   }

   484 }

   486 //------------------------------dump_format------------------------------------

   487 // access to virtual

   488 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {

   489   format(ra, st); // access to virtual

   490 }

   491 #endif

   493 //=============================================================================

   494 #ifndef PRODUCT

   495 void MachTypeNode::dump_spec(outputStream *st) const {

   496   _bottom_type->dump_on(st);

   497 }

   498 #endif

   501 //=============================================================================

   502 int MachConstantNode::constant_offset() {

   503   // Bind the offset lazily.

   504   if (_constant.offset() == -1) {

   505     Compile::ConstantTable& constant_table = Compile::current()->constant_table();

   506     int offset = constant_table.find_offset(_constant);

   507     // If called from Compile::scratch_emit_size return the

   508     // pre-calculated offset.

   509     // NOTE: If the AD file does some table base offset optimizations

   510     // later the AD file needs to take care of this fact.

   511     if (Compile::current()->in_scratch_emit_size()) {

   512       return constant_table.calculate_table_base_offset() + offset;

   513     }

   514     _constant.set_offset(constant_table.table_base_offset() + offset);

   515   }

   516   return _constant.offset();

   517 }

   519 int MachConstantNode::constant_offset_unchecked() const {

   520   return _constant.offset();

   521 }

   523 //=============================================================================

   524 #ifndef PRODUCT

   525 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {

   526   int reg = ra_->get_reg_first(in(1)->in(_vidx));

   527   st->print("%s %s", Name(), Matcher::regName[reg]);

   528 }

   529 #endif

   531 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {

   532   // only emits entries in the null-pointer exception handler table

   533 }

   534 void MachNullCheckNode::label_set(Label* label, uint block_num) {

   535   // Nothing to emit

   536 }

   537 void MachNullCheckNode::save_label( Label** label, uint* block_num ) {

   538   // Nothing to emit

   539 }

   541 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {

   542   if( idx == 0 ) return RegMask::Empty;

   543   else return in(1)->as_Mach()->out_RegMask();

   544 }

   546 //=============================================================================

   547 const Type *MachProjNode::bottom_type() const {

   548   if( _ideal_reg == fat_proj ) return Type::BOTTOM;

   549   // Try the normal mechanism first

   550   const Type *t = in(0)->bottom_type();

   551   if( t->base() == Type::Tuple ) {

   552     const TypeTuple *tt = t->is_tuple();

   553     if (_con < tt->cnt())

   554       return tt->field_at(_con);

   555   }

   556   // Else use generic type from ideal register set

   557   assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");

   558   return Type::mreg2type[_ideal_reg];

   559 }

   561 const TypePtr *MachProjNode::adr_type() const {

   562   if (bottom_type() == Type::MEMORY) {

   563     // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM

   564     const TypePtr* adr_type = in(0)->adr_type();

   565     #ifdef ASSERT

   566     if (!is_error_reported() && !Node::in_dump())

   567       assert(adr_type != NULL, "source must have adr_type");

   568     #endif

   569     return adr_type;

   570   }

   571   assert(bottom_type()->base() != Type::Memory, "no other memories?");

   572   return NULL;

   573 }

   575 #ifndef PRODUCT

   576 void MachProjNode::dump_spec(outputStream *st) const {

   577   ProjNode::dump_spec(st);

   578   switch (_ideal_reg) {

   579   case unmatched_proj:  st->print("/unmatched");                         break;

   580   case fat_proj:        st->print("/fat"); if (WizardMode) _rout.dump(); break;

   581   }

   582 }

   583 #endif

   585 //=============================================================================

   586 #ifndef PRODUCT

   587 void MachIfNode::dump_spec(outputStream *st) const {

   588   st->print("P=%f, C=%f",_prob, _fcnt);

   589 }

   590 #endif

   592 //=============================================================================

   593 uint MachReturnNode::size_of() const { return sizeof(*this); }

   595 //------------------------------Registers--------------------------------------

   596 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {

   597   return _in_rms[idx];

   598 }

   600 const TypePtr *MachReturnNode::adr_type() const {

   601   // most returns and calls are assumed to consume & modify all of memory

   602   // the matcher will copy non-wide adr_types from ideal originals

   603   return _adr_type;

   604 }

   606 //=============================================================================

   607 const Type *MachSafePointNode::bottom_type() const {  return TypeTuple::MEMBAR; }

   609 //------------------------------Registers--------------------------------------

   610 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {

   611   // Values in the domain use the users calling convention, embodied in the

   612   // _in_rms array of RegMasks.

   613   if( idx < TypeFunc::Parms ) return _in_rms[idx];

   615   if (SafePointNode::needs_polling_address_input() &&

   616       idx == TypeFunc::Parms &&

   617       ideal_Opcode() == Op_SafePoint) {

   618     return MachNode::in_RegMask(idx);

   619   }

   621   // Values outside the domain represent debug info

   622   return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];

   623 }

   626 //=============================================================================

   628 uint MachCallNode::cmp( const Node &n ) const

   629 { return _tf == ((MachCallNode&)n)._tf; }

   630 const Type *MachCallNode::bottom_type() const { return tf()->range(); }

   631 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }

   633 #ifndef PRODUCT

   634 void MachCallNode::dump_spec(outputStream *st) const {

   635   st->print("# ");

   636   tf()->dump_on(st);

   637   if (_cnt != COUNT_UNKNOWN)  st->print(" C=%f",_cnt);

   638   if (jvms() != NULL)  jvms()->dump_spec(st);

   639 }

   640 #endif

   643 bool MachCallNode::return_value_is_used() const {

   644   if (tf()->range()->cnt() == TypeFunc::Parms) {

   645     // void return

   646     return false;

   647   }

   649   // find the projection corresponding to the return value

   650   for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {

   651     Node *use = fast_out(i);

   652     if (!use->is_Proj()) continue;

   653     if (use->as_Proj()->_con == TypeFunc::Parms) {

   654       return true;

   655     }

   656   }

   657   return false;

   658 }

   661 //------------------------------Registers--------------------------------------

   662 const RegMask &MachCallNode::in_RegMask(uint idx) const {

   663   // Values in the domain use the users calling convention, embodied in the

   664   // _in_rms array of RegMasks.

   665   if (idx < tf()->domain()->cnt()) {

   666     return _in_rms[idx];

   667   }

   668   if (idx == mach_constant_base_node_input()) {

   669     return MachConstantBaseNode::static_out_RegMask();

   670   }

   671   // Values outside the domain represent debug info

   672   return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];

   673 }

   675 //=============================================================================

   676 uint MachCallJavaNode::size_of() const { return sizeof(*this); }

   677 uint MachCallJavaNode::cmp( const Node &n ) const {

   678   MachCallJavaNode &call = (MachCallJavaNode&)n;

   679   return MachCallNode::cmp(call) && _method->equals(call._method);

   680 }

   681 #ifndef PRODUCT

   682 void MachCallJavaNode::dump_spec(outputStream *st) const {

   683   if (_method_handle_invoke)

   684     st->print("MethodHandle ");

   685   if (_method) {

   686     _method->print_short_name(st);

   687     st->print(" ");

   688   }

   689   MachCallNode::dump_spec(st);

   690 }

   691 #endif

   693 //------------------------------Registers--------------------------------------

   694 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const {

   695   // Values in the domain use the users calling convention, embodied in the

   696   // _in_rms array of RegMasks.

   697   if (idx < tf()->domain()->cnt()) {

   698     return _in_rms[idx];

   699   }

   700   if (idx == mach_constant_base_node_input()) {

   701     return MachConstantBaseNode::static_out_RegMask();

   702   }

   703   // Values outside the domain represent debug info

   704   Matcher* m = Compile::current()->matcher();

   705   // If this call is a MethodHandle invoke we have to use a different

   706   // debugmask which does not include the register we use to save the

   707   // SP over MH invokes.

   708   RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask;

   709   return *debugmask[in(idx)->ideal_reg()];

   710 }

   712 //=============================================================================

   713 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }

   714 uint MachCallStaticJavaNode::cmp( const Node &n ) const {

   715   MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;

   716   return MachCallJavaNode::cmp(call) && _name == call._name;

   717 }

   719 //----------------------------uncommon_trap_request----------------------------

   720 // If this is an uncommon trap, return the request code, else zero.

   721 int MachCallStaticJavaNode::uncommon_trap_request() const {

   722   if (_name != NULL && !strcmp(_name, "uncommon_trap")) {

   723     return CallStaticJavaNode::extract_uncommon_trap_request(this);

   724   }

   725   return 0;

   726 }

   728 #ifndef PRODUCT

   729 // Helper for summarizing uncommon_trap arguments.

   730 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {

   731   int trap_req = uncommon_trap_request();

   732   if (trap_req != 0) {

   733     char buf[100];

   734     st->print("(%s)",

   735                Deoptimization::format_trap_request(buf, sizeof(buf),

   736                                                    trap_req));

   737   }

   738 }

   740 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {

   741   st->print("Static ");

   742   if (_name != NULL) {

   743     st->print("wrapper for: %s", _name );

   744     dump_trap_args(st);

   745     st->print(" ");

   746   }

   747   MachCallJavaNode::dump_spec(st);

   748 }

   749 #endif

   751 //=============================================================================

   752 #ifndef PRODUCT

   753 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {

   754   st->print("Dynamic ");

   755   MachCallJavaNode::dump_spec(st);

   756 }

   757 #endif

   758 //=============================================================================

   759 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }

   760 uint MachCallRuntimeNode::cmp( const Node &n ) const {

   761   MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;

   762   return MachCallNode::cmp(call) && !strcmp(_name,call._name);

   763 }

   764 #ifndef PRODUCT

   765 void MachCallRuntimeNode::dump_spec(outputStream *st) const {

   766   st->print("%s ",_name);

   767   MachCallNode::dump_spec(st);

   768 }

   769 #endif

   770 //=============================================================================

   771 // A shared JVMState for all HaltNodes.  Indicates the start of debug info

   772 // is at TypeFunc::Parms.  Only required for SOE register spill handling -

   773 // to indicate where the stack-slot-only debug info inputs begin.

   774 // There is no other JVM state needed here.

   775 JVMState jvms_for_throw(0);

   776 JVMState *MachHaltNode::jvms() const {

   777   return &jvms_for_throw;

   778 }

   780 //=============================================================================

   781 #ifndef PRODUCT

   782 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {

   783   st->print("B%d", _block_num);

   784 }

   785 #endif // PRODUCT

   787 //=============================================================================

   788 #ifndef PRODUCT

   789 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {

   790   st->print(INTPTR_FORMAT, _method);

   791 }

   792 #endif // PRODUCT

Mercurial > jdk8-mips64-public > hotspot / file revision

src/share/vm/opto/machnode.cpp@15120a36272d

src/share/vm/opto/machnode.cpp