Fri, 15 Nov 2013 12:01:00 -0800
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
Summary: Add additional, more verbose syntax checks in adlc. Fix printing constant's problem in format().
Reviewed-by: kvn
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
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23 */
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
34 class BufferBlob;
35 class CodeBuffer;
36 class JVMState;
37 class MachCallDynamicJavaNode;
38 class MachCallJavaNode;
39 class MachCallLeafNode;
40 class MachCallNode;
41 class MachCallRuntimeNode;
42 class MachCallStaticJavaNode;
43 class MachEpilogNode;
44 class MachIfNode;
45 class MachNullCheckNode;
46 class MachOper;
47 class MachProjNode;
48 class MachPrologNode;
49 class MachReturnNode;
50 class MachSafePointNode;
51 class MachSpillCopyNode;
52 class Matcher;
53 class PhaseRegAlloc;
54 class RegMask;
55 class State;
57 //---------------------------MachOper------------------------------------------
58 class MachOper : public ResourceObj {
59 public:
60 // Allocate right next to the MachNodes in the same arena
61 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
63 // Opcode
64 virtual uint opcode() const = 0;
66 // Number of input edges.
67 // Generally at least 1
68 virtual uint num_edges() const { return 1; }
69 // Array of Register masks
70 virtual const RegMask *in_RegMask(int index) const;
72 // Methods to output the encoding of the operand
74 // Negate conditional branches. Error for non-branch Nodes
75 virtual void negate();
77 // Return the value requested
78 // result register lookup, corresponding to int_format
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
80 // input register lookup, corresponding to ext_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
83 // helpers for MacroAssembler generation from ADLC
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
85 return ::as_Register(reg(ra_, node));
86 }
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
88 return ::as_Register(reg(ra_, node, idx));
89 }
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_FloatRegister(reg(ra_, node));
92 }
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_FloatRegister(reg(ra_, node, idx));
95 }
97 #if defined(IA32) || defined(AMD64)
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
99 return ::as_XMMRegister(reg(ra_, node));
100 }
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
102 return ::as_XMMRegister(reg(ra_, node, idx));
103 }
104 #endif
106 virtual intptr_t constant() const;
107 virtual relocInfo::relocType constant_reloc() const;
108 virtual jdouble constantD() const;
109 virtual jfloat constantF() const;
110 virtual jlong constantL() const;
111 virtual TypeOopPtr *oop() const;
112 virtual int ccode() const;
113 // A zero, default, indicates this value is not needed.
114 // May need to lookup the base register, as done in int_ and ext_format
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
117 virtual int scale() const;
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
120 // Check for PC-Relative displacement
121 virtual relocInfo::relocType disp_reloc() const;
122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
123 virtual int base_position() const; // base edge position, or -1
124 virtual int index_position() const; // index edge position, or -1
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
127 // Only returns non-null value for i486.ad's indOffset32X
128 virtual const TypePtr *disp_as_type() const { return NULL; }
130 // Return the label
131 virtual Label *label() const;
133 // Return the method's address
134 virtual intptr_t method() const;
136 // Hash and compare over operands are currently identical
137 virtual uint hash() const;
138 virtual uint cmp( const MachOper &oper ) const;
140 // Virtual clone, since I do not know how big the MachOper is.
141 virtual MachOper *clone(Compile* C) const = 0;
143 // Return ideal Type from simple operands. Fail for complex operands.
144 virtual const Type *type() const;
146 // Set an integer offset if we have one, or error otherwise
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
149 #ifndef PRODUCT
150 // Return name of operand
151 virtual const char *Name() const { return "???";}
153 // Methods to output the text version of the operand
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info
159 // Check whether o is a valid oper.
160 static bool notAnOper(const MachOper *o) {
161 if (o == NULL) return true;
162 if (((intptr_t)o & 1) != 0) return true;
163 if (*(address*)o == badAddress) return true; // kill by Node::destruct
164 return false;
165 }
166 #endif // !PRODUCT
167 };
169 //------------------------------MachNode---------------------------------------
170 // Base type for all machine specific nodes. All node classes generated by the
171 // ADLC inherit from this class.
172 class MachNode : public Node {
173 public:
174 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
175 init_class_id(Class_Mach);
176 }
177 // Required boilerplate
178 virtual uint size_of() const { return sizeof(MachNode); }
179 virtual int Opcode() const; // Always equal to MachNode
180 virtual uint rule() const = 0; // Machine-specific opcode
181 // Number of inputs which come before the first operand.
182 // Generally at least 1, to skip the Control input
183 virtual uint oper_input_base() const { return 1; }
185 // Copy inputs and operands to new node of instruction.
186 // Called from cisc_version() and short_branch_version().
187 // !!!! The method's body is defined in ad_<arch>.cpp file.
188 void fill_new_machnode(MachNode *n, Compile* C) const;
190 // Return an equivalent instruction using memory for cisc_operand position
191 virtual MachNode *cisc_version(int offset, Compile* C);
192 // Modify this instruction's register mask to use stack version for cisc_operand
193 virtual void use_cisc_RegMask();
195 // Support for short branches
196 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
198 // Avoid back to back some instructions on some CPUs.
199 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
201 // instruction implemented with a call
202 bool has_call() const { return (flags() & Flag_has_call) != 0; }
204 // First index in _in[] corresponding to operand, or -1 if there is none
205 int operand_index(uint operand) const;
207 // Register class input is expected in
208 virtual const RegMask &in_RegMask(uint) const;
210 // cisc-spillable instructions redefine for use by in_RegMask
211 virtual const RegMask *cisc_RegMask() const { return NULL; }
213 // If this instruction is a 2-address instruction, then return the
214 // index of the input which must match the output. Not nessecary
215 // for instructions which bind the input and output register to the
216 // same singleton regiser (e.g., Intel IDIV which binds AX to be
217 // both an input and an output). It is nessecary when the input and
218 // output have choices - but they must use the same choice.
219 virtual uint two_adr( ) const { return 0; }
221 // Array of complex operand pointers. Each corresponds to zero or
222 // more leafs. Must be set by MachNode constructor to point to an
223 // internal array of MachOpers. The MachOper array is sized by
224 // specific MachNodes described in the ADL.
225 uint _num_opnds;
226 MachOper **_opnds;
227 uint num_opnds() const { return _num_opnds; }
229 // Emit bytes into cbuf
230 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
231 // Expand node after register allocation.
232 // Node is replaced by several nodes in the postalloc expand phase.
233 // Corresponding methods are generated for nodes if they specify
234 // postalloc_expand. See block.cpp for more documentation.
235 virtual bool requires_postalloc_expand() const { return false; }
236 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
237 // Size of instruction in bytes
238 virtual uint size(PhaseRegAlloc *ra_) const;
239 // Helper function that computes size by emitting code
240 virtual uint emit_size(PhaseRegAlloc *ra_) const;
242 // Return the alignment required (in units of relocInfo::addr_unit())
243 // for this instruction (must be a power of 2)
244 virtual int alignment_required() const { return 1; }
246 // Return the padding (in bytes) to be emitted before this
247 // instruction to properly align it.
248 virtual int compute_padding(int current_offset) const { return 0; }
250 // Return number of relocatable values contained in this instruction
251 virtual int reloc() const { return 0; }
253 // Hash and compare over operands. Used to do GVN on machine Nodes.
254 virtual uint hash() const;
255 virtual uint cmp( const Node &n ) const;
257 // Expand method for MachNode, replaces nodes representing pseudo
258 // instructions with a set of nodes which represent real machine
259 // instructions and compute the same value.
260 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
262 // Bottom_type call; value comes from operand0
263 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
264 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
266 // If this is a memory op, return the base pointer and fixed offset.
267 // If there are no such, return NULL. If there are multiple addresses
268 // or the address is indeterminate (rare cases) then return (Node*)-1,
269 // which serves as node bottom.
270 // If the offset is not statically determined, set it to Type::OffsetBot.
271 // This method is free to ignore stack slots if that helps.
272 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
273 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
274 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
276 // Helper for get_base_and_disp: find the base and index input nodes.
277 // Returns the MachOper as determined by memory_operand(), for use, if
278 // needed by the caller. If (MachOper *)-1 is returned, base and index
279 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
280 // index are set to NULL.
281 const MachOper* memory_inputs(Node* &base, Node* &index) const;
283 // Helper for memory_inputs: Which operand carries the necessary info?
284 // By default, returns NULL, which means there is no such operand.
285 // If it returns (MachOper*)-1, this means there are multiple memories.
286 virtual const MachOper* memory_operand() const { return NULL; }
288 // Call "get_base_and_disp" to decide which category of memory is used here.
289 virtual const class TypePtr *adr_type() const;
291 // Apply peephole rule(s) to this instruction
292 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
294 // Top-level ideal Opcode matched
295 virtual int ideal_Opcode() const { return Op_Node; }
297 // Adds the label for the case
298 virtual void add_case_label( int switch_val, Label* blockLabel);
300 // Set the absolute address for methods
301 virtual void method_set( intptr_t addr );
303 // Should we clone rather than spill this instruction?
304 bool rematerialize() const;
306 // Get the pipeline info
307 static const Pipeline *pipeline_class();
308 virtual const Pipeline *pipeline() const;
310 #ifndef PRODUCT
311 virtual const char *Name() const = 0; // Machine-specific name
312 virtual void dump_spec(outputStream *st) const; // Print per-node info
313 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
314 #endif
315 };
317 //------------------------------MachIdealNode----------------------------
318 // Machine specific versions of nodes that must be defined by user.
319 // These are not converted by matcher from ideal nodes to machine nodes
320 // but are inserted into the code by the compiler.
321 class MachIdealNode : public MachNode {
322 public:
323 MachIdealNode( ) {}
325 // Define the following defaults for non-matched machine nodes
326 virtual uint oper_input_base() const { return 0; }
327 virtual uint rule() const { return 9999999; }
328 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
329 };
331 //------------------------------MachTypeNode----------------------------
332 // Machine Nodes that need to retain a known Type.
333 class MachTypeNode : public MachNode {
334 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
335 public:
336 MachTypeNode( ) {}
337 const Type *_bottom_type;
339 virtual const class Type *bottom_type() const { return _bottom_type; }
340 #ifndef PRODUCT
341 virtual void dump_spec(outputStream *st) const;
342 #endif
343 };
345 //------------------------------MachBreakpointNode----------------------------
346 // Machine breakpoint or interrupt Node
347 class MachBreakpointNode : public MachIdealNode {
348 public:
349 MachBreakpointNode( ) {}
350 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
351 virtual uint size(PhaseRegAlloc *ra_) const;
353 #ifndef PRODUCT
354 virtual const char *Name() const { return "Breakpoint"; }
355 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
356 #endif
357 };
359 //------------------------------MachConstantBaseNode--------------------------
360 // Machine node that represents the base address of the constant table.
361 class MachConstantBaseNode : public MachIdealNode {
362 public:
363 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
365 public:
366 MachConstantBaseNode() : MachIdealNode() {
367 init_class_id(Class_MachConstantBase);
368 }
369 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
370 virtual uint ideal_reg() const { return Op_RegP; }
371 virtual uint oper_input_base() const { return 1; }
373 virtual bool requires_postalloc_expand() const;
374 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
376 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
377 virtual uint size(PhaseRegAlloc* ra_) const;
378 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
380 static const RegMask& static_out_RegMask() { return _out_RegMask; }
381 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
383 #ifndef PRODUCT
384 virtual const char* Name() const { return "MachConstantBaseNode"; }
385 virtual void format(PhaseRegAlloc*, outputStream* st) const;
386 #endif
387 };
389 //------------------------------MachConstantNode-------------------------------
390 // Machine node that holds a constant which is stored in the constant table.
391 class MachConstantNode : public MachTypeNode {
392 protected:
393 Compile::Constant _constant; // This node's constant.
395 public:
396 MachConstantNode() : MachTypeNode() {
397 init_class_id(Class_MachConstant);
398 }
400 virtual void eval_constant(Compile* C) {
401 #ifdef ASSERT
402 tty->print("missing MachConstantNode eval_constant function: ");
403 dump();
404 #endif
405 ShouldNotCallThis();
406 }
408 virtual const RegMask &in_RegMask(uint idx) const {
409 if (idx == mach_constant_base_node_input())
410 return MachConstantBaseNode::static_out_RegMask();
411 return MachNode::in_RegMask(idx);
412 }
414 // Input edge of MachConstantBaseNode.
415 uint mach_constant_base_node_input() const { return req() - 1; }
417 int constant_offset();
418 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
419 // Unchecked version to avoid assertions in debug output.
420 int constant_offset_unchecked() const;
421 };
423 //------------------------------MachUEPNode-----------------------------------
424 // Machine Unvalidated Entry Point Node
425 class MachUEPNode : public MachIdealNode {
426 public:
427 MachUEPNode( ) {}
428 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
429 virtual uint size(PhaseRegAlloc *ra_) const;
431 #ifndef PRODUCT
432 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
433 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
434 #endif
435 };
437 //------------------------------MachPrologNode--------------------------------
438 // Machine function Prolog Node
439 class MachPrologNode : public MachIdealNode {
440 public:
441 MachPrologNode( ) {}
442 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
443 virtual uint size(PhaseRegAlloc *ra_) const;
444 virtual int reloc() const;
446 #ifndef PRODUCT
447 virtual const char *Name() const { return "Prolog"; }
448 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
449 #endif
450 };
452 //------------------------------MachEpilogNode--------------------------------
453 // Machine function Epilog Node
454 class MachEpilogNode : public MachIdealNode {
455 public:
456 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
457 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
458 virtual uint size(PhaseRegAlloc *ra_) const;
459 virtual int reloc() const;
460 virtual const Pipeline *pipeline() const;
462 private:
463 bool _do_polling;
465 public:
466 bool do_polling() const { return _do_polling; }
468 // Offset of safepoint from the beginning of the node
469 int safepoint_offset() const;
471 #ifndef PRODUCT
472 virtual const char *Name() const { return "Epilog"; }
473 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
474 #endif
475 };
477 //------------------------------MachNopNode-----------------------------------
478 // Machine function Nop Node
479 class MachNopNode : public MachIdealNode {
480 private:
481 int _count;
482 public:
483 MachNopNode( ) : _count(1) {}
484 MachNopNode( int count ) : _count(count) {}
485 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
486 virtual uint size(PhaseRegAlloc *ra_) const;
488 virtual const class Type *bottom_type() const { return Type::CONTROL; }
490 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
491 virtual const Pipeline *pipeline() const;
492 #ifndef PRODUCT
493 virtual const char *Name() const { return "Nop"; }
494 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
495 virtual void dump_spec(outputStream *st) const { } // No per-operand info
496 #endif
497 };
499 //------------------------------MachSpillCopyNode------------------------------
500 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
501 // location (stack or register).
502 class MachSpillCopyNode : public MachIdealNode {
503 const RegMask *_in; // RegMask for input
504 const RegMask *_out; // RegMask for output
505 const Type *_type;
506 public:
507 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
508 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
509 init_class_id(Class_MachSpillCopy);
510 init_flags(Flag_is_Copy);
511 add_req(NULL);
512 add_req(n);
513 }
514 virtual uint size_of() const { return sizeof(*this); }
515 void set_out_RegMask(const RegMask &out) { _out = &out; }
516 void set_in_RegMask(const RegMask &in) { _in = ∈ }
517 virtual const RegMask &out_RegMask() const { return *_out; }
518 virtual const RegMask &in_RegMask(uint) const { return *_in; }
519 virtual const class Type *bottom_type() const { return _type; }
520 virtual uint ideal_reg() const { return _type->ideal_reg(); }
521 virtual uint oper_input_base() const { return 1; }
522 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
524 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
525 virtual uint size(PhaseRegAlloc *ra_) const;
527 #ifndef PRODUCT
528 virtual const char *Name() const { return "MachSpillCopy"; }
529 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
530 #endif
531 };
533 //------------------------------MachBranchNode--------------------------------
534 // Abstract machine branch Node
535 class MachBranchNode : public MachIdealNode {
536 public:
537 MachBranchNode() : MachIdealNode() {
538 init_class_id(Class_MachBranch);
539 }
540 virtual void label_set(Label* label, uint block_num) = 0;
541 virtual void save_label(Label** label, uint* block_num) = 0;
543 // Support for short branches
544 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
546 virtual bool pinned() const { return true; };
547 };
549 //------------------------------MachNullChkNode--------------------------------
550 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
551 // also some kind of memory op. Turns the indicated MachNode into a
552 // conditional branch with good latency on the ptr-not-null path and awful
553 // latency on the pointer-is-null path.
555 class MachNullCheckNode : public MachBranchNode {
556 public:
557 const uint _vidx; // Index of memop being tested
558 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
559 init_class_id(Class_MachNullCheck);
560 add_req(ctrl);
561 add_req(memop);
562 }
563 virtual uint size_of() const { return sizeof(*this); }
565 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
566 virtual void label_set(Label* label, uint block_num);
567 virtual void save_label(Label** label, uint* block_num);
568 virtual void negate() { }
569 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
570 virtual uint ideal_reg() const { return NotAMachineReg; }
571 virtual const RegMask &in_RegMask(uint) const;
572 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
573 #ifndef PRODUCT
574 virtual const char *Name() const { return "NullCheck"; }
575 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
576 #endif
577 };
579 //------------------------------MachProjNode----------------------------------
580 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
581 // just MachNodes made by the Ideal world that replicate simple projections
582 // but with machine-dependent input & output register masks. Generally
583 // produced as part of calling conventions. Normally I make MachNodes as part
584 // of the Matcher process, but the Matcher is ill suited to issues involving
585 // frame handling, so frame handling is all done in the Ideal world with
586 // occasional callbacks to the machine model for important info.
587 class MachProjNode : public ProjNode {
588 public:
589 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
590 init_class_id(Class_MachProj);
591 }
592 RegMask _rout;
593 const uint _ideal_reg;
594 enum projType {
595 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
596 fat_proj = 999 // Projs killing many regs, defined by _rout
597 };
598 virtual int Opcode() const;
599 virtual const Type *bottom_type() const;
600 virtual const TypePtr *adr_type() const;
601 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
602 virtual const RegMask &out_RegMask() const { return _rout; }
603 virtual uint ideal_reg() const { return _ideal_reg; }
604 // Need size_of() for virtual ProjNode::clone()
605 virtual uint size_of() const { return sizeof(MachProjNode); }
606 #ifndef PRODUCT
607 virtual void dump_spec(outputStream *st) const;
608 #endif
609 };
611 //------------------------------MachIfNode-------------------------------------
612 // Machine-specific versions of IfNodes
613 class MachIfNode : public MachBranchNode {
614 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
615 public:
616 float _prob; // Probability branch goes either way
617 float _fcnt; // Frequency counter
618 MachIfNode() : MachBranchNode() {
619 init_class_id(Class_MachIf);
620 }
621 // Negate conditional branches.
622 virtual void negate() = 0;
623 #ifndef PRODUCT
624 virtual void dump_spec(outputStream *st) const;
625 #endif
626 };
628 //------------------------------MachGotoNode-----------------------------------
629 // Machine-specific versions of GotoNodes
630 class MachGotoNode : public MachBranchNode {
631 public:
632 MachGotoNode() : MachBranchNode() {
633 init_class_id(Class_MachGoto);
634 }
635 };
637 //------------------------------MachFastLockNode-------------------------------------
638 // Machine-specific versions of FastLockNodes
639 class MachFastLockNode : public MachNode {
640 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
641 public:
642 BiasedLockingCounters* _counters;
644 MachFastLockNode() : MachNode() {}
645 };
647 //------------------------------MachReturnNode--------------------------------
648 // Machine-specific versions of subroutine returns
649 class MachReturnNode : public MachNode {
650 virtual uint size_of() const; // Size is bigger
651 public:
652 RegMask *_in_rms; // Input register masks, set during allocation
653 ReallocMark _nesting; // assertion check for reallocations
654 const TypePtr* _adr_type; // memory effects of call or return
655 MachReturnNode() : MachNode() {
656 init_class_id(Class_MachReturn);
657 _adr_type = TypePtr::BOTTOM; // the default: all of memory
658 }
660 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
662 virtual const RegMask &in_RegMask(uint) const;
663 virtual bool pinned() const { return true; };
664 virtual const TypePtr *adr_type() const;
665 };
667 //------------------------------MachSafePointNode-----------------------------
668 // Machine-specific versions of safepoints
669 class MachSafePointNode : public MachReturnNode {
670 public:
671 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
672 JVMState* _jvms; // Pointer to list of JVM State Objects
673 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
674 OopMap* oop_map() const { return _oop_map; }
675 void set_oop_map(OopMap* om) { _oop_map = om; }
677 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
678 init_class_id(Class_MachSafePoint);
679 }
681 virtual JVMState* jvms() const { return _jvms; }
682 void set_jvms(JVMState* s) {
683 _jvms = s;
684 }
685 virtual const Type *bottom_type() const;
687 virtual const RegMask &in_RegMask(uint) const;
689 // Functionality from old debug nodes
690 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
691 Node *frameptr () const { return in(TypeFunc::FramePtr); }
693 Node *local(const JVMState* jvms, uint idx) const {
694 assert(verify_jvms(jvms), "jvms must match");
695 return in(_jvmadj + jvms->locoff() + idx);
696 }
697 Node *stack(const JVMState* jvms, uint idx) const {
698 assert(verify_jvms(jvms), "jvms must match");
699 return in(_jvmadj + jvms->stkoff() + idx);
700 }
701 Node *monitor_obj(const JVMState* jvms, uint idx) const {
702 assert(verify_jvms(jvms), "jvms must match");
703 return in(_jvmadj + jvms->monitor_obj_offset(idx));
704 }
705 Node *monitor_box(const JVMState* jvms, uint idx) const {
706 assert(verify_jvms(jvms), "jvms must match");
707 return in(_jvmadj + jvms->monitor_box_offset(idx));
708 }
709 void set_local(const JVMState* jvms, uint idx, Node *c) {
710 assert(verify_jvms(jvms), "jvms must match");
711 set_req(_jvmadj + jvms->locoff() + idx, c);
712 }
713 void set_stack(const JVMState* jvms, uint idx, Node *c) {
714 assert(verify_jvms(jvms), "jvms must match");
715 set_req(_jvmadj + jvms->stkoff() + idx, c);
716 }
717 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
718 assert(verify_jvms(jvms), "jvms must match");
719 set_req(_jvmadj + jvms->monoff() + idx, c);
720 }
721 };
723 //------------------------------MachCallNode----------------------------------
724 // Machine-specific versions of subroutine calls
725 class MachCallNode : public MachSafePointNode {
726 protected:
727 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
728 virtual uint cmp( const Node &n ) const;
729 virtual uint size_of() const = 0; // Size is bigger
730 public:
731 const TypeFunc *_tf; // Function type
732 address _entry_point; // Address of the method being called
733 float _cnt; // Estimate of number of times called
734 uint _argsize; // Size of argument block on stack
736 const TypeFunc* tf() const { return _tf; }
737 const address entry_point() const { return _entry_point; }
738 const float cnt() const { return _cnt; }
739 uint argsize() const { return _argsize; }
741 void set_tf(const TypeFunc* tf) { _tf = tf; }
742 void set_entry_point(address p) { _entry_point = p; }
743 void set_cnt(float c) { _cnt = c; }
744 void set_argsize(int s) { _argsize = s; }
746 MachCallNode() : MachSafePointNode() {
747 init_class_id(Class_MachCall);
748 }
750 virtual const Type *bottom_type() const;
751 virtual bool pinned() const { return false; }
752 virtual const Type *Value( PhaseTransform *phase ) const;
753 virtual const RegMask &in_RegMask(uint) const;
754 virtual int ret_addr_offset() { return 0; }
756 bool returns_long() const { return tf()->return_type() == T_LONG; }
757 bool return_value_is_used() const;
758 #ifndef PRODUCT
759 virtual void dump_spec(outputStream *st) const;
760 #endif
761 };
763 //------------------------------MachCallJavaNode------------------------------
764 // "Base" class for machine-specific versions of subroutine calls
765 class MachCallJavaNode : public MachCallNode {
766 protected:
767 virtual uint cmp( const Node &n ) const;
768 virtual uint size_of() const; // Size is bigger
769 public:
770 ciMethod* _method; // Method being direct called
771 int _bci; // Byte Code index of call byte code
772 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
773 bool _method_handle_invoke; // Tells if the call has to preserve SP
774 MachCallJavaNode() : MachCallNode() {
775 init_class_id(Class_MachCallJava);
776 }
778 virtual const RegMask &in_RegMask(uint) const;
780 #ifndef PRODUCT
781 virtual void dump_spec(outputStream *st) const;
782 #endif
783 };
785 //------------------------------MachCallStaticJavaNode------------------------
786 // Machine-specific versions of monomorphic subroutine calls
787 class MachCallStaticJavaNode : public MachCallJavaNode {
788 virtual uint cmp( const Node &n ) const;
789 virtual uint size_of() const; // Size is bigger
790 public:
791 const char *_name; // Runtime wrapper name
792 MachCallStaticJavaNode() : MachCallJavaNode() {
793 init_class_id(Class_MachCallStaticJava);
794 }
796 // If this is an uncommon trap, return the request code, else zero.
797 int uncommon_trap_request() const;
799 virtual int ret_addr_offset();
800 #ifndef PRODUCT
801 virtual void dump_spec(outputStream *st) const;
802 void dump_trap_args(outputStream *st) const;
803 #endif
804 };
806 //------------------------------MachCallDynamicJavaNode------------------------
807 // Machine-specific versions of possibly megamorphic subroutine calls
808 class MachCallDynamicJavaNode : public MachCallJavaNode {
809 public:
810 int _vtable_index;
811 MachCallDynamicJavaNode() : MachCallJavaNode() {
812 init_class_id(Class_MachCallDynamicJava);
813 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
814 }
815 virtual int ret_addr_offset();
816 #ifndef PRODUCT
817 virtual void dump_spec(outputStream *st) const;
818 #endif
819 };
821 //------------------------------MachCallRuntimeNode----------------------------
822 // Machine-specific versions of subroutine calls
823 class MachCallRuntimeNode : public MachCallNode {
824 virtual uint cmp( const Node &n ) const;
825 virtual uint size_of() const; // Size is bigger
826 public:
827 const char *_name; // Printable name, if _method is NULL
828 MachCallRuntimeNode() : MachCallNode() {
829 init_class_id(Class_MachCallRuntime);
830 }
831 virtual int ret_addr_offset();
832 #ifndef PRODUCT
833 virtual void dump_spec(outputStream *st) const;
834 #endif
835 };
837 class MachCallLeafNode: public MachCallRuntimeNode {
838 public:
839 MachCallLeafNode() : MachCallRuntimeNode() {
840 init_class_id(Class_MachCallLeaf);
841 }
842 };
844 //------------------------------MachHaltNode-----------------------------------
845 // Machine-specific versions of halt nodes
846 class MachHaltNode : public MachReturnNode {
847 public:
848 virtual JVMState* jvms() const;
849 };
852 //------------------------------MachTempNode-----------------------------------
853 // Node used by the adlc to construct inputs to represent temporary registers
854 class MachTempNode : public MachNode {
855 private:
856 MachOper *_opnd_array[1];
858 public:
859 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
860 virtual uint rule() const { return 9999999; }
861 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
863 MachTempNode(MachOper* oper) {
864 init_class_id(Class_MachTemp);
865 _num_opnds = 1;
866 _opnds = _opnd_array;
867 add_req(NULL);
868 _opnds[0] = oper;
869 }
870 virtual uint size_of() const { return sizeof(MachTempNode); }
872 #ifndef PRODUCT
873 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
874 virtual const char *Name() const { return "MachTemp";}
875 #endif
876 };
880 //------------------------------labelOper--------------------------------------
881 // Machine-independent version of label operand
882 class labelOper : public MachOper {
883 private:
884 virtual uint num_edges() const { return 0; }
885 public:
886 // Supported for fixed size branches
887 Label* _label; // Label for branch(es)
889 uint _block_num;
891 labelOper() : _block_num(0), _label(0) {}
893 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
895 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
897 virtual MachOper *clone(Compile* C) const;
899 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
901 virtual uint opcode() const;
903 virtual uint hash() const;
904 virtual uint cmp( const MachOper &oper ) const;
905 #ifndef PRODUCT
906 virtual const char *Name() const { return "Label";}
908 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
909 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
910 #endif
911 };
914 //------------------------------methodOper--------------------------------------
915 // Machine-independent version of method operand
916 class methodOper : public MachOper {
917 private:
918 virtual uint num_edges() const { return 0; }
919 public:
920 intptr_t _method; // Address of method
921 methodOper() : _method(0) {}
922 methodOper(intptr_t method) : _method(method) {}
924 virtual MachOper *clone(Compile* C) const;
926 virtual intptr_t method() const { return _method; }
928 virtual uint opcode() const;
930 virtual uint hash() const;
931 virtual uint cmp( const MachOper &oper ) const;
932 #ifndef PRODUCT
933 virtual const char *Name() const { return "Method";}
935 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
936 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
937 #endif
938 };
940 #endif // SHARE_VM_OPTO_MACHNODE_HPP