src/cpu/sparc/vm/frame_sparc.hpp

Tue, 03 Aug 2010 08:13:38 -0400

author
bobv
date
Tue, 03 Aug 2010 08:13:38 -0400
changeset 2036
126ea7725993
parent 1907
c18cbe5936b8
child 2142
84713fd87632
permissions
-rw-r--r--

6953477: Increase portability and flexibility of building Hotspot
Summary: A collection of portability improvements including shared code support for PPC, ARM platforms, software floating point, cross compilation support and improvements in error crash detail.
Reviewed-by: phh, never, coleenp, dholmes

     1 /*
     2  * Copyright (c) 1997, 2006, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 // A frame represents a physical stack frame (an activation).  Frames can be
    26 // C or Java frames, and the Java frames can be interpreted or compiled.
    27 // In contrast, vframes represent source-level activations, so that one physical frame
    28 // can correspond to multiple source level frames because of inlining.
    29 // A frame is comprised of {pc, sp, younger_sp}
    32 // Layout of asm interpreter frame:
    33 //
    34 //  0xfffffff
    35 //  ......
    36 // [last  extra incoming arg,  (local # Nargs > 6 ? Nargs-1 : undef)]
    37 // .. Note: incoming args are copied to local frame area upon entry
    38 // [first extra incoming arg,  (local # Nargs > 6 ? 6       : undef)]
    39 // [6 words for C-arg storage (unused)] Are this and next one really needed?
    40 // [C-aggregate-word (unused)] Yes, if want extra params to be  in same place as C convention
    41 // [16 words for register saving]                                    <--- FP
    42 // [interpreter_frame_vm_locals ] (see below)
    44 //              Note: Llocals is always double-word aligned
    45 // [first local i.e. local # 0]        <-- Llocals
    46 // ...
    47 // [last local, i.e. local # Nlocals-1]
    49 // [monitors                 ]
    50 // ....
    51 // [monitors                 ]    <-- Lmonitors (same as Llocals + 6*4 if none)
    52 //                                    (must be double-word aligned because
    53 //                                     monitor element size is constrained to
    54 //                                     doubleword)
    55 //
    56 //                                <-- Lesp (points 1 past TOS)
    57 // [bottom word used for stack ]
    58 // ...
    59 // [top word used for stack]    (first word of stack is double-word aligned)
    61 // [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)]
    62 // [6 words for C-arg storage]
    63 // [C-aggregate-word (unused)]
    64 // [16 words for register saving]                                    <--- SP
    65 // ...
    66 // 0x0000000
    67 //
    68 // The in registers and local registers are preserved in a block at SP.
    69 //
    70 // The first six in registers (I0..I5) hold the first six locals.
    71 // The locals are used as follows:
    72 //    Lesp         first free element of expression stack
    73 //                 (which grows towards __higher__ addresses)
    74 //    Lbcp         is set to address of bytecode to execute
    75 //                 It is accessed in the frame under the name "bcx".
    76 //                 It may at times (during GC) be an index instead.
    77 //    Lmethod      the method being interpreted
    78 //    Llocals      the base pointer for accessing the locals array
    79 //                 (lower-numbered locals have lower addresses)
    80 //    Lmonitors    the base pointer for accessing active monitors
    81 //    Lcache       a saved pointer to the method's constant pool cache
    82 //
    83 //
    84 // When calling out to another method,
    85 // G5_method is set to method to call, G5_inline_cache_klass may be set,
    86 // parameters are put in O registers, and also extra parameters
    87 // must be cleverly copied from the top of stack to the outgoing param area in the frame,
    88 // ------------------------------ C++ interpreter ----------------------------------------
    89 // Layout of C++ interpreter frame:
    90 //
    94 // All frames:
    96  public:
    98   enum {
    99     // normal return address is 2 words past PC
   100     pc_return_offset                             = 2 * BytesPerInstWord,
   102     // size of each block, in order of increasing address:
   103     register_save_words                          = 16,
   104 #ifdef _LP64
   105     callee_aggregate_return_pointer_words        =  0,
   106 #else
   107     callee_aggregate_return_pointer_words        =  1,
   108 #endif
   109     callee_register_argument_save_area_words     =  6,
   110     // memory_parameter_words                    = <arbitrary>,
   112     // offset of each block, in order of increasing address:
   113     // (note: callee_register_argument_save_area_words == Assembler::n_register_parameters)
   114     register_save_words_sp_offset                = 0,
   115     callee_aggregate_return_pointer_sp_offset    = register_save_words_sp_offset + register_save_words,
   116     callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words,
   117     memory_parameter_word_sp_offset              = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words,
   118     varargs_offset                               = memory_parameter_word_sp_offset
   119   };
   121  private:
   122   intptr_t*  _younger_sp;                 // optional SP of callee (used to locate O7)
   123   int        _sp_adjustment_by_callee;   // adjustment in words to SP by callee for making locals contiguous
   125   // Note:  On SPARC, unlike Intel, the saved PC for a stack frame
   126   // is stored at a __variable__ distance from that frame's SP.
   127   // (In fact, it may be in the register save area of the callee frame,
   128   // but that fact need not bother us.)  Thus, we must store the
   129   // address of that saved PC explicitly.  On the other hand, SPARC
   130   // stores the FP for a frame at a fixed offset from the frame's SP,
   131   // so there is no need for a separate "frame::_fp" field.
   133  public:
   134   // Accessors
   136   intptr_t* younger_sp() const {
   137     assert(_younger_sp != NULL, "frame must possess a younger_sp");
   138     return _younger_sp;
   139   }
   141   int callee_sp_adjustment() const { return _sp_adjustment_by_callee; }
   142   void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; }
   144   // Constructors
   146   // This constructor relies on the fact that the creator of a frame
   147   // has flushed register windows which the frame will refer to, and
   148   // that those register windows will not be reloaded until the frame is
   149   // done reading and writing the stack.  Moreover, if the "younger_sp"
   150   // argument points into the register save area of the next younger
   151   // frame (though it need not), the register window for that next
   152   // younger frame must also stay flushed.  (The caller is responsible
   153   // for ensuring this.)
   155   frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false);
   157   // make a deficient frame which doesn't know where its PC is:
   158   enum unpatchable_t { unpatchable };
   159   frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL);
   161   // Walk from sp outward looking for old_sp, and return old_sp's predecessor
   162   // (i.e. return the sp from the frame where old_sp is the fp).
   163   // Register windows are assumed to be flushed for the stack in question.
   165   static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp);
   167   // Return true if sp is a younger sp in the stack described by valid_sp.
   168   static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp);
   170  public:
   171   // accessors for the instance variables
   172   intptr_t*   fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); }
   174   // All frames
   176   intptr_t*  fp_addr_at(int index) const   { return &fp()[index];    }
   177   intptr_t*  sp_addr_at(int index) const   { return &sp()[index];    }
   178   intptr_t   fp_at(     int index) const   { return *fp_addr_at(index); }
   179   intptr_t   sp_at(     int index) const   { return *sp_addr_at(index); }
   181  private:
   182   inline address* I7_addr() const;
   183   inline address* O7_addr() const;
   185   inline address* I0_addr() const;
   186   inline address* O0_addr() const;
   187   intptr_t*  younger_sp_addr_at(int index) const   { return &younger_sp()[index];    }
   189  public:
   190   // access to SPARC arguments and argument registers
   192   // Assumes reg is an in/local register
   193   intptr_t*     register_addr(Register reg) const {
   194     return sp_addr_at(reg->sp_offset_in_saved_window());
   195   }
   197   // Assumes reg is an out register
   198   intptr_t*     out_register_addr(Register reg) const {
   199     return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window());
   200   }
   201   intptr_t* memory_param_addr(int param_ix, bool is_in) const {
   202     int offset = callee_register_argument_save_area_sp_offset + param_ix;
   203     if (is_in)
   204       return fp_addr_at(offset);
   205     else
   206       return sp_addr_at(offset);
   207   }
   208   intptr_t*        param_addr(int param_ix, bool is_in) const {
   209     if (param_ix >= callee_register_argument_save_area_words)
   210       return memory_param_addr(param_ix, is_in);
   211     else if (is_in)
   212       return register_addr(Argument(param_ix, true).as_register());
   213     else {
   214       // the registers are stored in the next younger frame
   215       // %%% is this really necessary?
   216       ShouldNotReachHere();
   217       return NULL;
   218     }
   219   }
   222   // Interpreter frames
   224  public:
   225   // Asm interpreter
   226 #ifndef CC_INTERP
   227   enum interpreter_frame_vm_locals {
   228        // 2 words, also used to save float regs across  calls to C
   229        interpreter_frame_d_scratch_fp_offset          = -2,
   230        interpreter_frame_l_scratch_fp_offset          = -4,
   231        interpreter_frame_padding_offset               = -5, // for native calls only
   232        interpreter_frame_oop_temp_offset              = -6, // for native calls only
   233        interpreter_frame_vm_locals_fp_offset          = -6, // should be same as above, and should be zero mod 8
   235        interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset,
   238        // interpreter frame set-up needs to save 2 extra words in outgoing param area
   239        // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_
   241        interpreter_frame_extra_outgoing_argument_words = 2
   242   };
   243 #else
   244   enum interpreter_frame_vm_locals {
   245        // 2 words, also used to save float regs across  calls to C
   246        interpreter_state_ptr_offset                   = 0,  // Is in L0 (Lstate) in save area
   247        interpreter_frame_mirror_offset                = 1,  // Is in L1 (Lmirror) in save area (for native calls only)
   249        // interpreter frame set-up needs to save 2 extra words in outgoing param area
   250        // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_
   252        interpreter_frame_extra_outgoing_argument_words = 2
   253   };
   254 #endif /* CC_INTERP */
   256   // the compiler frame has many of the same fields as the interpreter frame
   257   // %%%%% factor out declarations of the shared fields
   258   enum compiler_frame_fixed_locals {
   259        compiler_frame_d_scratch_fp_offset          = -2,
   260        compiler_frame_vm_locals_fp_offset          = -2, // should be same as above
   262        compiler_frame_vm_local_words = -compiler_frame_vm_locals_fp_offset
   263   };
   265  private:
   267   constantPoolCacheOop* frame::interpreter_frame_cpoolcache_addr() const;
   269 #ifndef CC_INTERP
   271   // where Lmonitors is saved:
   272   BasicObjectLock**  interpreter_frame_monitors_addr() const {
   273     return (BasicObjectLock**) sp_addr_at(Lmonitors->sp_offset_in_saved_window());
   274   }
   275   intptr_t** interpreter_frame_esp_addr() const {
   276     return (intptr_t**)sp_addr_at(Lesp->sp_offset_in_saved_window());
   277   }
   279   inline void interpreter_frame_set_tos_address(intptr_t* x);
   282   // %%%%% Another idea: instead of defining 3 fns per item, just define one returning a ref
   284   // monitors:
   286   // next two fns read and write Lmonitors value,
   287  private:
   288   BasicObjectLock* interpreter_frame_monitors()           const  { return *interpreter_frame_monitors_addr(); }
   289   void interpreter_frame_set_monitors(BasicObjectLock* monitors) {        *interpreter_frame_monitors_addr() = monitors; }
   290 #else
   291  public:
   292   inline interpreterState get_interpreterState() const {
   293     return ((interpreterState)sp_at(interpreter_state_ptr_offset));
   294   }
   297 #endif /* CC_INTERP */
   301  // Compiled frames
   303  public:
   304   // Tells if this register can hold 64 bits on V9 (really, V8+).
   305   static bool holds_a_doubleword(Register reg) {
   306 #ifdef _LP64
   307     //    return true;
   308     return reg->is_out() || reg->is_global();
   309 #else
   310     return reg->is_out() || reg->is_global();
   311 #endif
   312   }

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