1.1 --- a/src/cpu/x86/vm/sharedRuntime_x86_64.cpp Thu Jul 02 16:18:19 2009 -0700 1.2 +++ b/src/cpu/x86/vm/sharedRuntime_x86_64.cpp Mon Jul 13 14:58:17 2009 -0700 1.3 @@ -1302,22 +1302,19 @@ 1.4 1.5 const Register ic_reg = rax; 1.6 const Register receiver = j_rarg0; 1.7 - const Register tmp = rdx; 1.8 1.9 Label ok; 1.10 Label exception_pending; 1.11 1.12 + assert_different_registers(ic_reg, receiver, rscratch1); 1.13 __ verify_oop(receiver); 1.14 - __ push(tmp); // spill (any other registers free here???) 1.15 - __ load_klass(tmp, receiver); 1.16 - __ cmpq(ic_reg, tmp); 1.17 + __ load_klass(rscratch1, receiver); 1.18 + __ cmpq(ic_reg, rscratch1); 1.19 __ jcc(Assembler::equal, ok); 1.20 1.21 - __ pop(tmp); 1.22 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 1.23 1.24 __ bind(ok); 1.25 - __ pop(tmp); 1.26 1.27 // Verified entry point must be aligned 1.28 __ align(8);