1.1 --- a/src/cpu/sparc/vm/interp_masm_sparc.cpp Thu Aug 11 12:08:11 2011 -0700 1.2 +++ b/src/cpu/sparc/vm/interp_masm_sparc.cpp Tue Aug 16 04:14:05 2011 -0700 1.3 @@ -758,6 +758,20 @@ 1.4 } 1.5 1.6 1.7 +void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register cache, 1.8 + Register temp, 1.9 + Register bytecode, 1.10 + int byte_no, 1.11 + int bcp_offset, 1.12 + size_t index_size) { 1.13 + get_cache_and_index_at_bcp(cache, temp, bcp_offset, index_size); 1.14 + ld_ptr(cache, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset(), bytecode); 1.15 + const int shift_count = (1 + byte_no) * BitsPerByte; 1.16 + srl( bytecode, shift_count, bytecode); 1.17 + and3(bytecode, 0xFF, bytecode); 1.18 +} 1.19 + 1.20 + 1.21 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp, 1.22 int bcp_offset, size_t index_size) { 1.23 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");