1.1 --- a/src/cpu/x86/vm/assembler_x86.inline.hpp Tue Nov 23 15:01:43 2010 -0500
1.2 +++ b/src/cpu/x86/vm/assembler_x86.inline.hpp Tue Nov 23 13:22:55 2010 -0800
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 *
1.9 * This code is free software; you can redistribute it and/or modify it
1.10 @@ -22,6 +22,14 @@
1.11 *
1.12 */
1.13
1.14 +#ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
1.15 +#define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
1.16 +
1.17 +#include "asm/assembler.inline.hpp"
1.18 +#include "asm/codeBuffer.hpp"
1.19 +#include "code/codeCache.hpp"
1.20 +#include "runtime/handles.inline.hpp"
1.21 +
1.22 inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
1.23 unsigned char op = branch[0];
1.24 assert(op == 0xE8 /* call */ ||
1.25 @@ -85,3 +93,5 @@
1.26 code_section()->set_end(_code_pos);
1.27 }
1.28 #endif // _LP64
1.29 +
1.30 +#endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
