1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 1.2 +++ b/src/os_cpu/aix_ppc/vm/prefetch_aix_ppc.inline.hpp Wed Apr 27 01:25:04 2016 +0800 1.3 @@ -0,0 +1,58 @@ 1.4 +/* 1.5 + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. 1.6 + * Copyright 2012, 2013 SAP AG. All rights reserved. 1.7 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 1.8 + * 1.9 + * This code is free software; you can redistribute it and/or modify it 1.10 + * under the terms of the GNU General Public License version 2 only, as 1.11 + * published by the Free Software Foundation. 1.12 + * 1.13 + * This code is distributed in the hope that it will be useful, but WITHOUT 1.14 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1.15 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1.16 + * version 2 for more details (a copy is included in the LICENSE file that 1.17 + * accompanied this code). 1.18 + * 1.19 + * You should have received a copy of the GNU General Public License version 1.20 + * 2 along with this work; if not, write to the Free Software Foundation, 1.21 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 1.22 + * 1.23 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 1.24 + * or visit www.oracle.com if you need additional information or have any 1.25 + * questions. 1.26 + * 1.27 + */ 1.28 + 1.29 +#ifndef OS_CPU_AIX_PPC_64_VM_PREFETCH_AIX_PPC_64_INLINE_HPP 1.30 +#define OS_CPU_AIX_PPC_64_VM_PREFETCH_AIX_PPC_64_INLINE_HPP 1.31 + 1.32 +#include "runtime/prefetch.hpp" 1.33 + 1.34 + 1.35 +inline void Prefetch::read(void *loc, intx interval) { 1.36 +#if !defined(USE_XLC_BUILTINS) 1.37 + __asm__ __volatile__ ( 1.38 + " dcbt 0, %0 \n" 1.39 + : 1.40 + : /*%0*/"r" ( ((address)loc) +((long)interval) ) 1.41 + //: 1.42 + ); 1.43 +#else 1.44 + __dcbt(((address)loc) +((long)interval)); 1.45 +#endif 1.46 +} 1.47 + 1.48 +inline void Prefetch::write(void *loc, intx interval) { 1.49 +#if !defined(USE_XLC_PREFETCH_WRITE_BUILTIN) 1.50 + __asm__ __volatile__ ( 1.51 + " dcbtst 0, %0 \n" 1.52 + : 1.53 + : /*%0*/"r" ( ((address)loc) +((long)interval) ) 1.54 + //: 1.55 + ); 1.56 +#else 1.57 + __dcbtst( ((address)loc) +((long)interval) ); 1.58 +#endif 1.59 +} 1.60 + 1.61 +#endif // OS_CPU_AIX_PPC_64_VM_PREFETCH_AIX_PPC_64_INLINE_HPP