1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/x86/vm/relocInfo_x86.cpp Wed Apr 27 01:25:04 2016 +0800
1.3 @@ -0,0 +1,225 @@
1.4 +/*
1.5 + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.23 + * or visit www.oracle.com if you need additional information or have any
1.24 + * questions.
1.25 + *
1.26 + */
1.27 +
1.28 +#include "precompiled.hpp"
1.29 +#include "asm/macroAssembler.hpp"
1.30 +#include "code/relocInfo.hpp"
1.31 +#include "nativeInst_x86.hpp"
1.32 +#include "oops/oop.inline.hpp"
1.33 +#include "runtime/safepoint.hpp"
1.34 +
1.35 +
1.36 +void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
1.37 +#ifdef AMD64
1.38 + x += o;
1.39 + typedef Assembler::WhichOperand WhichOperand;
1.40 + WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
1.41 + assert(which == Assembler::disp32_operand ||
1.42 + which == Assembler::narrow_oop_operand ||
1.43 + which == Assembler::imm_operand, "format unpacks ok");
1.44 + if (which == Assembler::imm_operand) {
1.45 + if (verify_only) {
1.46 + assert(*pd_address_in_code() == x, "instructions must match");
1.47 + } else {
1.48 + *pd_address_in_code() = x;
1.49 + }
1.50 + } else if (which == Assembler::narrow_oop_operand) {
1.51 + address disp = Assembler::locate_operand(addr(), which);
1.52 + // both compressed oops and compressed classes look the same
1.53 + if (Universe::heap()->is_in_reserved((oop)x)) {
1.54 + if (verify_only) {
1.55 + assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
1.56 + } else {
1.57 + *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x);
1.58 + }
1.59 + } else {
1.60 + if (verify_only) {
1.61 + assert(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
1.62 + } else {
1.63 + *(int32_t*) disp = Klass::encode_klass((Klass*)x);
1.64 + }
1.65 + }
1.66 + } else {
1.67 + // Note: Use runtime_call_type relocations for call32_operand.
1.68 + address ip = addr();
1.69 + address disp = Assembler::locate_operand(ip, which);
1.70 + address next_ip = Assembler::locate_next_instruction(ip);
1.71 + if (verify_only) {
1.72 + assert(*(int32_t*) disp == (x - next_ip), "instructions must match");
1.73 + } else {
1.74 + *(int32_t*) disp = x - next_ip;
1.75 + }
1.76 + }
1.77 +#else
1.78 + if (verify_only) {
1.79 + assert(*pd_address_in_code() == (x + o), "instructions must match");
1.80 + } else {
1.81 + *pd_address_in_code() = x + o;
1.82 + }
1.83 +#endif // AMD64
1.84 +}
1.85 +
1.86 +
1.87 +address Relocation::pd_call_destination(address orig_addr) {
1.88 + intptr_t adj = 0;
1.89 + if (orig_addr != NULL) {
1.90 + // We just moved this call instruction from orig_addr to addr().
1.91 + // This means its target will appear to have grown by addr() - orig_addr.
1.92 + adj = -( addr() - orig_addr );
1.93 + }
1.94 + NativeInstruction* ni = nativeInstruction_at(addr());
1.95 + if (ni->is_call()) {
1.96 + return nativeCall_at(addr())->destination() + adj;
1.97 + } else if (ni->is_jump()) {
1.98 + return nativeJump_at(addr())->jump_destination() + adj;
1.99 + } else if (ni->is_cond_jump()) {
1.100 + return nativeGeneralJump_at(addr())->jump_destination() + adj;
1.101 + } else if (ni->is_mov_literal64()) {
1.102 + return (address) ((NativeMovConstReg*)ni)->data();
1.103 + } else {
1.104 + ShouldNotReachHere();
1.105 + return NULL;
1.106 + }
1.107 +}
1.108 +
1.109 +
1.110 +void Relocation::pd_set_call_destination(address x) {
1.111 + NativeInstruction* ni = nativeInstruction_at(addr());
1.112 + if (ni->is_call()) {
1.113 + nativeCall_at(addr())->set_destination(x);
1.114 + } else if (ni->is_jump()) {
1.115 + NativeJump* nj = nativeJump_at(addr());
1.116 +
1.117 + // Unresolved jumps are recognized by a destination of -1
1.118 + // However 64bit can't actually produce such an address
1.119 + // and encodes a jump to self but jump_destination will
1.120 + // return a -1 as the signal. We must not relocate this
1.121 + // jmp or the ic code will not see it as unresolved.
1.122 +
1.123 + if (nj->jump_destination() == (address) -1) {
1.124 + x = addr(); // jump to self
1.125 + }
1.126 + nj->set_jump_destination(x);
1.127 + } else if (ni->is_cond_jump()) {
1.128 + // %%%% kludge this, for now, until we get a jump_destination method
1.129 + address old_dest = nativeGeneralJump_at(addr())->jump_destination();
1.130 + address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
1.131 + *(jint*)disp += (x - old_dest);
1.132 + } else if (ni->is_mov_literal64()) {
1.133 + ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
1.134 + } else {
1.135 + ShouldNotReachHere();
1.136 + }
1.137 +}
1.138 +
1.139 +
1.140 +address* Relocation::pd_address_in_code() {
1.141 + // All embedded Intel addresses are stored in 32-bit words.
1.142 + // Since the addr points at the start of the instruction,
1.143 + // we must parse the instruction a bit to find the embedded word.
1.144 + assert(is_data(), "must be a DataRelocation");
1.145 + typedef Assembler::WhichOperand WhichOperand;
1.146 + WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
1.147 +#ifdef AMD64
1.148 + assert(which == Assembler::disp32_operand ||
1.149 + which == Assembler::call32_operand ||
1.150 + which == Assembler::imm_operand, "format unpacks ok");
1.151 + // The "address" in the code is a displacement can't return it as
1.152 + // and address* since it is really a jint*
1.153 + guarantee(which == Assembler::imm_operand, "must be immediate operand");
1.154 +#else
1.155 + assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok");
1.156 +#endif // AMD64
1.157 + return (address*) Assembler::locate_operand(addr(), which);
1.158 +}
1.159 +
1.160 +
1.161 +address Relocation::pd_get_address_from_code() {
1.162 +#ifdef AMD64
1.163 + // All embedded Intel addresses are stored in 32-bit words.
1.164 + // Since the addr points at the start of the instruction,
1.165 + // we must parse the instruction a bit to find the embedded word.
1.166 + assert(is_data(), "must be a DataRelocation");
1.167 + typedef Assembler::WhichOperand WhichOperand;
1.168 + WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
1.169 + assert(which == Assembler::disp32_operand ||
1.170 + which == Assembler::call32_operand ||
1.171 + which == Assembler::imm_operand, "format unpacks ok");
1.172 + if (which != Assembler::imm_operand) {
1.173 + address ip = addr();
1.174 + address disp = Assembler::locate_operand(ip, which);
1.175 + address next_ip = Assembler::locate_next_instruction(ip);
1.176 + address a = next_ip + *(int32_t*) disp;
1.177 + return a;
1.178 + }
1.179 +#endif // AMD64
1.180 + return *pd_address_in_code();
1.181 +}
1.182 +
1.183 +void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
1.184 +#ifdef _LP64
1.185 + if (!Assembler::is_polling_page_far()) {
1.186 + typedef Assembler::WhichOperand WhichOperand;
1.187 + WhichOperand which = (WhichOperand) format();
1.188 + // This format is imm but it is really disp32
1.189 + which = Assembler::disp32_operand;
1.190 + address orig_addr = old_addr_for(addr(), src, dest);
1.191 + NativeInstruction* oni = nativeInstruction_at(orig_addr);
1.192 + int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
1.193 + // This poll_addr is incorrect by the size of the instruction it is irrelevant
1.194 + intptr_t poll_addr = (intptr_t)oni + *orig_disp;
1.195 +
1.196 + NativeInstruction* ni = nativeInstruction_at(addr());
1.197 + intptr_t new_disp = poll_addr - (intptr_t) ni;
1.198 +
1.199 + int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
1.200 + * disp = (int32_t)new_disp;
1.201 + }
1.202 +#endif // _LP64
1.203 +}
1.204 +
1.205 +void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
1.206 +#ifdef _LP64
1.207 + if (!Assembler::is_polling_page_far()) {
1.208 + typedef Assembler::WhichOperand WhichOperand;
1.209 + WhichOperand which = (WhichOperand) format();
1.210 + // This format is imm but it is really disp32
1.211 + which = Assembler::disp32_operand;
1.212 + address orig_addr = old_addr_for(addr(), src, dest);
1.213 + NativeInstruction* oni = nativeInstruction_at(orig_addr);
1.214 + int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
1.215 + // This poll_addr is incorrect by the size of the instruction it is irrelevant
1.216 + intptr_t poll_addr = (intptr_t)oni + *orig_disp;
1.217 +
1.218 + NativeInstruction* ni = nativeInstruction_at(addr());
1.219 + intptr_t new_disp = poll_addr - (intptr_t) ni;
1.220 +
1.221 + int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
1.222 + * disp = (int32_t)new_disp;
1.223 + }
1.224 +#endif // _LP64
1.225 +}
1.226 +
1.227 +void metadata_Relocation::pd_fix_value(address x) {
1.228 +}
