src/cpu/x86/vm/icBuffer_x86.cpp

changeset 0
f90c822e73f8
child 6876
710a3c8b516e
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/cpu/x86/vm/icBuffer_x86.cpp	Wed Apr 27 01:25:04 2016 +0800
     1.3 @@ -0,0 +1,75 @@
     1.4 +/*
     1.5 + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
     1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     1.7 + *
     1.8 + * This code is free software; you can redistribute it and/or modify it
     1.9 + * under the terms of the GNU General Public License version 2 only, as
    1.10 + * published by the Free Software Foundation.
    1.11 + *
    1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
    1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    1.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    1.15 + * version 2 for more details (a copy is included in the LICENSE file that
    1.16 + * accompanied this code).
    1.17 + *
    1.18 + * You should have received a copy of the GNU General Public License version
    1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
    1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    1.21 + *
    1.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    1.23 + * or visit www.oracle.com if you need additional information or have any
    1.24 + * questions.
    1.25 + *
    1.26 + */
    1.27 +
    1.28 +#include "precompiled.hpp"
    1.29 +#include "asm/macroAssembler.hpp"
    1.30 +#include "asm/macroAssembler.inline.hpp"
    1.31 +#include "code/icBuffer.hpp"
    1.32 +#include "gc_interface/collectedHeap.inline.hpp"
    1.33 +#include "interpreter/bytecodes.hpp"
    1.34 +#include "memory/resourceArea.hpp"
    1.35 +#include "nativeInst_x86.hpp"
    1.36 +#include "oops/oop.inline.hpp"
    1.37 +#include "oops/oop.inline2.hpp"
    1.38 +
    1.39 +int InlineCacheBuffer::ic_stub_code_size() {
    1.40 +  return NativeMovConstReg::instruction_size +
    1.41 +         NativeJump::instruction_size +
    1.42 +         1;
    1.43 +  // so that code_end can be set in CodeBuffer
    1.44 +  // 64bit 16 = 5 + 10 bytes + 1 byte
    1.45 +  // 32bit 11 = 10 bytes + 1 byte
    1.46 +}
    1.47 +
    1.48 +
    1.49 +
    1.50 +void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
    1.51 +  ResourceMark rm;
    1.52 +  CodeBuffer      code(code_begin, ic_stub_code_size());
    1.53 +  MacroAssembler* masm            = new MacroAssembler(&code);
    1.54 +  // note: even though the code contains an embedded value, we do not need reloc info
    1.55 +  // because
    1.56 +  // (1) the value is old (i.e., doesn't matter for scavenges)
    1.57 +  // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
    1.58 +  // assert(cached_value == NULL || cached_oop->is_perm(), "must be perm oop");
    1.59 +  masm->lea(rax, AddressLiteral((address) cached_value, relocInfo::metadata_type));
    1.60 +  masm->jump(ExternalAddress(entry_point));
    1.61 +}
    1.62 +
    1.63 +
    1.64 +address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
    1.65 +  NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
    1.66 +  NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    1.67 +  return jump->jump_destination();
    1.68 +}
    1.69 +
    1.70 +
    1.71 +void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
    1.72 +  // creation also verifies the object
    1.73 +  NativeMovConstReg* move = nativeMovConstReg_at(code_begin);
    1.74 +  // Verifies the jump
    1.75 +  NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    1.76 +  void* o = (void*)move->data();
    1.77 +  return o;
    1.78 +}

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