1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/x86/vm/assembler_x86.inline.hpp Wed Apr 27 01:25:04 2016 +0800
1.3 @@ -0,0 +1,50 @@
1.4 +/*
1.5 + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.23 + * or visit www.oracle.com if you need additional information or have any
1.24 + * questions.
1.25 + *
1.26 + */
1.27 +
1.28 +#ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
1.29 +#define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
1.30 +
1.31 +#include "asm/assembler.inline.hpp"
1.32 +#include "asm/codeBuffer.hpp"
1.33 +#include "code/codeCache.hpp"
1.34 +
1.35 +#ifndef _LP64
1.36 +inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; }
1.37 +inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; }
1.38 +
1.39 +inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; }
1.40 +inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; }
1.41 +
1.42 +inline void Assembler::prefix(Register reg) {}
1.43 +inline void Assembler::prefix(Address adr) {}
1.44 +inline void Assembler::prefixq(Address adr) {}
1.45 +
1.46 +inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {}
1.47 +inline void Assembler::prefixq(Address adr, Register reg) {}
1.48 +
1.49 +inline void Assembler::prefix(Address adr, XMMRegister reg) {}
1.50 +inline void Assembler::prefixq(Address adr, XMMRegister reg) {}
1.51 +#endif // _LP64
1.52 +
1.53 +#endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
