1.1 --- a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Wed Jul 03 20:04:13 2019 +0800 1.2 +++ b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Wed Jul 03 20:42:37 2019 +0800 1.3 @@ -294,11 +294,11 @@ 1.4 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 1.5 assert(left != result, "should be different registers"); 1.6 if (is_power_of_2(c + 1)) { 1.7 - __ shift_left(left, log2_intptr(c + 1), result); 1.8 + __ shift_left(left, log2_int(c + 1), result); 1.9 __ sub(result, left, result); 1.10 return true; 1.11 } else if (is_power_of_2(c - 1)) { 1.12 - __ shift_left(left, log2_intptr(c - 1), result); 1.13 + __ shift_left(left, log2_int(c - 1), result); 1.14 __ add(result, left, result); 1.15 return true; 1.16 }