1.1 --- a/src/cpu/sparc/vm/vm_version_sparc.cpp Fri Nov 22 15:26:37 2013 +0100
1.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.cpp Mon Dec 02 11:12:32 2013 +0100
1.3 @@ -89,6 +89,27 @@
1.4 _supports_cx8 = has_v9();
1.5 _supports_atomic_getset4 = true; // swap instruction
1.6
1.7 + // There are Fujitsu Sparc64 CPUs which support blk_init as well so
1.8 + // we have to take this check out of the 'is_niagara()' block below.
1.9 + if (has_blk_init()) {
1.10 + // When using CMS or G1, we cannot use memset() in BOT updates
1.11 + // because the sun4v/CMT version in libc_psr uses BIS which
1.12 + // exposes "phantom zeros" to concurrent readers. See 6948537.
1.13 + if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
1.14 + FLAG_SET_DEFAULT(UseMemSetInBOT, false);
1.15 + }
1.16 + // Issue a stern warning if the user has explicitly set
1.17 + // UseMemSetInBOT (it is known to cause issues), but allow
1.18 + // use for experimentation and debugging.
1.19 + if (UseConcMarkSweepGC || UseG1GC) {
1.20 + if (UseMemSetInBOT) {
1.21 + assert(!FLAG_IS_DEFAULT(UseMemSetInBOT), "Error");
1.22 + warning("Experimental flag -XX:+UseMemSetInBOT is known to cause instability"
1.23 + " on sun4v; please understand that you are using at your own risk!");
1.24 + }
1.25 + }
1.26 + }
1.27 +
1.28 if (is_niagara()) {
1.29 // Indirect branch is the same cost as direct
1.30 if (FLAG_IS_DEFAULT(UseInlineCaches)) {
1.31 @@ -98,12 +119,6 @@
1.32 if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
1.33 FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
1.34 }
1.35 - // When using CMS or G1, we cannot use memset() in BOT updates
1.36 - // because the sun4v/CMT version in libc_psr uses BIS which
1.37 - // exposes "phantom zeros" to concurrent readers. See 6948537.
1.38 - if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
1.39 - FLAG_SET_DEFAULT(UseMemSetInBOT, false);
1.40 - }
1.41 #ifdef _LP64
1.42 // 32-bit oops don't make sense for the 64-bit VM on sparc
1.43 // since the 32-bit VM has the same registers and smaller objects.
