1.1 --- a/src/share/vm/opto/compile.hpp Wed Jul 22 15:48:51 2009 -0700
1.2 +++ b/src/share/vm/opto/compile.hpp Thu Jul 23 14:53:56 2009 -0700
1.3 @@ -223,7 +223,8 @@
1.4 PhaseCFG* _cfg; // Results of CFG finding
1.5 bool _select_24_bit_instr; // We selected an instruction with a 24-bit result
1.6 bool _in_24_bit_fp_mode; // We are emitting instructions with 24-bit results
1.7 - bool _has_java_calls; // True if the method has java calls
1.8 + int _java_calls; // Number of java calls in the method
1.9 + int _inner_loops; // Number of inner loops in the method
1.10 Matcher* _matcher; // Engine to map ideal to machine instructions
1.11 PhaseRegAlloc* _regalloc; // Results of register allocation.
1.12 int _frame_slots; // Size of total frame in stack slots
1.13 @@ -505,7 +506,9 @@
1.14 PhaseCFG* cfg() { return _cfg; }
1.15 bool select_24_bit_instr() const { return _select_24_bit_instr; }
1.16 bool in_24_bit_fp_mode() const { return _in_24_bit_fp_mode; }
1.17 - bool has_java_calls() const { return _has_java_calls; }
1.18 + bool has_java_calls() const { return _java_calls > 0; }
1.19 + int java_calls() const { return _java_calls; }
1.20 + int inner_loops() const { return _inner_loops; }
1.21 Matcher* matcher() { return _matcher; }
1.22 PhaseRegAlloc* regalloc() { return _regalloc; }
1.23 int frame_slots() const { return _frame_slots; }
1.24 @@ -532,7 +535,8 @@
1.25 _in_24_bit_fp_mode = mode;
1.26 }
1.27
1.28 - void set_has_java_calls(bool z) { _has_java_calls = z; }
1.29 + void set_java_calls(int z) { _java_calls = z; }
1.30 + void set_inner_loops(int z) { _inner_loops = z; }
1.31
1.32 // Instruction bits passed off to the VM
1.33 int code_size() { return _method_size; }
