1.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Tue Jul 17 21:04:17 2018 +0800 1.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Thu Jul 19 14:03:08 2018 +0800 1.3 @@ -3178,11 +3178,13 @@ 1.4 1.5 #ifdef _LP64 1.6 Register caller_saved_registers[] = {AT, V0, V1, A0, A1, A2, A3, A4, A5, A6, A7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; 1.7 +Register caller_saved_registers_except_v0[] = {AT, V1, A0, A1, A2, A3, A4, A5, A6, A7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; 1.8 1.9 /* FIXME: Jin: In MIPS64, F0~23 are all caller-saved registers */ 1.10 FloatRegister caller_saved_fpu_registers[] = {F0, F12, F13}; 1.11 #else 1.12 Register caller_saved_registers[] = {AT, V0, V1, A0, A1, A2, A3, T4, T5, T6, T7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; 1.13 +Register caller_saved_registers_except_v0[] = {AT, V1, A0, A1, A2, A3, T4, T5, T6, T7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; 1.14 1.15 Register caller_saved_fpu_registers[] = {}; 1.16 #endif 1.17 @@ -3244,6 +3246,59 @@ 1.18 daddi(SP, SP, len * wordSize); 1.19 }; 1.20 1.21 +// We preserve all caller-saved register except V0 1.22 +void MacroAssembler::pushad_except_v0() { 1.23 + int i; 1.24 + 1.25 + /* Fixed-point registers */ 1.26 + int len = sizeof(caller_saved_registers_except_v0) / sizeof(caller_saved_registers_except_v0[0]); 1.27 + daddi(SP, SP, -1 * len * wordSize); 1.28 + for (i = 0; i < len; i++) { 1.29 +#ifdef _LP64 1.30 + sd(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); 1.31 +#else 1.32 + sw(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); 1.33 +#endif 1.34 + } 1.35 + 1.36 + /* Floating-point registers */ 1.37 + len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); 1.38 + daddi(SP, SP, -1 * len * wordSize); 1.39 + for (i = 0; i < len; i++) { 1.40 +#ifdef _LP64 1.41 + sdc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); 1.42 +#else 1.43 + swc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); 1.44 +#endif 1.45 + } 1.46 +} 1.47 + 1.48 +void MacroAssembler::popad_except_v0() { 1.49 + int i; 1.50 + 1.51 + /* Floating-point registers */ 1.52 + int len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); 1.53 + for (i = 0; i < len; i++) { 1.54 +#ifdef _LP64 1.55 + ldc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); 1.56 +#else 1.57 + lwc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); 1.58 +#endif 1.59 + } 1.60 + daddi(SP, SP, len * wordSize); 1.61 + 1.62 + /* Fixed-point registers */ 1.63 + len = sizeof(caller_saved_registers_except_v0) / sizeof(caller_saved_registers_except_v0[0]); 1.64 + for (i = 0; i < len; i++) { 1.65 +#ifdef _LP64 1.66 + ld(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); 1.67 +#else 1.68 + lw(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); 1.69 +#endif 1.70 + } 1.71 + daddi(SP, SP, len * wordSize); 1.72 +} 1.73 + 1.74 void MacroAssembler::push2(Register reg1, Register reg2) { 1.75 #ifdef _LP64 1.76 daddi(SP, SP, -16);