1.1 --- a/src/cpu/x86/vm/x86_32.ad Fri Mar 27 10:57:42 2015 +0100
1.2 +++ b/src/cpu/x86/vm/x86_32.ad Fri May 29 10:58:45 2015 +0200
1.3 @@ -123,50 +123,94 @@
1.4 // 2) reg_class interpreter_method_oop_reg ( /* as def'd in frame section */ )
1.5 // 3) reg_class stack_slots( /* one chunk of stack-based "registers" */ )
1.6 //
1.7 +// Class for no registers (empty set).
1.8 +reg_class no_reg();
1.9 +
1.10 // Class for all registers
1.11 -reg_class any_reg(EAX, EDX, EBP, EDI, ESI, ECX, EBX, ESP);
1.12 +reg_class any_reg_with_ebp(EAX, EDX, EBP, EDI, ESI, ECX, EBX, ESP);
1.13 +// Class for all registers (excluding EBP)
1.14 +reg_class any_reg_no_ebp(EAX, EDX, EDI, ESI, ECX, EBX, ESP);
1.15 +// Dynamic register class that selects at runtime between register classes
1.16 +// any_reg and any_no_ebp_reg (depending on the value of the flag PreserveFramePointer).
1.17 +// Equivalent to: return PreserveFramePointer ? any_no_ebp_reg : any_reg;
1.18 +reg_class_dynamic any_reg(any_reg_no_ebp, any_reg_with_ebp, %{ PreserveFramePointer %});
1.19 +
1.20 // Class for general registers
1.21 -reg_class int_reg(EAX, EDX, EBP, EDI, ESI, ECX, EBX);
1.22 -// Class for general registers which may be used for implicit null checks on win95
1.23 -// Also safe for use by tailjump. We don't want to allocate in rbp,
1.24 -reg_class int_reg_no_rbp(EAX, EDX, EDI, ESI, ECX, EBX);
1.25 +reg_class int_reg_with_ebp(EAX, EDX, EBP, EDI, ESI, ECX, EBX);
1.26 +// Class for general registers (excluding EBP).
1.27 +// This register class can be used for implicit null checks on win95.
1.28 +// It is also safe for use by tailjumps (we don't want to allocate in ebp).
1.29 +// Used also if the PreserveFramePointer flag is true.
1.30 +reg_class int_reg_no_ebp(EAX, EDX, EDI, ESI, ECX, EBX);
1.31 +// Dynamic register class that selects between int_reg and int_reg_no_ebp.
1.32 +reg_class_dynamic int_reg(int_reg_no_ebp, int_reg_with_ebp, %{ PreserveFramePointer %});
1.33 +
1.34 // Class of "X" registers
1.35 reg_class int_x_reg(EBX, ECX, EDX, EAX);
1.36 +
1.37 // Class of registers that can appear in an address with no offset.
1.38 // EBP and ESP require an extra instruction byte for zero offset.
1.39 // Used in fast-unlock
1.40 reg_class p_reg(EDX, EDI, ESI, EBX);
1.41 -// Class for general registers not including ECX
1.42 -reg_class ncx_reg(EAX, EDX, EBP, EDI, ESI, EBX);
1.43 -// Class for general registers not including EAX
1.44 +
1.45 +// Class for general registers excluding ECX
1.46 +reg_class ncx_reg_with_ebp(EAX, EDX, EBP, EDI, ESI, EBX);
1.47 +// Class for general registers excluding ECX (and EBP)
1.48 +reg_class ncx_reg_no_ebp(EAX, EDX, EDI, ESI, EBX);
1.49 +// Dynamic register class that selects between ncx_reg and ncx_reg_no_ebp.
1.50 +reg_class_dynamic ncx_reg(ncx_reg_no_ebp, ncx_reg_with_ebp, %{ PreserveFramePointer %});
1.51 +
1.52 +// Class for general registers excluding EAX
1.53 reg_class nax_reg(EDX, EDI, ESI, ECX, EBX);
1.54 -// Class for general registers not including EAX or EBX.
1.55 -reg_class nabx_reg(EDX, EDI, ESI, ECX, EBP);
1.56 +
1.57 +// Class for general registers excluding EAX and EBX.
1.58 +reg_class nabx_reg_with_ebp(EDX, EDI, ESI, ECX, EBP);
1.59 +// Class for general registers excluding EAX and EBX (and EBP)
1.60 +reg_class nabx_reg_no_ebp(EDX, EDI, ESI, ECX);
1.61 +// Dynamic register class that selects between nabx_reg and nabx_reg_no_ebp.
1.62 +reg_class_dynamic nabx_reg(nabx_reg_no_ebp, nabx_reg_with_ebp, %{ PreserveFramePointer %});
1.63 +
1.64 // Class of EAX (for multiply and divide operations)
1.65 reg_class eax_reg(EAX);
1.66 +
1.67 // Class of EBX (for atomic add)
1.68 reg_class ebx_reg(EBX);
1.69 +
1.70 // Class of ECX (for shift and JCXZ operations and cmpLTMask)
1.71 reg_class ecx_reg(ECX);
1.72 +
1.73 // Class of EDX (for multiply and divide operations)
1.74 reg_class edx_reg(EDX);
1.75 +
1.76 // Class of EDI (for synchronization)
1.77 reg_class edi_reg(EDI);
1.78 +
1.79 // Class of ESI (for synchronization)
1.80 reg_class esi_reg(ESI);
1.81 -// Singleton class for interpreter's stack pointer
1.82 -reg_class ebp_reg(EBP);
1.83 +
1.84 // Singleton class for stack pointer
1.85 reg_class sp_reg(ESP);
1.86 +
1.87 // Singleton class for instruction pointer
1.88 // reg_class ip_reg(EIP);
1.89 +
1.90 // Class of integer register pairs
1.91 -reg_class long_reg( EAX,EDX, ECX,EBX, EBP,EDI );
1.92 +reg_class long_reg_with_ebp( EAX,EDX, ECX,EBX, EBP,EDI );
1.93 +// Class of integer register pairs (excluding EBP and EDI);
1.94 +reg_class long_reg_no_ebp( EAX,EDX, ECX,EBX );
1.95 +// Dynamic register class that selects between long_reg and long_reg_no_ebp.
1.96 +reg_class_dynamic long_reg(long_reg_no_ebp, long_reg_with_ebp, %{ PreserveFramePointer %});
1.97 +
1.98 // Class of integer register pairs that aligns with calling convention
1.99 reg_class eadx_reg( EAX,EDX );
1.100 reg_class ebcx_reg( ECX,EBX );
1.101 +
1.102 // Not AX or DX, used in divides
1.103 -reg_class nadx_reg( EBX,ECX,ESI,EDI,EBP );
1.104 +reg_class nadx_reg_with_ebp(EBX, ECX, ESI, EDI, EBP);
1.105 +// Not AX or DX (and neither EBP), used in divides
1.106 +reg_class nadx_reg_no_ebp(EBX, ECX, ESI, EDI);
1.107 +// Dynamic register class that selects between nadx_reg and nadx_reg_no_ebp.
1.108 +reg_class_dynamic nadx_reg(nadx_reg_no_ebp, nadx_reg_with_ebp, %{ PreserveFramePointer %});
1.109
1.110 // Floating point registers. Notice FPR0 is not a choice.
1.111 // FPR0 is not ever allocated; we use clever encodings to fake
1.112 @@ -240,18 +284,11 @@
1.113 return size;
1.114 }
1.115
1.116 -static int preserve_SP_size() {
1.117 - return 2; // op, rm(reg/reg)
1.118 -}
1.119 -
1.120 // !!!!! Special hack to get all type of calls to specify the byte offset
1.121 // from the start of the call to the point where the return address
1.122 // will point.
1.123 int MachCallStaticJavaNode::ret_addr_offset() {
1.124 - int offset = 5 + pre_call_resets_size(); // 5 bytes from start of call to where return address points
1.125 - if (_method_handle_invoke)
1.126 - offset += preserve_SP_size();
1.127 - return offset;
1.128 + return 5 + pre_call_resets_size(); // 5 bytes from start of call to where return address points
1.129 }
1.130
1.131 int MachCallDynamicJavaNode::ret_addr_offset() {
1.132 @@ -285,15 +322,6 @@
1.133
1.134 // The address of the call instruction needs to be 4-byte aligned to
1.135 // ensure that it does not span a cache line so that it can be patched.
1.136 -int CallStaticJavaHandleNode::compute_padding(int current_offset) const {
1.137 - current_offset += pre_call_resets_size(); // skip fldcw, if any
1.138 - current_offset += preserve_SP_size(); // skip mov rbp, rsp
1.139 - current_offset += 1; // skip call opcode byte
1.140 - return round_to(current_offset, alignment_required()) - current_offset;
1.141 -}
1.142 -
1.143 -// The address of the call instruction needs to be 4-byte aligned to
1.144 -// ensure that it does not span a cache line so that it can be patched.
1.145 int CallDynamicJavaDirectNode::compute_padding(int current_offset) const {
1.146 current_offset += pre_call_resets_size(); // skip fldcw, if any
1.147 current_offset += 5; // skip MOV instruction
1.148 @@ -523,6 +551,10 @@
1.149 st->print("# stack bang (%d bytes)", bangsize);
1.150 st->print("\n\t");
1.151 st->print("PUSH EBP\t# Save EBP");
1.152 + if (PreserveFramePointer) {
1.153 + st->print("\n\t");
1.154 + st->print("MOV EBP, ESP\t# Save the caller's SP into EBP");
1.155 + }
1.156 if (framesize) {
1.157 st->print("\n\t");
1.158 st->print("SUB ESP, #%d\t# Create frame",framesize);
1.159 @@ -532,6 +564,10 @@
1.160 st->print("\n\t");
1.161 framesize -= wordSize;
1.162 st->print("MOV [ESP + #%d], EBP\t# Save EBP",framesize);
1.163 + if (PreserveFramePointer) {
1.164 + st->print("\n\t");
1.165 + st->print("MOV EBP, [ESP + #%d]\t# Save the caller's SP into EBP", (framesize + wordSize));
1.166 + }
1.167 }
1.168
1.169 if (VerifyStackAtCalls) {
1.170 @@ -1488,7 +1524,7 @@
1.171 }
1.172
1.173 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1.174 - return EBP_REG_mask();
1.175 + return NO_REG_mask();
1.176 }
1.177
1.178 // Returns true if the high 32 bits of the value is known to be zero.
1.179 @@ -3734,7 +3770,7 @@
1.180
1.181 // On windows95, EBP is not safe to use for implicit null tests.
1.182 operand eRegP_no_EBP() %{
1.183 - constraint(ALLOC_IN_RC(int_reg_no_rbp));
1.184 + constraint(ALLOC_IN_RC(int_reg_no_ebp));
1.185 match(RegP);
1.186 match(eAXRegP);
1.187 match(eBXRegP);
1.188 @@ -3823,13 +3859,6 @@
1.189 interface(REG_INTER);
1.190 %}
1.191
1.192 -operand eBPRegP() %{
1.193 - constraint(ALLOC_IN_RC(ebp_reg));
1.194 - match(RegP);
1.195 - format %{ "EBP" %}
1.196 - interface(REG_INTER);
1.197 -%}
1.198 -
1.199 operand eRegL() %{
1.200 constraint(ALLOC_IN_RC(long_reg));
1.201 match(RegL);
1.202 @@ -12708,7 +12737,6 @@
1.203 // compute_padding() functions will have to be adjusted.
1.204 instruct CallStaticJavaDirect(method meth) %{
1.205 match(CallStaticJava);
1.206 - predicate(! ((CallStaticJavaNode*)n)->is_method_handle_invoke());
1.207 effect(USE meth);
1.208
1.209 ins_cost(300);
1.210 @@ -12722,29 +12750,6 @@
1.211 ins_alignment(4);
1.212 %}
1.213
1.214 -// Call Java Static Instruction (method handle version)
1.215 -// Note: If this code changes, the corresponding ret_addr_offset() and
1.216 -// compute_padding() functions will have to be adjusted.
1.217 -instruct CallStaticJavaHandle(method meth, eBPRegP ebp_mh_SP_save) %{
1.218 - match(CallStaticJava);
1.219 - predicate(((CallStaticJavaNode*)n)->is_method_handle_invoke());
1.220 - effect(USE meth);
1.221 - // EBP is saved by all callees (for interpreter stack correction).
1.222 - // We use it here for a similar purpose, in {preserve,restore}_SP.
1.223 -
1.224 - ins_cost(300);
1.225 - format %{ "CALL,static/MethodHandle " %}
1.226 - opcode(0xE8); /* E8 cd */
1.227 - ins_encode( pre_call_resets,
1.228 - preserve_SP,
1.229 - Java_Static_Call( meth ),
1.230 - restore_SP,
1.231 - call_epilog,
1.232 - post_call_FPU );
1.233 - ins_pipe( pipe_slow );
1.234 - ins_alignment(4);
1.235 -%}
1.236 -
1.237 // Call Java Dynamic Instruction
1.238 // Note: If this code changes, the corresponding ret_addr_offset() and
1.239 // compute_padding() functions will have to be adjusted.
