src/share/vm/opto/mulnode.cpp

changeset 4115
e626685e9f6c
parent 3040
c7b60b601eb4
child 4153
b9a9ed0f8eeb
child 4160
f6badecb7ea7
     1.1 --- a/src/share/vm/opto/mulnode.cpp	Tue Sep 25 15:48:17 2012 -0700
     1.2 +++ b/src/share/vm/opto/mulnode.cpp	Thu Sep 27 09:38:42 2012 -0700
     1.3 @@ -198,22 +198,22 @@
     1.4    Node *res = NULL;
     1.5    jint bit1 = con & -con;       // Extract low bit
     1.6    if( bit1 == con ) {           // Found a power of 2?
     1.7 -    res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
     1.8 +    res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
     1.9    } else {
    1.10  
    1.11      // Check for constant with 2 bits set
    1.12      jint bit2 = con-bit1;
    1.13      bit2 = bit2 & -bit2;          // Extract 2nd bit
    1.14      if( bit2 + bit1 == con ) {    // Found all bits in con?
    1.15 -      Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
    1.16 -      Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
    1.17 -      res = new (phase->C, 3) AddINode( n2, n1 );
    1.18 +      Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
    1.19 +      Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
    1.20 +      res = new (phase->C) AddINode( n2, n1 );
    1.21  
    1.22      } else if (is_power_of_2(con+1)) {
    1.23        // Sleezy: power-of-2 -1.  Next time be generic.
    1.24        jint temp = (jint) (con + 1);
    1.25 -      Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
    1.26 -      res = new (phase->C, 3) SubINode( n1, in(1) );
    1.27 +      Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
    1.28 +      res = new (phase->C) SubINode( n1, in(1) );
    1.29      } else {
    1.30        return MulNode::Ideal(phase, can_reshape);
    1.31      }
    1.32 @@ -221,7 +221,7 @@
    1.33  
    1.34    if( sign_flip ) {             // Need to negate result?
    1.35      res = phase->transform(res);// Transform, before making the zero con
    1.36 -    res = new (phase->C, 3) SubINode(phase->intcon(0),res);
    1.37 +    res = new (phase->C) SubINode(phase->intcon(0),res);
    1.38    }
    1.39  
    1.40    return res;                   // Return final result
    1.41 @@ -294,22 +294,22 @@
    1.42    Node *res = NULL;
    1.43    jlong bit1 = con & -con;      // Extract low bit
    1.44    if( bit1 == con ) {           // Found a power of 2?
    1.45 -    res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
    1.46 +    res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
    1.47    } else {
    1.48  
    1.49      // Check for constant with 2 bits set
    1.50      jlong bit2 = con-bit1;
    1.51      bit2 = bit2 & -bit2;          // Extract 2nd bit
    1.52      if( bit2 + bit1 == con ) {    // Found all bits in con?
    1.53 -      Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
    1.54 -      Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
    1.55 -      res = new (phase->C, 3) AddLNode( n2, n1 );
    1.56 +      Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
    1.57 +      Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
    1.58 +      res = new (phase->C) AddLNode( n2, n1 );
    1.59  
    1.60      } else if (is_power_of_2_long(con+1)) {
    1.61        // Sleezy: power-of-2 -1.  Next time be generic.
    1.62        jlong temp = (jlong) (con + 1);
    1.63 -      Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
    1.64 -      res = new (phase->C, 3) SubLNode( n1, in(1) );
    1.65 +      Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
    1.66 +      res = new (phase->C) SubLNode( n1, in(1) );
    1.67      } else {
    1.68        return MulNode::Ideal(phase, can_reshape);
    1.69      }
    1.70 @@ -317,7 +317,7 @@
    1.71  
    1.72    if( sign_flip ) {             // Need to negate result?
    1.73      res = phase->transform(res);// Transform, before making the zero con
    1.74 -    res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
    1.75 +    res = new (phase->C) SubLNode(phase->longcon(0),res);
    1.76    }
    1.77  
    1.78    return res;                   // Return final result
    1.79 @@ -476,27 +476,27 @@
    1.80    // Masking bits off of a Character?  Hi bits are already zero.
    1.81    if( lop == Op_LoadUS &&
    1.82        (mask & 0xFFFF0000) )     // Can we make a smaller mask?
    1.83 -    return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
    1.84 +    return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
    1.85  
    1.86    // Masking bits off of a Short?  Loading a Character does some masking
    1.87    if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
    1.88 -    Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
    1.89 +    Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
    1.90                                                load->in(MemNode::Memory),
    1.91                                                load->in(MemNode::Address),
    1.92                                                load->adr_type());
    1.93      ldus = phase->transform(ldus);
    1.94 -    return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF));
    1.95 +    return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
    1.96    }
    1.97  
    1.98    // Masking sign bits off of a Byte?  Do an unsigned byte load plus
    1.99    // an and.
   1.100    if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
   1.101 -    Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control),
   1.102 +    Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
   1.103                                                load->in(MemNode::Memory),
   1.104                                                load->in(MemNode::Address),
   1.105                                                load->adr_type());
   1.106      ldub = phase->transform(ldub);
   1.107 -    return new (phase->C, 3) AndINode(ldub, phase->intcon(mask));
   1.108 +    return new (phase->C) AndINode(ldub, phase->intcon(mask));
   1.109    }
   1.110  
   1.111    // Masking off sign bits?  Dont make them!
   1.112 @@ -510,8 +510,8 @@
   1.113        // bits survive.  NO sign-extension bits survive the maskings.
   1.114        if( (sign_bits_mask & mask) == 0 ) {
   1.115          // Use zero-fill shift instead
   1.116 -        Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
   1.117 -        return new (phase->C, 3) AndINode( zshift, in(2) );
   1.118 +        Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
   1.119 +        return new (phase->C) AndINode( zshift, in(2) );
   1.120        }
   1.121      }
   1.122    }
   1.123 @@ -521,7 +521,7 @@
   1.124    // plus 1) and the mask is of the low order bit.  Skip the negate.
   1.125    if( lop == Op_SubI && mask == 1 && load->in(1) &&
   1.126        phase->type(load->in(1)) == TypeInt::ZERO )
   1.127 -    return new (phase->C, 3) AndINode( load->in(2), in(2) );
   1.128 +    return new (phase->C) AndINode( load->in(2), in(2) );
   1.129  
   1.130    return MulNode::Ideal(phase, can_reshape);
   1.131  }
   1.132 @@ -607,7 +607,7 @@
   1.133    // which is wrong.
   1.134    if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) {
   1.135      Node* load = in1->in(1);
   1.136 -    return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control),
   1.137 +    return new (phase->C) LoadUI2LNode(load->in(MemNode::Control),
   1.138                                            load->in(MemNode::Memory),
   1.139                                            load->in(MemNode::Address),
   1.140                                            load->adr_type());
   1.141 @@ -619,9 +619,9 @@
   1.142    // value.  This check includes UI2L masks (0x00000000FFFFFFFF) which
   1.143    // would be optimized away later in Identity.
   1.144    if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
   1.145 -    Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask));
   1.146 +    Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
   1.147      andi = phase->transform(andi);
   1.148 -    return new (phase->C, 2) ConvI2LNode(andi);
   1.149 +    return new (phase->C) ConvI2LNode(andi);
   1.150    }
   1.151  
   1.152    // Masking off sign bits?  Dont make them!
   1.153 @@ -635,8 +635,8 @@
   1.154        // bits survive.  NO sign-extension bits survive the maskings.
   1.155        if( (sign_bits_mask & mask) == 0 ) {
   1.156          // Use zero-fill shift instead
   1.157 -        Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2)));
   1.158 -        return new (phase->C, 3) AndLNode(zshift, in(2));
   1.159 +        Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
   1.160 +        return new (phase->C) AndLNode(zshift, in(2));
   1.161        }
   1.162      }
   1.163    }
   1.164 @@ -674,9 +674,9 @@
   1.165        // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
   1.166        if( con < 16 ) {
   1.167          // Compute X << con0
   1.168 -        Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
   1.169 +        Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
   1.170          // Compute X<<con0 + (con1<<con0)
   1.171 -        return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
   1.172 +        return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
   1.173        }
   1.174      }
   1.175    }
   1.176 @@ -685,7 +685,7 @@
   1.177    if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
   1.178        add1->in(2) == in(2) )
   1.179      // Convert to "(x & -(1<<c0))"
   1.180 -    return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
   1.181 +    return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
   1.182  
   1.183    // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
   1.184    if( add1_op == Op_AndI ) {
   1.185 @@ -694,8 +694,8 @@
   1.186      if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
   1.187          add2->in(2) == in(2) ) {
   1.188        // Convert to "(x & (Y<<c0))"
   1.189 -      Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
   1.190 -      return new (phase->C, 3) AndINode( add2->in(1), y_sh );
   1.191 +      Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
   1.192 +      return new (phase->C) AndINode( add2->in(1), y_sh );
   1.193      }
   1.194    }
   1.195  
   1.196 @@ -704,7 +704,7 @@
   1.197    const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
   1.198    if( add1_op == Op_AndI &&
   1.199        phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
   1.200 -    return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
   1.201 +    return new (phase->C) LShiftINode( add1->in(1), in(2) );
   1.202  
   1.203    return NULL;
   1.204  }
   1.205 @@ -784,9 +784,9 @@
   1.206      const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
   1.207      if( t12 && t12->is_con() ){ // Left input is an add of a con?
   1.208        // Compute X << con0
   1.209 -      Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
   1.210 +      Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
   1.211        // Compute X<<con0 + (con1<<con0)
   1.212 -      return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
   1.213 +      return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
   1.214      }
   1.215    }
   1.216  
   1.217 @@ -794,7 +794,7 @@
   1.218    if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
   1.219        add1->in(2) == in(2) )
   1.220      // Convert to "(x & -(1<<c0))"
   1.221 -    return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
   1.222 +    return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
   1.223  
   1.224    // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
   1.225    if( add1_op == Op_AndL ) {
   1.226 @@ -803,8 +803,8 @@
   1.227      if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
   1.228          add2->in(2) == in(2) ) {
   1.229        // Convert to "(x & (Y<<c0))"
   1.230 -      Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
   1.231 -      return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
   1.232 +      Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
   1.233 +      return new (phase->C) AndLNode( add2->in(1), y_sh );
   1.234      }
   1.235    }
   1.236  
   1.237 @@ -813,7 +813,7 @@
   1.238    const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
   1.239    if( add1_op == Op_AndL &&
   1.240        phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
   1.241 -    return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
   1.242 +    return new (phase->C) LShiftLNode( add1->in(1), in(2) );
   1.243  
   1.244    return NULL;
   1.245  }
   1.246 @@ -915,8 +915,8 @@
   1.247      Node *x = mask->in(1);
   1.248      jint maskbits = t3->get_con();
   1.249      // Convert to "(x >> shift) & (mask >> shift)"
   1.250 -    Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
   1.251 -    return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
   1.252 +    Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
   1.253 +    return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
   1.254    }
   1.255  
   1.256    // Check for "(short[i] <<16)>>16" which simply sign-extends
   1.257 @@ -939,7 +939,7 @@
   1.258      }
   1.259      else if( ld->Opcode() == Op_LoadUS )
   1.260        // Replace zero-extension-load with sign-extension-load
   1.261 -      return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
   1.262 +      return new (phase->C) LoadSNode( ld->in(MemNode::Control),
   1.263                                  ld->in(MemNode::Memory),
   1.264                                  ld->in(MemNode::Address),
   1.265                                  ld->adr_type());
   1.266 @@ -1124,7 +1124,7 @@
   1.267        const int con2 = t12->get_con() & 31; // Shift count is always masked
   1.268        const int con3 = con+con2;
   1.269        if( con3 < 32 )           // Only merge shifts if total is < 32
   1.270 -        return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
   1.271 +        return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
   1.272      }
   1.273    }
   1.274  
   1.275 @@ -1137,9 +1137,9 @@
   1.276      Node *lshl = add->in(1);
   1.277      if( lshl->Opcode() == Op_LShiftI &&
   1.278          phase->type(lshl->in(2)) == t2 ) {
   1.279 -      Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
   1.280 -      Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
   1.281 -      return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
   1.282 +      Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
   1.283 +      Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
   1.284 +      return new (phase->C) AndINode( sum, phase->intcon(mask) );
   1.285      }
   1.286    }
   1.287  
   1.288 @@ -1152,8 +1152,8 @@
   1.289      if( t3 && t3->is_con() ) { // Right input is a constant
   1.290        jint mask2 = t3->get_con();
   1.291        mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
   1.292 -      Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
   1.293 -      return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
   1.294 +      Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
   1.295 +      return new (phase->C) AndINode(newshr, phase->intcon(mask2));
   1.296        // The negative values are easier to materialize than positive ones.
   1.297        // A typical case from address arithmetic is ((x & ~15) >> 4).
   1.298        // It's better to change that to ((x >> 4) & ~0) versus
   1.299 @@ -1165,7 +1165,7 @@
   1.300    Node *shl = in(1);
   1.301    if( in1_op == Op_LShiftI &&
   1.302        phase->type(shl->in(2)) == t2 )
   1.303 -    return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
   1.304 +    return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
   1.305  
   1.306    return NULL;
   1.307  }
   1.308 @@ -1270,9 +1270,9 @@
   1.309      Node *lshl = add->in(1);
   1.310      if( lshl->Opcode() == Op_LShiftL &&
   1.311          phase->type(lshl->in(2)) == t2 ) {
   1.312 -      Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
   1.313 -      Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
   1.314 -      return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
   1.315 +      Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
   1.316 +      Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
   1.317 +      return new (phase->C) AndLNode( sum, phase->longcon(mask) );
   1.318      }
   1.319    }
   1.320  
   1.321 @@ -1285,8 +1285,8 @@
   1.322      if( t3 && t3->is_con() ) { // Right input is a constant
   1.323        jlong mask2 = t3->get_con();
   1.324        mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
   1.325 -      Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
   1.326 -      return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
   1.327 +      Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
   1.328 +      return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
   1.329      }
   1.330    }
   1.331  
   1.332 @@ -1294,7 +1294,7 @@
   1.333    Node *shl = in(1);
   1.334    if( shl->Opcode() == Op_LShiftL &&
   1.335        phase->type(shl->in(2)) == t2 )
   1.336 -    return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
   1.337 +    return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
   1.338  
   1.339    return NULL;
   1.340  }

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