1.1 --- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp Tue Apr 05 19:14:03 2011 -0700
1.2 +++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp Thu Apr 07 09:53:20 2011 -0700
1.3 @@ -326,7 +326,8 @@
1.4
1.5 if (obj_store) {
1.6 // Needs GC write barriers.
1.7 - pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
1.8 + pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
1.9 + true /* do_load */, false /* patch */, NULL);
1.10 __ move(value.result(), array_addr, null_check_info);
1.11 // Seems to be a precise
1.12 post_barrier(LIR_OprFact::address(array_addr), value.result());
1.13 @@ -794,7 +795,8 @@
1.14
1.15 if (type == objectType) { // Write-barrier needed for Object fields.
1.16 // Do the pre-write barrier, if any.
1.17 - pre_barrier(addr, false, NULL);
1.18 + pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
1.19 + true /* do_load */, false /* patch */, NULL);
1.20 }
1.21
1.22 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
1.23 @@ -1339,7 +1341,8 @@
1.24 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1.25 if (is_obj) {
1.26 // Do the pre-write barrier, if any.
1.27 - pre_barrier(LIR_OprFact::address(addr), false, NULL);
1.28 + pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1.29 + true /* do_load */, false /* patch */, NULL);
1.30 __ move(data, addr);
1.31 assert(src->is_register(), "must be register");
1.32 // Seems to be a precise address
